dt-bindings: xilinx: Add missing ids for PD
authorMichal Simek <michal.simek@xilinx.com>
Wed, 30 Mar 2022 07:56:23 +0000 (09:56 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 5 Apr 2022 13:12:12 +0000 (15:12 +0200)
There are some new power domain IDs which are used in Linux kernel that's
why add them here too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e6092e1d3766c0ac11bf620820739c93ab677a85.1648626981.git.michal.simek@xilinx.com
include/dt-bindings/power/xlnx-versal-power.h
include/dt-bindings/power/xlnx-zynqmp-power.h

index 4a72775..51d1def 100644 (file)
@@ -6,6 +6,16 @@
 #ifndef _DT_BINDINGS_VERSAL_POWER_H
 #define _DT_BINDINGS_VERSAL_POWER_H
 
+#define PM_DEV_RPU0_0                          (0x18110005U)
+#define PM_DEV_RPU0_1                          (0x18110006U)
+#define PM_DEV_OCM_0                           (0x18314007U)
+#define PM_DEV_OCM_1                           (0x18314008U)
+#define PM_DEV_OCM_2                           (0x18314009U)
+#define PM_DEV_OCM_3                           (0x1831400aU)
+#define PM_DEV_TCM_0_A                         (0x1831800bU)
+#define PM_DEV_TCM_0_B                         (0x1831800cU)
+#define PM_DEV_TCM_1_A                         (0x1831800dU)
+#define PM_DEV_TCM_1_B                         (0x1831800eU)
 #define PM_DEV_USB_0                           (0x18224018U)
 #define PM_DEV_GEM_0                           (0x18224019U)
 #define PM_DEV_GEM_1                           (0x1822401aU)
@@ -38,6 +48,7 @@
 #define PM_DEV_ADMA_5                          (0x1822403aU)
 #define PM_DEV_ADMA_6                          (0x1822403bU)
 #define PM_DEV_ADMA_7                          (0x1822403cU)
+#define PM_DEV_AMS_ROOT                                (0x18224055U)
 #define PM_DEV_AI                              (0x18224072U)
 
 #endif
index 0d9a412..e7eb096 100644 (file)
@@ -6,6 +6,16 @@
 #ifndef _DT_BINDINGS_ZYNQMP_POWER_H
 #define _DT_BINDINGS_ZYNQMP_POWER_H
 
+#define                PD_RPU_0        6
+#define                PD_RPU_1        7
+#define                PD_OCM_BANK_0   11
+#define                PD_OCM_BANK_1   12
+#define                PD_OCM_BANK_2   13
+#define                PD_OCM_BANK_3   14
+#define                PD_TCM_BANK_0   15
+#define                PD_TCM_BANK_1   16
+#define                PD_TCM_BANK_2   17
+#define                PD_TCM_BANK_3   18
 #define                PD_USB_0        22
 #define                PD_USB_1        23
 #define                PD_TTC_0        24
@@ -35,5 +45,6 @@
 #define                PD_CAN_1        48
 #define                PD_GPU          58
 #define                PD_PCIE         59
+#define                PD_PL           69
 
 #endif