Merge git://git.denx.de/u-boot-x86
authorTom Rini <trini@konsulko.com>
Mon, 17 Sep 2018 12:04:25 +0000 (08:04 -0400)
committerTom Rini <trini@konsulko.com>
Mon, 17 Sep 2018 12:04:25 +0000 (08:04 -0400)
arch/x86/cpu/tangier/Makefile
arch/x86/cpu/tangier/pinmux.c [new file with mode: 0644]
arch/x86/dts/edison.dts
arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
arch/x86/include/asm/scu.h
arch/x86/lib/scu.c
include/configs/x86-common.h

index 8274482..68f4a32 100644 (file)
@@ -2,5 +2,5 @@
 #
 # Copyright (c) 2017 Intel Corporation
 
-obj-y += car.o tangier.o sdram.o sysreset.o
+obj-y += car.o tangier.o sdram.o sysreset.o pinmux.o
 obj-$(CONFIG_GENERATE_ACPI_TABLE) += acpi.o
diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c
new file mode 100644 (file)
index 0000000..fdd6530
--- /dev/null
@@ -0,0 +1,194 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2018 Emlid Limited
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <dm/read.h>
+#include <regmap.h>
+#include <syscon.h>
+#include <asm/cpu.h>
+#include <asm/scu.h>
+#include <linux/io.h>
+
+#define BUFCFG_OFFSET                          0x100
+
+#define MRFLD_FAMILY_LEN                       0x400
+
+/* These are taken from Linux kernel */
+#define MRFLD_PINMODE_MASK                     0x07
+
+#define pin_to_bufno(f, p)                     ((p) - (f)->pin_base)
+
+struct mrfld_family {
+       unsigned int family_number;
+       unsigned int pin_base;
+       size_t npins;
+       void __iomem *regs;
+};
+
+#define MRFLD_FAMILY(b, s, e)                          \
+       {                                               \
+               .family_number = (b),                   \
+               .pin_base = (s),                        \
+               .npins = (e) - (s) + 1,                 \
+       }
+
+/* Now we only support I2C family of pins */
+static struct mrfld_family mrfld_families[] = {
+       MRFLD_FAMILY(7, 101, 114),
+};
+
+struct mrfld_pinctrl {
+       const struct mrfld_family *families;
+       size_t nfamilies;
+};
+
+static const struct mrfld_family *
+mrfld_get_family(struct mrfld_pinctrl *mp, unsigned int pin)
+{
+       const struct mrfld_family *family;
+       unsigned int i;
+
+       for (i = 0; i < mp->nfamilies; i++) {
+               family = &mp->families[i];
+               if (pin >= family->pin_base &&
+                   pin < family->pin_base + family->npins)
+                       return family;
+       }
+
+       pr_err("failed to find family for pin %u\n", pin);
+       return NULL;
+}
+
+static void __iomem *
+mrfld_get_bufcfg(struct mrfld_pinctrl *pinctrl, unsigned int pin)
+{
+       const struct mrfld_family *family;
+       unsigned int bufno;
+
+       family =  mrfld_get_family(pinctrl, pin);
+       if (!family)
+               return NULL;
+
+       bufno = pin_to_bufno(family, pin);
+
+       return family->regs + BUFCFG_OFFSET + bufno * 4;
+}
+
+static void
+mrfld_setup_families(void *base_addr,
+                    struct mrfld_family *families, unsigned int nfam)
+{
+       for (int i = 0; i < nfam; i++) {
+               struct mrfld_family *family = &families[i];
+
+               family->regs = base_addr +
+                              family->family_number * MRFLD_FAMILY_LEN;
+       }
+}
+
+static int mrfld_pinconfig_protected(unsigned int pin, u32 mask, u32 bits)
+{
+       struct mrfld_pinctrl *pinctrl;
+       struct udevice *dev;
+       void __iomem *bufcfg;
+       u32 v, value;
+       int ret;
+
+       ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &dev);
+       if (ret)
+               return ret;
+
+       pinctrl = dev_get_priv(dev);
+
+       bufcfg = mrfld_get_bufcfg(pinctrl, pin);
+       if (!bufcfg)
+               return -EINVAL;
+
+       value = readl(bufcfg);
+
+       v = (value & ~mask) | (bits & mask);
+
+       debug("scu: v: 0x%x p: 0x%x bits: %d, mask: %d bufcfg: 0x%p\n",
+             v, (u32)bufcfg, bits, mask, bufcfg);
+
+       ret = scu_ipc_raw_command(IPCMSG_INDIRECT_WRITE, 0, &v, 4,
+                                 NULL, 0, (u32)bufcfg, 0);
+       if (ret)
+               pr_err("Failed to set mode via SCU for pin %u (%d)\n",
+                      pin, ret);
+
+       return ret;
+}
+
+static int mrfld_pinctrl_cfg_pin(ofnode pin_node)
+{
+       bool is_protected;
+       int pad_offset;
+       int mode;
+       u32 mask;
+       int ret;
+
+       /* For now we only support just protected Family of pins */
+       is_protected = ofnode_read_bool(pin_node, "protected");
+       if (!is_protected)
+               return -ENOTSUPP;
+
+       pad_offset = ofnode_read_s32_default(pin_node, "pad-offset", -1);
+       if (pad_offset == -1)
+               return -EINVAL;
+
+       mode = ofnode_read_s32_default(pin_node, "mode-func", -1);
+       if (mode == -1)
+               return -EINVAL;
+
+       mask = MRFLD_PINMODE_MASK;
+
+       /* We don't support modes not in range 0..7 */
+       if (mode & ~mask)
+               return -ENOTSUPP;
+
+       ret = mrfld_pinconfig_protected(pad_offset, mask, mode);
+
+       return ret;
+}
+
+static int tangier_pinctrl_probe(struct udevice *dev)
+{
+       void *base_addr = syscon_get_first_range(X86_SYSCON_PINCONF);
+       struct mrfld_pinctrl *pinctrl = dev_get_priv(dev);
+       ofnode pin_node;
+       int ret;
+
+       mrfld_setup_families(base_addr, mrfld_families,
+                            ARRAY_SIZE(mrfld_families));
+
+       pinctrl->families = mrfld_families;
+       pinctrl->nfamilies = ARRAY_SIZE(mrfld_families);
+
+       ofnode_for_each_subnode(pin_node, dev_ofnode(dev)) {
+               ret = mrfld_pinctrl_cfg_pin(pin_node);
+               if (ret) {
+                       pr_err("%s: invalid configuration for the pin %ld\n",
+                              __func__, pin_node.of_offset);
+               }
+       }
+
+       return 0;
+}
+
+static const struct udevice_id tangier_pinctrl_match[] = {
+       { .compatible = "intel,pinctrl-tangier", .data = X86_SYSCON_PINCONF },
+       { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(tangier_pinctrl) = {
+       .name = "tangier_pinctrl",
+       .id = UCLASS_SYSCON,
+       .of_match = tangier_pinctrl_match,
+       .probe = tangier_pinctrl_probe,
+       .priv_auto_alloc_size = sizeof(struct mrfld_pinctrl),
+};
index 5c80f5c..ca8dfb4 100644 (file)
                compatible = "intel,reset-tangier";
                u-boot,dm-pre-reloc;
        };
+
+       pinctrl {
+               compatible = "intel,pinctrl-tangier";
+               reg = <0xff0c0000 0x8000>;
+
+               /*
+                * Initial configuration came from the firmware.
+                * Which quite likely has been used in the phones, where I2C #8,
+                * that is not part of Atom peripheral, is in use.
+                * Thus we need to override the leftover.
+                */
+               i2c6_scl@0 {
+                       pad-offset = <111>;
+                       mode-func = <1>;
+                       protected;
+               };
+               i2c6_sda@0 {
+                       pad-offset = <112>;
+                       mode-func = <1>;
+                       protected;
+               };
+       };
 };
index 3c35089..48193ba 100644 (file)
@@ -221,6 +221,16 @@ Device (PCI0)
         }
     }
 
+    Device (I2C6)
+    {
+        Name (_ADR, 0x00090001)
+
+        Method (_STA, 0, NotSerialized)
+        {
+            Return (STA_VISIBLE)
+        }
+    }
+
     Device (GPIO)
     {
         Name (_ADR, 0x000c0000)
index 7ce5824..f5ec5a1 100644 (file)
@@ -6,6 +6,8 @@
 #define _X86_ASM_SCU_IPC_H_
 
 /* IPC defines the following message types */
+#define IPCMSG_INDIRECT_READ   0x02
+#define IPCMSG_INDIRECT_WRITE  0x05
 #define IPCMSG_WARM_RESET      0xf0
 #define IPCMSG_COLD_RESET      0xf1
 #define IPCMSG_SOFT_RESET      0xf2
@@ -23,5 +25,7 @@ struct ipc_ifwi_version {
 /* Issue commands to the SCU with or without data */
 int scu_ipc_simple_command(u32 cmd, u32 sub);
 int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen);
+int scu_ipc_raw_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out,
+                       int outlen, u32 dptr, u32 sptr);
 
 #endif /* _X86_ASM_SCU_IPC_H_ */
index caa04c6..a6f8297 100644 (file)
@@ -102,6 +102,57 @@ static int scu_ipc_cmd(struct ipc_regs *regs, u32 cmd, u32 sub,
 }
 
 /**
+ * scu_ipc_raw_command() - IPC command with data and pointers
+ * @cmd:    IPC command code
+ * @sub:    IPC command sub type
+ * @in:     input data of this IPC command
+ * @inlen:  input data length in dwords
+ * @out:    output data of this IPC command
+ * @outlen: output data length in dwords
+ * @dptr:   data writing to SPTR register
+ * @sptr:   data writing to DPTR register
+ *
+ * Send an IPC command to SCU with input/output data and source/dest pointers.
+ *
+ * Return:  an IPC error code or 0 on success.
+ */
+int scu_ipc_raw_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out,
+                       int outlen, u32 dptr, u32 sptr)
+{
+       int inbuflen = DIV_ROUND_UP(inlen, 4);
+       struct udevice *dev;
+       struct scu *scu;
+       int ret;
+
+       ret = syscon_get_by_driver_data(X86_SYSCON_SCU, &dev);
+       if (ret)
+               return ret;
+
+       scu = dev_get_priv(dev);
+
+       /* Up to 16 bytes */
+       if (inbuflen > 4)
+               return -EINVAL;
+
+       writel(dptr, &scu->regs->dptr);
+       writel(sptr, &scu->regs->sptr);
+
+       /*
+        * SRAM controller doesn't support 8-bit writes, it only
+        * supports 32-bit writes, so we have to copy input data into
+        * the temporary buffer, and SCU FW will use the inlen to
+        * determine the actual input data length in the temporary
+        * buffer.
+        */
+
+       u32 inbuf[4] = {0};
+
+       memcpy(inbuf, in, inlen);
+
+       return scu_ipc_cmd(scu->regs, cmd, sub, inbuf, inlen, out, outlen);
+}
+
+/**
  * scu_ipc_simple_command() - send a simple command
  * @cmd: command
  * @sub: sub type
@@ -129,6 +180,17 @@ int scu_ipc_simple_command(u32 cmd, u32 sub)
        return scu_ipc_check_status(scu->regs);
 }
 
+/**
+ *  scu_ipc_command - command with data
+ *  @cmd: command
+ *  @sub: sub type
+ *  @in: input data
+ *  @inlen: input length in dwords
+ *  @out: output data
+ *  @outlen: output length in dwords
+ *
+ *  Issue a command to the SCU which involves data transfers.
+ */
 int scu_ipc_command(u32 cmd, u32 sub, u32 *in, int inlen, u32 *out, int outlen)
 {
        struct scu *scu;
index f0b027e..78c382d 100644 (file)
@@ -47,8 +47,6 @@
 /*-----------------------------------------------------------------------
  * Serial Configuration
  */
-#define CONFIG_SYS_BAUDRATE_TABLE      {300, 600, 1200, 2400, 4800, \
-                                        9600, 19200, 38400, 115200}
 #define CONFIG_SYS_NS16550_PORT_MAPPED
 
 /*-----------------------------------------------------------------------