85xx: Use common LSDMR defines from asm/fsl_lbc.h

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index e6025c8..c30d966 100644 (file)
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -372,21 +372,21 @@ sdram_init(void)
        cpu_board_rev = get_cpu_board_revision();
        lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
        if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_0) {
-               lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
+               lsdmr_common |= LSDMR_BSMA1617;
        } else if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_1) {
-               lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
+               lsdmr_common |= LSDMR_BSMA1516;
        } else {
                /*
                 * Assume something unable to identify itself is
                 * really old, and likely has lines 16/17 mapped.
                 */
-               lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
+               lsdmr_common |= LSDMR_BSMA1617;
        }
 
        /*
         * Issue PRECHARGE ALL command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -396,7 +396,7 @@ sdram_init(void)
         * Issue 8 AUTO REFRESH commands.
         */
        for (idx = 0; idx < 8; idx++) {
-               lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
+               lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
                asm("sync;msync");
                *sdram_addr = 0xff;
                ppcDcbf((unsigned long) sdram_addr);
@@ -406,7 +406,7 @@ sdram_init(void)
        /*
         * Issue 8 MODE-set command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -415,7 +415,7 @@ sdram_init(void)
        /*
         * Issue NORMAL OP command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);

diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 70320ea..efb2c5b 100644 (file)
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -185,12 +185,12 @@ sdram_init(void)
         */
        cpu_board_rev = get_cpu_board_revision();
        lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
-       lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
+       lsdmr_common |= LSDMR_BSMA1516;
 
        /*
         * Issue PRECHARGE ALL command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -200,7 +200,7 @@ sdram_init(void)
         * Issue 8 AUTO REFRESH commands.
         */
        for (idx = 0; idx < 8; idx++) {
-               lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
+               lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
                asm("sync;msync");
                *sdram_addr = 0xff;
                ppcDcbf((unsigned long) sdram_addr);
@@ -210,7 +210,7 @@ sdram_init(void)
        /*
         * Issue 8 MODE-set command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -219,7 +219,7 @@ sdram_init(void)
        /*
         * Issue NORMAL OP command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);

diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index 53d5a93..ecddd0d 100644 (file)
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -371,21 +371,21 @@ sdram_init(void)
        cpu_board_rev = get_cpu_board_revision();
        lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
        if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_0) {
-               lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
+               lsdmr_common |= LSDMR_BSMA1617;
        } else if (cpu_board_rev == MPC85XX_CPU_BOARD_REV_1_1) {
-               lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
+               lsdmr_common |= LSDMR_BSMA1516;
        } else {
                /*
                 * Assume something unable to identify itself is
                 * really old, and likely has lines 16/17 mapped.
                 */
-               lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1617;
+               lsdmr_common |= LSDMR_BSMA1617;
        }
 
        /*
         * Issue PRECHARGE ALL command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -395,7 +395,7 @@ sdram_init(void)
         * Issue 8 AUTO REFRESH commands.
         */
        for (idx = 0; idx < 8; idx++) {
-               lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
+               lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
                asm("sync;msync");
                *sdram_addr = 0xff;
                ppcDcbf((unsigned long) sdram_addr);
@@ -405,7 +405,7 @@ sdram_init(void)
        /*
         * Issue 8 MODE-set command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -414,7 +414,7 @@ sdram_init(void)
        /*
         * Issue NORMAL OP command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);

diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c
index ac7778e..2bca0f2 100644 (file)
--- a/board/freescale/mpc8560ads/mpc8560ads.c
+++ b/board/freescale/mpc8560ads/mpc8560ads.c
@@ -36,6 +36,7 @@
 #include <miiphy.h>
 #include <libfdt.h>
 #include <fdt_support.h>
+#include <asm/fsl_lbc.h>
 
 #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
 extern void ddr_enable_ecc(unsigned int dram_size);

diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index 915fae7..97f4651 100644 (file)
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -243,12 +243,12 @@ sdram_init(void)
         * MPC8568 uses "new" 15-16 style addressing.
         */
        lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
-       lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
+       lsdmr_common |= LSDMR_BSMA1516;
 
        /*
         * Issue PRECHARGE ALL command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -258,7 +258,7 @@ sdram_init(void)
         * Issue 8 AUTO REFRESH commands.
         */
        for (idx = 0; idx < 8; idx++) {
-               lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
+               lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
                asm("sync;msync");
                *sdram_addr = 0xff;
                ppcDcbf((unsigned long) sdram_addr);
@@ -268,7 +268,7 @@ sdram_init(void)
        /*
         * Issue 8 MODE-set command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -277,7 +277,7 @@ sdram_init(void)
        /*
         * Issue NORMAL OP command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);

diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index a779420..088f804 100644 (file)
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -184,12 +184,12 @@ sdram_init(void)
         * MPC8548 uses "new" 15-16 style addressing.
         */
        lsdmr_common = CONFIG_SYS_LBC_LSDMR_COMMON;
-       lsdmr_common |= CONFIG_SYS_LBC_LSDMR_BSMA1516;
+       lsdmr_common |= LSDMR_BSMA1516;
 
        /*
         * Issue PRECHARGE ALL command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_PCHALL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_PCHALL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -199,7 +199,7 @@ sdram_init(void)
         * Issue 8 AUTO REFRESH commands.
         */
        for (idx = 0; idx < 8; idx++) {
-               lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH;
+               lbc->lsdmr = lsdmr_common | LSDMR_OP_ARFRSH;
                asm("sync;msync");
                *sdram_addr = 0xff;
                ppcDcbf((unsigned long) sdram_addr);
@@ -209,7 +209,7 @@ sdram_init(void)
        /*
         * Issue 8 MODE-set command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_MRW;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_MRW;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);
@@ -218,7 +218,7 @@ sdram_init(void)
        /*
         * Issue NORMAL OP command.
         */
-       lbc->lsdmr = lsdmr_common | CONFIG_SYS_LBC_LSDMR_OP_NORMAL;
+       lbc->lsdmr = lsdmr_common | LSDMR_OP_NORMAL;
        asm("sync;msync");
        *sdram_addr = 0xff;
        ppcDcbf((unsigned long) sdram_addr);

diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 4aaad55..5253611 100644 (file)
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -197,57 +197,24 @@
 #define CONFIG_SYS_LBC_LSRT            0x20000000    /* LB sdram refresh timer */
 #define CONFIG_SYS_LBC_MRTPR           0x20000000    /* LB refresh timer prescal*/
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR5     (3 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW3  (3 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC2      (2 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_BUFCMD    (1 << (31 - 29))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_BSMA1516 \
-                               | CONFIG_SYS_LBC_LSDMR_RFCR5            \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT3        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC2             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
-                               | CONFIG_SYS_LBC_LSDMR_RFEN             \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_BSMA1516        \
+                               | LSDMR_RFCR5           \
+                               | LSDMR_PRETOACT3       \
+                               | LSDMR_ACTTORW3        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC2            \
+                               | LSDMR_CL3             \
+                               | LSDMR_RFEN            \
                                )
 
 /*
  * SDRAM Controller configuration sequence.
  */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
+#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
+#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
+#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
 
 
 /*

diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index fa82fbc..813512c 100644 (file)
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -207,41 +207,18 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_LBC_MRTPR           0x00000000  /* LB refresh timer prescal*/
 
 /*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-/*
  * Common settings for all Local Bus SDRAM commands.
  * At run time, either BSMA1516 (for CPU 1.1)
  *                  or BSMA1617 (for CPU 1.0) (old)
  * is OR'ed in too.
  */
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFCR16           \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT7        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC4             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
-                               | CONFIG_SYS_LBC_LSDMR_RFEN             \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFCR16          \
+                               | LSDMR_PRETOACT7       \
+                               | LSDMR_ACTTORW7        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC4            \
+                               | LSDMR_CL3             \
+                               | LSDMR_RFEN            \
                                )
 
 /*

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 95bce95..7089ac7 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -229,41 +229,18 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_LBC_MRTPR           0x00000000      /* LB refresh timer prescal*/
 
 /*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-/*
  * Common settings for all Local Bus SDRAM commands.
  * At run time, either BSMA1516 (for CPU 1.1)
  *                 or BSMA1617 (for CPU 1.0) (old)
  * is OR'ed in too.
  */
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFCR16           \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT7        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC4             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
-                               | CONFIG_SYS_LBC_LSDMR_RFEN             \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFCR16          \
+                               | LSDMR_PRETOACT7       \
+                               | LSDMR_ACTTORW7        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC4            \
+                               | LSDMR_CL3             \
+                               | LSDMR_RFEN            \
                                )
 
 /*

diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 6bf0961..ef95118 100644 (file)
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -205,41 +205,18 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_LBC_MRTPR           0x00000000  /* LB refresh timer prescal*/
 
 /*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-/*
  * Common settings for all Local Bus SDRAM commands.
  * At run time, either BSMA1516 (for CPU 1.1)
  *                  or BSMA1617 (for CPU 1.0) (old)
  * is OR'ed in too.
  */
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFCR16           \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT7        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC4             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
-                               | CONFIG_SYS_LBC_LSDMR_RFEN             \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFCR16          \
+                               | LSDMR_PRETOACT7       \
+                               | LSDMR_ACTTORW7        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC4            \
+                               | LSDMR_CL3             \
+                               | LSDMR_RFEN            \
                                )
 
 /*

diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index a41f50a..761a370 100644 (file)
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -193,57 +193,24 @@
 #define CONFIG_SYS_LBC_LSRT            0x20000000    /* LB sdram refresh timer */
 #define CONFIG_SYS_LBC_MRTPR           0x20000000    /* LB refresh timer prescal*/
 
-/*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR5     (3 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT3 (3 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW3  (3 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC2      (2 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_BUFCMD    (1 << (31 - 29))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_BSMA1516 \
-                               | CONFIG_SYS_LBC_LSDMR_RFCR5            \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT3        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW3 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC2             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
-                               | CONFIG_SYS_LBC_LSDMR_RFEN             \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_BSMA1516        \
+                               | LSDMR_RFCR5           \
+                               | LSDMR_PRETOACT3       \
+                               | LSDMR_ACTTORW3        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC2            \
+                               | LSDMR_CL3             \
+                               | LSDMR_RFEN            \
                                )
 
 /*
  * SDRAM Controller configuration sequence.
  */
-#define CONFIG_SYS_LBC_LSDMR_1         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_PCHALL)
-#define CONFIG_SYS_LBC_LSDMR_2         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_3         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_ARFRSH)
-#define CONFIG_SYS_LBC_LSDMR_4         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_MRW)
-#define CONFIG_SYS_LBC_LSDMR_5         ( CONFIG_SYS_LBC_LSDMR_COMMON \
-                               | CONFIG_SYS_LBC_LSDMR_OP_NORMAL)
+#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL)
+#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH)
+#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW)
+#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL)
 
 
 /*

diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 58ff52b..77224d9 100644 (file)
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -188,41 +188,18 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_LBC_MRTPR           0x00000000      /* LB refresh timer prescal*/
 
 /*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-/*
  * Common settings for all Local Bus SDRAM commands.
  * At run time, either BSMA1516 (for CPU 1.1)
  *                  or BSMA1617 (for CPU 1.0) (old)
  * is OR'ed in too.
  */
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFCR16           \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT7        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC4             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
-                               | CONFIG_SYS_LBC_LSDMR_RFEN             \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFCR16          \
+                               | LSDMR_PRETOACT7       \
+                               | LSDMR_ACTTORW7        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC4            \
+                               | LSDMR_CL3             \
+                               | LSDMR_RFEN            \
                                )
 
 /*

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 8141a46..a2ff955 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -242,41 +242,18 @@
 #define CONFIG_SYS_LBC_MRTPR           0x00000000  /* LB refresh timer prescal*/
 
 /*
- * LSDMR masks
- */
-#define CONFIG_SYS_LBC_LSDMR_RFEN      (1 << (31 -  1))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1516  (3 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_BSMA1617  (4 << (31 - 10))
-#define CONFIG_SYS_LBC_LSDMR_RFCR16    (7 << (31 - 16))
-#define CONFIG_SYS_LBC_LSDMR_PRETOACT7 (7 << (31 - 19))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW7  (7 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_ACTTORW6  (6 << (31 - 22))
-#define CONFIG_SYS_LBC_LSDMR_BL8       (1 << (31 - 23))
-#define CONFIG_SYS_LBC_LSDMR_WRC4      (0 << (31 - 27))
-#define CONFIG_SYS_LBC_LSDMR_CL3       (3 << (31 - 31))
-
-#define CONFIG_SYS_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_MRW    (3 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PRECH  (4 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
-#define CONFIG_SYS_LBC_LSDMR_OP_RWINV  (7 << (31 - 4))
-
-/*
  * Common settings for all Local Bus SDRAM commands.
  * At run time, either BSMA1516 (for CPU 1.1)
  *                  or BSMA1617 (for CPU 1.0) (old)
  * is OR'ed in too.
  */
-#define CONFIG_SYS_LBC_LSDMR_COMMON    ( CONFIG_SYS_LBC_LSDMR_RFCR16           \
-                               | CONFIG_SYS_LBC_LSDMR_PRETOACT7        \
-                               | CONFIG_SYS_LBC_LSDMR_ACTTORW7 \
-                               | CONFIG_SYS_LBC_LSDMR_BL8              \
-                               | CONFIG_SYS_LBC_LSDMR_WRC4             \
-                               | CONFIG_SYS_LBC_LSDMR_CL3              \
-                               | CONFIG_SYS_LBC_LSDMR_RFEN             \
+#define CONFIG_SYS_LBC_LSDMR_COMMON    ( LSDMR_RFCR16          \
+                               | LSDMR_PRETOACT7       \
+                               | LSDMR_ACTTORW7        \
+                               | LSDMR_BL8             \
+                               | LSDMR_WRC4            \
+                               | LSDMR_CL3             \
+                               | LSDMR_RFEN            \
                                )
 
 #define CONFIG_SYS_INIT_RAM_LOCK       1