mtd: nand: omap: remove unused #defines from common omap_gpmc.h
authorpekon gupta <pekon@ti.com>
Fri, 22 Nov 2013 11:23:27 +0000 (16:53 +0530)
committerScott Wood <scottwood@freescale.com>
Tue, 4 Mar 2014 23:23:54 +0000 (17:23 -0600)
OMAP NAND driver can detect Page-size and OOB-size of NAND device from ONFI
params or nand_id[] table. And based on that it defines ECC layout.
This patch
1) removes following board configs used for defining NAND ECC layout
- GPMC_NAND_ECC_LP_x16_LAYOUT (for large page x16 NAND)
- GPMC_NAND_ECC_LP_x8_LAYOUT  (for large page x8 NAND)
- GPMC_NAND_ECC_SP_x16_LAYOUT (for small page x16 NAND)
- GPMC_NAND_ECC_SP_x8_LAYOUT  (for small page x8 NAND)

2) removes unused #defines in common omap_gpmc.h depending on above configs

Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5

Signed-off-by: Pekon Gupta <pekon@ti.com>
19 files changed:
arch/arm/include/asm/omap_gpmc.h
include/configs/am335x_evm.h
include/configs/am335x_igep0033.h
include/configs/am3517_crane.h
include/configs/am3517_evm.h
include/configs/cm_t35.h
include/configs/devkit8000.h
include/configs/dig297.h
include/configs/mcx.h
include/configs/omap3_beagle.h
include/configs/omap3_evm_common.h
include/configs/omap3_igep00x0.h
include/configs/omap3_logic.h
include/configs/omap3_overo.h
include/configs/omap3_pandora.h
include/configs/omap3_zoom1.h
include/configs/siemens-am33x-common.h
include/configs/tam3517-common.h
include/configs/tricorder.h

index 5250109..3caaed8 100644 (file)
 #define GPMC_BUF_EMPTY 0
 #define GPMC_BUF_FULL  1
 
-/* Generic ECC Layouts */
-/* Large Page x8 NAND device Layout */
-#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 12,\
-       .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
-               9, 10, 11, 12},\
-       .oobfree = {\
-               {.offset = 13,\
-                .length = 51 } } \
-}
-#endif
-
-/* Large Page x16 NAND device Layout */
-#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 12,\
-       .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
-               10, 11, 12, 13},\
-       .oobfree = {\
-               {.offset = 14,\
-                .length = 50 } } \
-}
-#endif
-
-/* Small Page x8 NAND device Layout */
-#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 3,\
-       .eccpos = {1, 2, 3},\
-       .oobfree = {\
-               {.offset = 4,\
-                .length = 12 } } \
-}
-#endif
-
-/* Small Page x16 NAND device Layout */
-#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
-#define GPMC_NAND_HW_ECC_LAYOUT {\
-       .eccbytes = 3,\
-       .eccpos = {2, 3, 4},\
-       .oobfree = {\
-               {.offset = 5,\
-                .length = 11 } } \
-}
-#endif
-
 enum omap_ecc {
        /* 1-bit  ECC calculation by Software, Error detection by Software */
        OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
index 59a8f36..a5736b7 100644 (file)
 /* NAND support */
 #ifdef CONFIG_NAND
 #define CONFIG_CMD_NAND
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
 #define MTDIDS_DEFAULT                 "nand0=omap2-nand.0"
 #define MTDPARTS_DEFAULT               "mtdparts=omap2-nand.0:128k(SPL)," \
index 115d1b3..c00d54f 100644 (file)
 #define CONFIG_NAND
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_NAND_OMAP_ELM
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_SYS_NAND_BASE           (0x08000000)    /* phys address CS0 */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_ONFI_DETECTION 1
index 468fb43..4407b45 100644 (file)
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_IS_IN_NAND          1
 #define SMNAND_ENV_OFFSET              0x260000 /* environment starts here */
 
index b8b99c8..0102ff5 100644 (file)
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_IS_IN_NAND          1
 #define SMNAND_ENV_OFFSET              0x260000 /* environment starts here */
 
index 08c67f5..cfc4f9b 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x8_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 /* Environment information */
index 4f43ba9..16a00eb 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 #define CONFIG_JFFS2_NAND
index 5049afc..af6f56b 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
 
 #if defined(CONFIG_CMD_NET)
index 7c5c2f4..47244c0 100644 (file)
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_IS_IN_NAND
 #define SMNAND_ENV_OFFSET              0x180000 /* environment starts here */
 
index c58bc91..ac0ed43 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 
index 43616e2..7f3424b 100644 (file)
 #define CONFIG_SYS_FLASH_BASE          PISMO1_NAND_BASE
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_OFFSET              SMNAND_ENV_OFFSET
 #elif defined(CONFIG_CMD_ONENAND)
 #define CONFIG_SYS_FLASH_BASE          PISMO1_ONEN_BASE
index 20fbbec..12d8141 100644 (file)
 
 #ifdef CONFIG_NAND
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M /* Configure the PISMO */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_OFFSET              0x260000 /* environment starts here */
 #define CONFIG_ENV_IS_IN_NAND          1
 #define CONFIG_ENV_SIZE                        (512 << 10) /* Total Size Environment */
index bedd6f9..0d03c75 100644 (file)
 
 #if defined(CONFIG_CMD_NAND)
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET              SMNAND_ENV_OFFSET
 #endif
index e0f0262..007e27f 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand */
                                                        /* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND */
                                                /* devices */
 #define CONFIG_JFFS2_NAND
index eacdfaa..da67787 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand */
                                                        /* at CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1       /* Max number of NAND */
                                                /* devices */
 
index 1dd53fa..f0fa96e 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 #define CONFIG_JFFS2_NAND
index 2863042..98b6e72 100644 (file)
 
 #define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_NAND_OMAP_ELM
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
 #define CONFIG_SYS_NAND_BASE           (0x08000000)    /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
index d44b5c0..3522c1a 100644 (file)
 #define PISMO1_NAND_SIZE               GPMC_SIZE_128M
 
 #define CONFIG_NAND_OMAP_GPMC
-#define GPMC_NAND_ECC_LP_x16_LAYOUT
 #define CONFIG_ENV_IS_IN_NAND
 #define SMNAND_ENV_OFFSET              0x180000 /* environment starts here */
 
index cc4001f..62f97d2 100644 (file)
 #define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
                                                        /* to access nand at */
                                                        /* CS0 */
-#define GPMC_NAND_ECC_LP_x16_LAYOUT    1
-
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
 #define CONFIG_BCH