Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)

diff --cc arch/arm/Kconfig
Simple merge

diff --cc configs/octeontx2_95xx_defconfig
index 0000000,6aeb12c..047cb45
mode 000000,100644..100644
--- /dev/null
--- 2/configs/octeontx2_95xx_defconfig
+++ b/configs/octeontx2_95xx_defconfig
@@@ -1,0 -1,105 +1,105 @@@
 -CONFIG_NET_OCTEONTX2=y
+ CONFIG_ARM=y
+ # CONFIG_ARM64_SUPPORT_AARCH32 is not set
+ CONFIG_ARCH_OCTEONTX2=y
+ CONFIG_SYS_TEXT_BASE=0x04000000
+ CONFIG_SYS_MALLOC_F_LEN=0x4000
+ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_ENV_SIZE=0x8000
+ CONFIG_ENV_OFFSET=0xF00000
+ CONFIG_ENV_SECT_SIZE=0x10000
+ CONFIG_TARGET_OCTEONTX2_95XX=y
+ CONFIG_DM_GPIO=y
+ CONFIG_DEBUG_UART_BASE=0x87e028000000
+ CONFIG_DEBUG_UART_CLOCK=24000000
+ CONFIG_DEBUG_UART=y
+ CONFIG_FIT=y
+ CONFIG_FIT_SIGNATURE=y
+ CONFIG_OF_BOARD_SETUP=y
+ CONFIG_BOOTDELAY=5
+ CONFIG_USE_BOOTARGS=y
+ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=6 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
+ CONFIG_VERSION_VARIABLE=y
+ # CONFIG_DISPLAY_CPUINFO is not set
+ CONFIG_BOARD_EARLY_INIT_R=y
+ CONFIG_HUSH_PARSER=y
+ CONFIG_SYS_PROMPT="Marvell> "
+ # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+ CONFIG_CMD_MD5SUM=y
+ CONFIG_MD5SUM_VERIFY=y
+ CONFIG_CMD_MX_CYCLIC=y
+ CONFIG_CMD_MEMTEST=y
+ CONFIG_SYS_MEMTEST_START=0x04000000
+ CONFIG_SYS_MEMTEST_END=0x040f0000
+ CONFIG_CMD_SHA1SUM=y
+ CONFIG_SHA1SUM_VERIFY=y
+ CONFIG_CMD_DM=y
+ # CONFIG_CMD_FLASH is not set
+ CONFIG_CMD_GPIO=y
+ CONFIG_CMD_I2C=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_BKOPS_ENABLE=y
+ CONFIG_CMD_PART=y
+ CONFIG_CMD_PCI=y
+ CONFIG_CMD_SF_TEST=y
+ CONFIG_CMD_DHCP=y
+ CONFIG_CMD_TFTPPUT=y
+ CONFIG_CMD_TFTPSRV=y
+ CONFIG_CMD_RARP=y
+ CONFIG_CMD_MII=y
+ CONFIG_CMD_PING=y
+ CONFIG_CMD_CDP=y
+ CONFIG_CMD_SNTP=y
+ CONFIG_CMD_DNS=y
+ CONFIG_CMD_LINK_LOCAL=y
+ CONFIG_CMD_PXE=y
+ CONFIG_CMD_TIME=y
+ CONFIG_CMD_EXT2=y
+ CONFIG_CMD_EXT4=y
+ CONFIG_CMD_EXT4_WRITE=y
+ CONFIG_CMD_FAT=y
+ CONFIG_CMD_FS_GENERIC=y
+ CONFIG_EFI_PARTITION=y
+ CONFIG_PARTITION_TYPE_GUID=y
+ CONFIG_OF_BOARD=y
+ CONFIG_ENV_IS_IN_SPI_FLASH=y
+ CONFIG_USE_ENV_SPI_BUS=y
+ CONFIG_ENV_SPI_BUS=0
+ CONFIG_USE_ENV_SPI_CS=y
+ CONFIG_ENV_SPI_CS=0
+ CONFIG_USE_ENV_SPI_MAX_HZ=y
+ CONFIG_ENV_SPI_MAX_HZ=125000000
+ CONFIG_USE_ENV_SPI_MODE=y
+ CONFIG_ENV_SPI_MODE=0x0
+ CONFIG_NET_RANDOM_ETHADDR=y
+ CONFIG_DM_I2C=y
+ CONFIG_MISC=y
+ CONFIG_DM_MMC=y
+ CONFIG_MMC_HS400_SUPPORT=y
+ CONFIG_MMC_OCTEONTX=y
+ CONFIG_MTD=y
+ CONFIG_DM_SPI_FLASH=y
+ CONFIG_SF_DEFAULT_MODE=0x0
+ CONFIG_SF_DEFAULT_SPEED=125000000
+ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+ CONFIG_SPI_FLASH_MACRONIX=y
+ CONFIG_SPI_FLASH_SPANSION=y
+ CONFIG_SPI_FLASH_STMICRO=y
+ CONFIG_DM_ETH=y
+ CONFIG_PCI=y
+ CONFIG_DM_PCI=y
+ CONFIG_DM_PCI_COMPAT=y
+ CONFIG_PCI_REGION_MULTI_ENTRY=y
+ CONFIG_PCI_SRIOV=y
+ CONFIG_PCI_ARID=y
+ CONFIG_PCI_OCTEONTX=y
+ CONFIG_DM_REGULATOR=y
+ CONFIG_DM_REGULATOR_FIXED=y
+ CONFIG_DM_REGULATOR_GPIO=y
+ CONFIG_DM_RTC=y
+ CONFIG_DM_SERIAL=y
+ CONFIG_DEBUG_UART_SKIP_INIT=y
+ CONFIG_PL01X_SERIAL=y
+ CONFIG_SPI=y
+ CONFIG_DM_SPI=y
+ CONFIG_WDT=y
+ CONFIG_ERRNO_STR=y

diff --cc configs/octeontx2_96xx_defconfig
index 0000000,05cc133..b48733b
mode 000000,100644..100644
--- /dev/null
--- 2/configs/octeontx2_96xx_defconfig
+++ b/configs/octeontx2_96xx_defconfig
@@@ -1,0 -1,131 +1,131 @@@
 -CONFIG_NET_OCTEONTX2=y
+ CONFIG_ARM=y
+ # CONFIG_ARM64_SUPPORT_AARCH32 is not set
+ CONFIG_ARCH_OCTEONTX2=y
+ CONFIG_SYS_TEXT_BASE=0x04000000
+ CONFIG_SYS_MALLOC_F_LEN=0x4000
+ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_ENV_SIZE=0x8000
+ CONFIG_ENV_OFFSET=0xF00000
+ CONFIG_ENV_SECT_SIZE=0x10000
+ CONFIG_TARGET_OCTEONTX2_96XX=y
+ CONFIG_DM_GPIO=y
+ CONFIG_DEBUG_UART_BASE=0x87e028000000
+ CONFIG_DEBUG_UART_CLOCK=24000000
+ CONFIG_DEBUG_UART=y
+ CONFIG_AHCI=y
+ # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+ CONFIG_FIT=y
+ CONFIG_FIT_SIGNATURE=y
+ CONFIG_OF_BOARD_SETUP=y
+ CONFIG_BOOTDELAY=5
+ CONFIG_USE_BOOTARGS=y
+ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
+ CONFIG_VERSION_VARIABLE=y
+ # CONFIG_DISPLAY_CPUINFO is not set
+ CONFIG_BOARD_EARLY_INIT_R=y
+ CONFIG_HUSH_PARSER=y
+ CONFIG_SYS_PROMPT="Marvell> "
+ # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+ CONFIG_CMD_MD5SUM=y
+ CONFIG_MD5SUM_VERIFY=y
+ CONFIG_CMD_MX_CYCLIC=y
+ CONFIG_CMD_MEMTEST=y
+ CONFIG_CMD_SHA1SUM=y
+ CONFIG_SHA1SUM_VERIFY=y
+ CONFIG_CMD_DM=y
+ # CONFIG_CMD_FLASH is not set
+ CONFIG_CMD_GPIO=y
+ CONFIG_CMD_I2C=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_BKOPS_ENABLE=y
+ CONFIG_CMD_PART=y
+ CONFIG_CMD_PCI=y
+ CONFIG_CMD_SF_TEST=y
+ CONFIG_CMD_USB=y
+ CONFIG_CMD_DHCP=y
+ CONFIG_CMD_TFTPPUT=y
+ CONFIG_CMD_TFTPSRV=y
+ CONFIG_CMD_RARP=y
+ CONFIG_CMD_MII=y
+ CONFIG_CMD_PING=y
+ CONFIG_CMD_CDP=y
+ CONFIG_CMD_SNTP=y
+ CONFIG_CMD_DNS=y
+ CONFIG_CMD_LINK_LOCAL=y
+ CONFIG_CMD_PXE=y
+ CONFIG_CMD_TIME=y
+ CONFIG_CMD_EXT2=y
+ CONFIG_CMD_EXT4=y
+ CONFIG_CMD_EXT4_WRITE=y
+ CONFIG_CMD_FAT=y
+ CONFIG_CMD_FS_GENERIC=y
+ CONFIG_EFI_PARTITION=y
+ CONFIG_PARTITION_TYPE_GUID=y
+ CONFIG_OF_BOARD=y
+ CONFIG_ENV_IS_IN_SPI_FLASH=y
+ CONFIG_USE_ENV_SPI_BUS=y
+ CONFIG_ENV_SPI_BUS=0
+ CONFIG_USE_ENV_SPI_CS=y
+ CONFIG_ENV_SPI_CS=0
+ CONFIG_USE_ENV_SPI_MAX_HZ=y
+ CONFIG_ENV_SPI_MAX_HZ=125000000
+ CONFIG_USE_ENV_SPI_MODE=y
+ CONFIG_ENV_SPI_MODE=0x0
+ CONFIG_NET_RANDOM_ETHADDR=y
+ CONFIG_SCSI_AHCI=y
+ CONFIG_AHCI_PCI=y
+ CONFIG_DM_I2C=y
+ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+ CONFIG_I2C_MUX=y
+ CONFIG_I2C_MUX_PCA954x=y
+ CONFIG_MISC=y
+ CONFIG_DM_MMC=y
+ CONFIG_MMC_HS400_SUPPORT=y
+ CONFIG_MMC_OCTEONTX=y
+ CONFIG_MTD=y
+ CONFIG_DM_SPI_FLASH=y
+ CONFIG_SF_DEFAULT_MODE=0x0
+ CONFIG_SF_DEFAULT_SPEED=125000000
+ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+ CONFIG_SPI_FLASH_MACRONIX=y
+ CONFIG_SPI_FLASH_SPANSION=y
+ CONFIG_SPI_FLASH_STMICRO=y
+ CONFIG_SPI_FLASH_WINBOND=y
+ CONFIG_PHYLIB=y
+ CONFIG_PHY_MARVELL=y
+ CONFIG_PHY_VITESSE=y
+ CONFIG_DM_ETH=y
+ CONFIG_E1000=y
+ CONFIG_E1000_SPI=y
+ CONFIG_CMD_E1000=y
+ CONFIG_NVME=y
+ CONFIG_PCI=y
+ CONFIG_DM_PCI=y
+ CONFIG_DM_PCI_COMPAT=y
+ CONFIG_PCI_REGION_MULTI_ENTRY=y
+ CONFIG_PCI_SRIOV=y
+ CONFIG_PCI_ARID=y
+ CONFIG_PCI_OCTEONTX=y
+ CONFIG_DM_REGULATOR=y
+ CONFIG_DM_REGULATOR_FIXED=y
+ CONFIG_DM_REGULATOR_GPIO=y
+ CONFIG_DM_RTC=y
+ CONFIG_SCSI=y
+ CONFIG_DM_SCSI=y
+ CONFIG_DM_SERIAL=y
+ CONFIG_DEBUG_UART_SKIP_INIT=y
+ CONFIG_PL01X_SERIAL=y
+ CONFIG_SPI=y
+ CONFIG_DM_SPI=y
+ CONFIG_OCTEON_SPI=y
+ CONFIG_USB=y
+ CONFIG_DM_USB=y
+ CONFIG_USB_XHCI_HCD=y
+ CONFIG_USB_XHCI_PCI=y
+ CONFIG_USB_STORAGE=y
+ CONFIG_USB_HOST_ETHER=y
+ CONFIG_USB_ETHER_ASIX=y
+ CONFIG_USB_ETHER_ASIX88179=y
+ CONFIG_USB_ETHER_RTL8152=y
+ CONFIG_WDT=y
+ CONFIG_ERRNO_STR=y

diff --cc configs/octeontx_81xx_defconfig
index 0000000,00df574..ca3286b
mode 000000,100644..100644
--- /dev/null
--- 2/configs/octeontx_81xx_defconfig
+++ b/configs/octeontx_81xx_defconfig
@@@ -1,0 -1,130 +1,131 @@@
+ CONFIG_ARM=y
+ # CONFIG_ARM64_SUPPORT_AARCH32 is not set
+ CONFIG_ARCH_OCTEONTX=y
+ CONFIG_SYS_TEXT_BASE=0x2800000
+ CONFIG_SYS_MALLOC_F_LEN=0x4000
+ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_ENV_SIZE=0x8000
+ CONFIG_ENV_OFFSET=0xF00000
+ CONFIG_ENV_SECT_SIZE=0x10000
+ CONFIG_TARGET_OCTEONTX_81XX=y
+ CONFIG_DM_GPIO=y
+ CONFIG_DEBUG_UART_BASE=0x87e028000000
+ CONFIG_DEBUG_UART_CLOCK=24000000
+ CONFIG_DEBUG_UART=y
+ CONFIG_AHCI=y
+ CONFIG_FIT=y
+ CONFIG_FIT_SIGNATURE=y
+ CONFIG_OF_BOARD_SETUP=y
+ CONFIG_BOOTDELAY=5
+ CONFIG_USE_BOOTARGS=y
+ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=4 rootwait rw root=/dev/sda2 coherent_pool=16M"
+ CONFIG_VERSION_VARIABLE=y
+ # CONFIG_DISPLAY_CPUINFO is not set
+ CONFIG_BOARD_EARLY_INIT_R=y
+ CONFIG_HUSH_PARSER=y
+ CONFIG_SYS_PROMPT="Marvell> "
+ # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+ CONFIG_CMD_MD5SUM=y
+ CONFIG_MD5SUM_VERIFY=y
+ CONFIG_CMD_MX_CYCLIC=y
+ CONFIG_CMD_MEMTEST=y
+ CONFIG_SYS_MEMTEST_START=0x2800000
+ CONFIG_SYS_MEMTEST_END=0x28f0000
+ CONFIG_CMD_SHA1SUM=y
+ CONFIG_SHA1SUM_VERIFY=y
+ CONFIG_CMD_DM=y
+ # CONFIG_CMD_FLASH is not set
+ CONFIG_CMD_GPIO=y
+ CONFIG_CMD_I2C=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_BKOPS_ENABLE=y
+ CONFIG_CMD_PART=y
+ CONFIG_CMD_PCI=y
+ CONFIG_CMD_SF_TEST=y
+ CONFIG_CMD_USB=y
+ CONFIG_CMD_DHCP=y
+ CONFIG_CMD_TFTPPUT=y
+ CONFIG_CMD_TFTPSRV=y
+ CONFIG_CMD_RARP=y
+ CONFIG_CMD_MII=y
+ CONFIG_CMD_PING=y
+ CONFIG_CMD_CDP=y
+ CONFIG_CMD_SNTP=y
+ CONFIG_CMD_DNS=y
+ CONFIG_CMD_LINK_LOCAL=y
+ CONFIG_CMD_PXE=y
+ CONFIG_CMD_TIME=y
+ CONFIG_CMD_EXT2=y
+ CONFIG_CMD_EXT4=y
+ CONFIG_CMD_EXT4_WRITE=y
+ CONFIG_CMD_FAT=y
+ CONFIG_CMD_FS_GENERIC=y
+ CONFIG_EFI_PARTITION=y
+ CONFIG_PARTITION_TYPE_GUID=y
+ CONFIG_OF_BOARD=y
+ CONFIG_ENV_IS_IN_SPI_FLASH=y
+ CONFIG_USE_ENV_SPI_BUS=y
+ CONFIG_ENV_SPI_BUS=0
+ CONFIG_USE_ENV_SPI_CS=y
+ CONFIG_ENV_SPI_CS=0
+ CONFIG_USE_ENV_SPI_MAX_HZ=y
+ CONFIG_ENV_SPI_MAX_HZ=16000000
+ CONFIG_USE_ENV_SPI_MODE=y
+ CONFIG_ENV_SPI_MODE=0x0
+ CONFIG_NET_RANDOM_ETHADDR=y
+ CONFIG_SCSI_AHCI=y
+ CONFIG_AHCI_PCI=y
+ CONFIG_DM_I2C=y
+ CONFIG_MISC=y
+ CONFIG_DM_MMC=y
+ CONFIG_MMC_OCTEONTX=y
+ CONFIG_MTD=y
+ CONFIG_DM_SPI_FLASH=y
+ CONFIG_SF_DEFAULT_MODE=0x0
+ CONFIG_SF_DEFAULT_SPEED=16000000
+ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+ CONFIG_SPI_FLASH_MACRONIX=y
+ CONFIG_SPI_FLASH_SPANSION=y
+ CONFIG_SPI_FLASH_STMICRO=y
+ CONFIG_SPI_FLASH_WINBOND=y
+ CONFIG_PHYLIB=y
+ CONFIG_PHY_AQUANTIA=y
+ CONFIG_PHY_BROADCOM=y
+ CONFIG_PHY_MARVELL=y
+ CONFIG_PHY_MICREL=y
+ CONFIG_PHY_REALTEK=y
+ CONFIG_PHY_VITESSE=y
+ CONFIG_DM_ETH=y
+ CONFIG_E1000=y
+ CONFIG_E1000_SPI=y
+ CONFIG_CMD_E1000=y
+ CONFIG_NVME=y
+ CONFIG_PCI=y
+ CONFIG_DM_PCI=y
+ CONFIG_DM_PCI_COMPAT=y
+ CONFIG_PCI_REGION_MULTI_ENTRY=y
+ CONFIG_PCI_SRIOV=y
+ CONFIG_PCI_ARID=y
+ CONFIG_PCI_OCTEONTX=y
+ CONFIG_DM_REGULATOR=y
+ CONFIG_DM_REGULATOR_FIXED=y
+ CONFIG_DM_REGULATOR_GPIO=y
+ CONFIG_DM_RTC=y
+ CONFIG_SCSI=y
+ CONFIG_DM_SCSI=y
+ CONFIG_DM_SERIAL=y
+ CONFIG_DEBUG_UART_SKIP_INIT=y
+ CONFIG_PL01X_SERIAL=y
+ CONFIG_SPI=y
+ CONFIG_DM_SPI=y
+ CONFIG_USB=y
+ CONFIG_DM_USB=y
+ CONFIG_USB_XHCI_HCD=y
+ CONFIG_USB_XHCI_PCI=y
+ CONFIG_USB_STORAGE=y
+ CONFIG_USB_HOST_ETHER=y
+ CONFIG_USB_ETHER_ASIX=y
+ CONFIG_USB_ETHER_ASIX88179=y
+ CONFIG_USB_ETHER_RTL8152=y
+ CONFIG_WDT=y
+ CONFIG_ERRNO_STR=y

diff --cc configs/octeontx_83xx_defconfig
index 0000000,e8cacb8..e7dd3f6
mode 000000,100644..100644
--- /dev/null
--- 2/configs/octeontx_83xx_defconfig
+++ b/configs/octeontx_83xx_defconfig
@@@ -1,0 -1,129 +1,128 @@@
 -CONFIG_NET_OCTEONTX=y
 -CONFIG_OCTEONTX_SMI=y
+ CONFIG_ARM=y
+ # CONFIG_ARM64_SUPPORT_AARCH32 is not set
+ CONFIG_ARCH_OCTEONTX=y
+ CONFIG_SYS_TEXT_BASE=0x2800000
+ CONFIG_SYS_MALLOC_F_LEN=0x4000
+ CONFIG_NR_DRAM_BANKS=1
+ CONFIG_ENV_SIZE=0x8000
+ CONFIG_ENV_OFFSET=0xF00000
+ CONFIG_ENV_SECT_SIZE=0x10000
+ CONFIG_TARGET_OCTEONTX_83XX=y
+ CONFIG_DM_GPIO=y
+ CONFIG_DEBUG_UART_BASE=0x87e028000000
+ CONFIG_DEBUG_UART_CLOCK=24000000
+ CONFIG_DEBUG_UART=y
+ CONFIG_AHCI=y
+ CONFIG_FIT=y
+ CONFIG_FIT_SIGNATURE=y
+ CONFIG_OF_BOARD_SETUP=y
+ CONFIG_BOOTDELAY=5
+ CONFIG_USE_BOOTARGS=y
+ CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/sda2 coherent_pool=16M"
+ CONFIG_VERSION_VARIABLE=y
+ # CONFIG_DISPLAY_CPUINFO is not set
+ CONFIG_BOARD_EARLY_INIT_R=y
+ CONFIG_HUSH_PARSER=y
+ CONFIG_SYS_PROMPT="Marvell> "
+ # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
+ CONFIG_CMD_MD5SUM=y
+ CONFIG_MD5SUM_VERIFY=y
+ CONFIG_CMD_MX_CYCLIC=y
+ CONFIG_CMD_MEMTEST=y
+ CONFIG_CMD_SHA1SUM=y
+ CONFIG_SHA1SUM_VERIFY=y
+ CONFIG_CMD_DM=y
+ # CONFIG_CMD_FLASH is not set
+ CONFIG_CMD_GPIO=y
+ CONFIG_CMD_I2C=y
+ CONFIG_CMD_MMC=y
++CONFIG_CMD_BKOPS_ENABLE=y
+ CONFIG_CMD_PART=y
+ CONFIG_CMD_PCI=y
+ CONFIG_CMD_SF_TEST=y
+ CONFIG_CMD_USB=y
+ CONFIG_CMD_DHCP=y
+ CONFIG_CMD_TFTPPUT=y
+ CONFIG_CMD_TFTPSRV=y
+ CONFIG_CMD_RARP=y
+ CONFIG_CMD_MII=y
+ CONFIG_CMD_PING=y
+ CONFIG_CMD_CDP=y
+ CONFIG_CMD_SNTP=y
+ CONFIG_CMD_DNS=y
+ CONFIG_CMD_LINK_LOCAL=y
+ CONFIG_CMD_PXE=y
+ CONFIG_CMD_EXT2=y
+ CONFIG_CMD_EXT4=y
+ CONFIG_CMD_EXT4_WRITE=y
+ CONFIG_CMD_FAT=y
+ CONFIG_CMD_FS_GENERIC=y
+ CONFIG_EFI_PARTITION=y
+ CONFIG_PARTITION_TYPE_GUID=y
+ CONFIG_OF_BOARD=y
+ CONFIG_ENV_IS_IN_SPI_FLASH=y
+ CONFIG_USE_ENV_SPI_BUS=y
+ CONFIG_ENV_SPI_BUS=0
+ CONFIG_USE_ENV_SPI_CS=y
+ CONFIG_ENV_SPI_CS=0
+ CONFIG_USE_ENV_SPI_MAX_HZ=y
+ CONFIG_ENV_SPI_MAX_HZ=16000000
+ CONFIG_USE_ENV_SPI_MODE=y
+ CONFIG_ENV_SPI_MODE=0x0
+ CONFIG_NET_RANDOM_ETHADDR=y
+ CONFIG_SCSI_AHCI=y
+ CONFIG_AHCI_PCI=y
+ CONFIG_DM_I2C=y
+ CONFIG_MISC=y
+ CONFIG_DM_MMC=y
+ CONFIG_MMC_OCTEONTX=y
+ CONFIG_MTD=y
+ CONFIG_DM_SPI_FLASH=y
+ CONFIG_SF_DEFAULT_MODE=0x0
+ CONFIG_SF_DEFAULT_SPEED=16000000
+ CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+ CONFIG_SPI_FLASH_MACRONIX=y
+ CONFIG_SPI_FLASH_SPANSION=y
+ CONFIG_SPI_FLASH_STMICRO=y
+ CONFIG_SPI_FLASH_WINBOND=y
+ CONFIG_PHYLIB=y
+ CONFIG_PHY_AQUANTIA=y
+ CONFIG_PHY_BROADCOM=y
+ CONFIG_PHY_MARVELL=y
+ CONFIG_PHY_MICREL=y
+ CONFIG_PHY_REALTEK=y
+ CONFIG_PHY_VITESSE=y
+ CONFIG_DM_ETH=y
+ CONFIG_E1000=y
+ CONFIG_E1000_SPI=y
+ CONFIG_CMD_E1000=y
+ CONFIG_NVME=y
+ CONFIG_PCI=y
+ CONFIG_DM_PCI=y
+ CONFIG_DM_PCI_COMPAT=y
+ CONFIG_PCI_REGION_MULTI_ENTRY=y
+ CONFIG_PCI_SRIOV=y
+ CONFIG_PCI_ARID=y
+ CONFIG_PCI_OCTEONTX=y
+ CONFIG_DM_REGULATOR=y
+ CONFIG_DM_REGULATOR_FIXED=y
+ CONFIG_DM_REGULATOR_GPIO=y
+ CONFIG_DM_RTC=y
+ CONFIG_SCSI=y
+ CONFIG_DM_SCSI=y
+ CONFIG_DM_SERIAL=y
+ CONFIG_DEBUG_UART_SKIP_INIT=y
+ CONFIG_PL01X_SERIAL=y
+ CONFIG_SPI=y
+ CONFIG_DM_SPI=y
+ CONFIG_USB=y
+ CONFIG_DM_USB=y
+ CONFIG_USB_XHCI_HCD=y
+ CONFIG_USB_XHCI_PCI=y
+ CONFIG_USB_STORAGE=y
+ CONFIG_USB_HOST_ETHER=y
+ CONFIG_USB_ETHER_ASIX=y
+ CONFIG_USB_ETHER_ASIX88179=y
+ CONFIG_USB_ETHER_RTL8152=y
+ CONFIG_WDT=y
+ CONFIG_ERRNO_STR=y

diff --cc include/configs/octeontx2_common.h
index 0000000,87dcf5f..7c585ad
mode 000000,100644..100644
--- /dev/null
--- 2/include/configs/octeontx2_common.h
+++ b/include/configs/octeontx2_common.h
@@@ -1,0 -1,72 +1,71 @@@
 -#define CONFIG_CMD_BKOPS_ENABLE
+ /* SPDX-License-Identifier:    GPL-2.0
+  * Copyright (C) 2018 Marvell International Ltd.
+  *
+  * https://spdx.org/licenses
+  */
+ 
+ #ifndef __OCTEONTX2_COMMON_H__
+ #define __OCTEONTX2_COMMON_H__
+ 
+ #define CONFIG_SUPPORT_RAW_INITRD
+ 
+ /** Maximum size of image supported for bootm (and bootable FIT images) */
+ #define CONFIG_SYS_BOOTM_LEN          (256 << 20)
+ 
+ /** Memory base address */
+ #define CONFIG_SYS_SDRAM_BASE         CONFIG_SYS_TEXT_BASE
+ 
+ /** Stack starting address */
+ #define CONFIG_SYS_INIT_SP_ADDR               (CONFIG_SYS_SDRAM_BASE + 0xffff0)
+ 
+ /** Heap size for U-Boot */
+ #define CONFIG_SYS_MALLOC_LEN         (CONFIG_ENV_SIZE + 64 * 1024 * 1024)
+ 
+ #define CONFIG_SYS_LOAD_ADDR          CONFIG_SYS_SDRAM_BASE
+ 
+ #define CONFIG_LAST_STAGE_INIT
+ 
+ /* Allow environment variable to be overwritten */
+ #define CONFIG_ENV_OVERWRITE
+ 
+ /** Reduce hashes printed out */
+ #define CONFIG_TFTP_TSIZE
+ 
+ /* Autoboot options */
+ #define CONFIG_RESET_TO_RETRY
+ #define CONFIG_BOOT_RETRY_TIME                -1
+ #define CONFIG_BOOT_RETRY_MIN         30
+ 
+ /* BOOTP options */
+ #define CONFIG_BOOTP_BOOTFILESIZE
+ 
+ /** Extra environment settings */
+ #define CONFIG_EXTRA_ENV_SETTINGS     \
+                                       "loadaddr=20080000\0"   \
+                                       "ethrotate=yes\0"       \
+                                       "autoload=0\0"
+ 
+ /** Environment defines */
+ #if defined(CONFIG_ENV_IS_IN_MMC)
+ #define CONFIG_SYS_MMC_ENV_DEV                0
+ #endif
+ 
+ /* Monitor Command Prompt */
+ #define CONFIG_SYS_CBSIZE             1024    /** Console I/O Buffer Size */
+ #define CONFIG_SYS_BARGSIZE           CONFIG_SYS_CBSIZE
+ 
+ #define CONFIG_SYS_MAXARGS            64      /** max command args */
+ 
+ #define CONFIG_SYS_MMC_MAX_BLK_COUNT  8192
+ 
+ #undef CONFIG_SYS_PROMPT
+ #define CONFIG_SYS_PROMPT             env_get("prompt")
+ 
+ #if defined(CONFIG_MMC_OCTEONTX)
+ #define MMC_SUPPORTS_TUNING
+ /** EMMC specific defines */
+ #define CONFIG_SUPPORT_EMMC_BOOT
+ #define CONFIG_SUPPORT_EMMC_RPMB
+ #endif
+ 
+ #endif /* __OCTEONTX2_COMMON_H__ */

diff --cc include/configs/octeontx_common.h
index 0000000,b66aa8b..810b2bd
mode 000000,100644..100644
--- /dev/null
--- 2/include/configs/octeontx_common.h
+++ b/include/configs/octeontx_common.h
@@@ -1,0 -1,89 +1,88 @@@
 -#define CONFIG_CMD_BKOPS_ENABLE
+ /* SPDX-License-Identifier:    GPL-2.0
+  *
+  * Copyright (C) 2018 Marvell International Ltd.
+  *
+  * https://spdx.org/licenses
+  */
+ 
+ #ifndef __OCTEONTX_COMMON_H__
+ #define __OCTEONTX_COMMON_H__
+ 
+ #define CONFIG_SUPPORT_RAW_INITRD
+ 
+ /** Maximum size of image supported for bootm (and bootable FIT images) */
+ #define CONFIG_SYS_BOOTM_LEN          (256 << 20)
+ 
+ /** Memory base address */
+ #define CONFIG_SYS_SDRAM_BASE         CONFIG_SYS_TEXT_BASE
+ 
+ /** Stack starting address */
+ #define CONFIG_SYS_INIT_SP_ADDR               (CONFIG_SYS_SDRAM_BASE + 0xffff0)
+ 
+ /** Heap size for U-Boot */
+ #define CONFIG_SYS_MALLOC_LEN         (CONFIG_ENV_SIZE + 64 * 1024 * 1024)
+ 
+ #define CONFIG_SYS_LOAD_ADDR          CONFIG_SYS_SDRAM_BASE
+ 
+ /* Allow environment variable to be overwritten */
+ #define CONFIG_ENV_OVERWRITE
+ 
+ /** Reduce hashes printed out */
+ #define CONFIG_TFTP_TSIZE
+ 
+ /* Autoboot options */
+ #define CONFIG_RESET_TO_RETRY
+ #define CONFIG_BOOT_RETRY_TIME                -1
+ #define CONFIG_BOOT_RETRY_MIN         30
+ 
+ /* BOOTP options */
+ #define CONFIG_BOOTP_BOOTFILESIZE
+ 
+ /* AHCI support Definitions */
+ #ifdef CONFIG_DM_SCSI
+ /** Enable 48-bit SATA addressing */
+ # define CONFIG_LBA48
+ /** Enable 64-bit addressing */
+ # define CONFIG_SYS_64BIT_LBA
+ #endif
+ 
+ /***** SPI Defines *********/
+ #ifdef CONFIG_DM_SPI_FLASH
+ # define CONFIG_SF_DEFAULT_BUS        0
+ # define CONFIG_SF_DEFAULT_CS 0
+ #endif
+ 
+ /** Extra environment settings */
+ #define CONFIG_EXTRA_ENV_SETTINGS     \
+                                       "loadaddr=20080000\0"   \
+                                       "autoload=0\0"
+ 
+ /** Environment defines */
+ #if defined(CONFIG_ENV_IS_IN_MMC)
+ #define CONFIG_SYS_MMC_ENV_DEV                0
+ #endif
+ 
+ /* Monitor Command Prompt */
+ #define CONFIG_SYS_CBSIZE             1024    /** Console I/O Buffer Size */
+ #define CONFIG_SYS_BARGSIZE           CONFIG_SYS_CBSIZE
+ 
+ #define CONFIG_SYS_MAXARGS            64      /** max command args */
+ 
+ #define CONFIG_SYS_MMC_MAX_BLK_COUNT  8192
+ 
+ #undef CONFIG_SYS_PROMPT
+ #define CONFIG_SYS_PROMPT             env_get("prompt")
+ 
+ /** EMMC specific defines */
+ #if defined(CONFIG_MMC_OCTEONTX)
+ #define CONFIG_SUPPORT_EMMC_BOOT
+ #define CONFIG_SUPPORT_EMMC_RPMB
+ #endif
+ 
+ #if defined(CONFIG_NAND_OCTEONTX)
+ /*#define CONFIG_MTD_CONCAT */
+ #define CONFIG_SYS_MAX_NAND_DEVICE 8
+ #define CONFIG_SYS_NAND_ONFI_DETECTION
+ #endif
+ 
+ #endif /* __OCTEONTX_COMMON_H__ */