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Merge branch 'next'
authorKim Phillips <kim.phillips@freescale.com>
Fri, 23 Jan 2009 23:48:24 +0000 (17:48 -0600)
committerKim Phillips <kim.phillips@freescale.com>
Fri, 23 Jan 2009 23:48:24 +0000 (17:48 -0600)
1  2 
MAINTAINERS patch | diff1 | diff2 | blob | history
MAKEALL patch | diff1 | diff2 | blob | history
Makefile patch | diff1 | diff2 | blob | history
include/configs/MPC8315ERDB.h patch | diff1 | diff2 | blob | history
include/configs/MPC837XEMDS.h patch | diff1 | diff2 | blob | history

diff --combined MAINTAINERS
index dfe54a7,b774938..fcc2043
--- 1/MAINTAINERS
--- 2/MAINTAINERS
+++ b/MAINTAINERS
@@@ -263,6 -263,10 +263,10 @@@ Jon Loeliger <jdl@freescale.com
  
        MPC8641HPCN     MPC8641D
  
+ Ron Madrid <info@sheldoninst.com>
+ 
+       SIMPC8313       MPC8313
+ 
  Dan Malek <dan@embeddedalley.com>
  
        stxgp3          MPC85xx
@@@ -374,6 -378,7 +378,7 @@@ Heiko Schocher <hs@denx.de
  
        ids8247         MPC8247
        jupiter         MPC5200
+       kmeter1         MPC8360
        mgcoge          MPC8247
        mgsuvd          MPC852
        mucmc52         MPC5200
@@@ -707,7 -712,7 +712,7 @@@ Yasushi Shoji <yashi@atmark-techno.com
  
  Michal Simek <monstr@monstr.eu>
  
 -      ML401           MicroBlaze
 +      microblaze-generic      MicroBlaze
  
  #########################################################################
  # Coldfire Systems:                                                   #
diff --combined MAKEALL
index f6271a2,1ca5e58..a1a49f7
--- 1/MAKEALL
--- 2/MAKEALL
+++ b/MAKEALL
@@@ -335,6 -335,7 +335,7 @@@ LIST_8260="                
  #########################################################################
  
  LIST_83xx="           \
+       kmeter1         \
        MPC8313ERDB_33  \
        MPC8313ERDB_NAND_66     \
        MPC8315ERDB     \
@@@ -352,6 -353,7 +353,7 @@@
        MPC837XERDB     \
        MVBLM7          \
        sbc8349         \
+       SIMPC8313_LP    \
        TQM834x         \
  "
  
@@@ -697,9 -699,9 +699,9 @@@ LIST_nios2="               
  ## MicroBlaze Systems
  #########################################################################
  
 -LIST_microblaze="     \
 -      ml401           \
 -      suzaku          \
 +LIST_microblaze="                     \
 +      microblaze-generic              \
 +      suzaku                          \
  "
  
  #########################################################################
diff --combined Makefile
index 5cc950d,9f69278..eff3379
--- 1/Makefile
--- 2/Makefile
+++ b/Makefile
@@@ -2186,6 -2186,9 +2186,9 @@@ TASREG_config :         unconfi
  ## MPC83xx Systems
  #########################################################################
  
+ kmeter1_config: unconfig
+       @$(MKCONFIG) kmeter1 ppc mpc83xx kmeter1 keymile
+ 
  MPC8313ERDB_33_config \
  MPC8313ERDB_66_config \
  MPC8313ERDB_NAND_33_config \
@@@ -2325,6 -2328,21 +2328,21 @@@ MVBLM7_config: unconfi
  sbc8349_config:               unconfig
        @$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
  
+ SIMPC8313_LP_config \
+ SIMPC8313_SP_config: unconfig
+       @mkdir -p $(obj)include
+       @mkdir -p $(obj)board/sheldon/simpc8313
+       @if [ "$(findstring _LP_,$@)" ] ; then \
+               $(XECHO) -n "...Large Page NAND..." ; \
+               echo "#define CONFIG_NAND_LP" >> $(obj)include/config.h ; \
+       fi ; \
+       if [ "$(findstring _SP_,$@)" ] ; then \
+               $(XECHO) -n "...Small Page NAND..." ; \
+               echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \
+       fi ;
+       @$(MKCONFIG) -a SIMPC8313 ppc mpc83xx simpc8313 sheldon
+       @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+ 
  TQM834x_config:       unconfig
        @$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
  
@@@ -3170,9 -3188,10 +3188,9 @@@ PCI5441_config : unconfi
  ## Microblaze
  #========================================================================
  
 -ml401_config: unconfig
 +microblaze-generic_config:    unconfig
        @mkdir -p $(obj)include
 -      @echo "#define CONFIG_ML401 1" > $(obj)include/config.h
 -      @$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
 +      @$(MKCONFIG) -a $(@:_config=) microblaze microblaze microblaze-generic xilinx
  
  suzaku_config:        unconfig
        @mkdir -p $(obj)include
diff --combined include/configs/MPC8315ERDB.h
index e4ada65,909353d..a04868e
--- 1/include/configs/MPC8315ERDB.h
--- 2/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@@ -166,7 -166,7 +166,7 @@@
  #undef CONFIG_SYS_RAMBOOT
  #endif
  
 -#define CONFIG_SYS_MONITOR_LEN                (256 * 1024) /* Reserve 256 kB for Mon */
 +#define CONFIG_SYS_MONITOR_LEN                (384 * 1024) /* Reserve 384 kB for Mon */
  #define CONFIG_SYS_MALLOC_LEN         (512 * 1024) /* Reserved for malloc */
  
  /*
@@@ -223,16 -223,15 +223,16 @@@
   */
  #define CONFIG_SYS_NAND_BASE          0xE0600000      /* 0xE0600000 */
  #define CONFIG_SYS_MAX_NAND_DEVICE    1
 -#define NAND_MAX_CHIPS                1
 -#define CONFIG_MTD_NAND_VERIFY_WRITE
 +#define CONFIG_MTD_NAND_VERIFY_WRITE  1
 +#define CONFIG_CMD_NAND                       1
 +#define CONFIG_NAND_FSL_ELBC          1
  
 -#define CONFIG_SYS_BR1_PRELIM         ( CONFIG_SYS_NAND_BASE \
 +#define CONFIG_SYS_BR1_PRELIM ( CONFIG_SYS_NAND_BASE \
                                | (2<<BR_DECC_SHIFT)    /* Use HW ECC */ \
                                | BR_PS_8               /* Port Size = 8 bit */ \
                                | BR_MS_FCM             /* MSEL = FCM */ \
                                | BR_V )                /* valid */
 -#define CONFIG_SYS_OR1_PRELIM         ( 0xFFFF8000            /* length 32K */ \
 +#define CONFIG_SYS_OR1_PRELIM ( 0xFFFF8000            /* length 32K */ \
                                | OR_FCM_CSCT \
                                | OR_FCM_CST \
                                | OR_FCM_CHT \
@@@ -309,8 -308,29 +309,29 @@@
  #define CONFIG_SYS_PCI_SLV_MEM_BUS    0x00000000
  #define CONFIG_SYS_PCI_SLV_MEM_SIZE   0x80000000
  
+ #define CONFIG_SYS_PCIE1_BASE         0xA0000000
+ #define CONFIG_SYS_PCIE1_MEM_BASE     0xA0000000
+ #define CONFIG_SYS_PCIE1_MEM_PHYS     0xA0000000
+ #define CONFIG_SYS_PCIE1_MEM_SIZE     0x10000000
+ #define CONFIG_SYS_PCIE1_CFG_BASE     0xB0000000
+ #define CONFIG_SYS_PCIE1_CFG_SIZE     0x01000000
+ #define CONFIG_SYS_PCIE1_IO_BASE      0x00000000
+ #define CONFIG_SYS_PCIE1_IO_PHYS      0xB1000000
+ #define CONFIG_SYS_PCIE1_IO_SIZE      0x00800000
+ 
+ #define CONFIG_SYS_PCIE2_BASE         0xC0000000
+ #define CONFIG_SYS_PCIE2_MEM_BASE     0xC0000000
+ #define CONFIG_SYS_PCIE2_MEM_PHYS     0xC0000000
+ #define CONFIG_SYS_PCIE2_MEM_SIZE     0x10000000
+ #define CONFIG_SYS_PCIE2_CFG_BASE     0xD0000000
+ #define CONFIG_SYS_PCIE2_CFG_SIZE     0x01000000
+ #define CONFIG_SYS_PCIE2_IO_BASE      0x00000000
+ #define CONFIG_SYS_PCIE2_IO_PHYS      0xD1000000
+ #define CONFIG_SYS_PCIE2_IO_SIZE      0x00800000
+ 
  #define CONFIG_PCI
  #define CONFIG_83XX_GENERIC_PCI       1 /* Use generic PCI setup */
+ #define CONFIG_83XX_GENERIC_PCIE      1
  
  #define CONFIG_NET_MULTI
  #define CONFIG_PCI_PNP                /* do pci plug-and-play */
diff --combined include/configs/MPC837XEMDS.h
index dbffb71,28d442b..0dd6ef5
--- 1/include/configs/MPC837XEMDS.h
--- 2/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@@ -271,6 -271,7 +271,6 @@@
  #define CONFIG_CMD_NAND               1
  #define CONFIG_MTD_NAND_VERIFY_WRITE  1
  #define CONFIG_SYS_MAX_NAND_DEVICE    1
 -#define NAND_MAX_CHIPS                1
  #define CONFIG_NAND_FSL_ELBC  1
  
  #define CONFIG_SYS_NAND_BASE          0xE0600000      /* 0xE0600000 */
@@@ -353,11 -354,32 +353,32 @@@
  #define CONFIG_SYS_PCI_SLV_MEM_BUS    0x00000000
  #define CONFIG_SYS_PCI_SLV_MEM_SIZE   0x80000000
  
+ #define CONFIG_SYS_PCIE1_BASE         0xA0000000
+ #define CONFIG_SYS_PCIE1_CFG_BASE     0xA0000000
+ #define CONFIG_SYS_PCIE1_CFG_SIZE     0x08000000
+ #define CONFIG_SYS_PCIE1_MEM_BASE     0xA8000000
+ #define CONFIG_SYS_PCIE1_MEM_PHYS     0xA8000000
+ #define CONFIG_SYS_PCIE1_MEM_SIZE     0x10000000
+ #define CONFIG_SYS_PCIE1_IO_BASE      0x00000000
+ #define CONFIG_SYS_PCIE1_IO_PHYS      0xB8000000
+ #define CONFIG_SYS_PCIE1_IO_SIZE      0x00800000
+ 
+ #define CONFIG_SYS_PCIE2_BASE         0xC0000000
+ #define CONFIG_SYS_PCIE2_CFG_BASE     0xC0000000
+ #define CONFIG_SYS_PCIE2_CFG_SIZE     0x08000000
+ #define CONFIG_SYS_PCIE2_MEM_BASE     0xC8000000
+ #define CONFIG_SYS_PCIE2_MEM_PHYS     0xC8000000
+ #define CONFIG_SYS_PCIE2_MEM_SIZE     0x10000000
+ #define CONFIG_SYS_PCIE2_IO_BASE      0x00000000
+ #define CONFIG_SYS_PCIE2_IO_PHYS      0xD8000000
+ #define CONFIG_SYS_PCIE2_IO_SIZE      0x00800000
+ 
  #ifdef CONFIG_PCI
  #ifndef __ASSEMBLY__
  extern int board_pci_host_broken(void);
  #endif
  #define CONFIG_83XX_GENERIC_PCI       1 /* Use generic PCI setup */
+ #define CONFIG_83XX_GENERIC_PCIE      1
  #define CONFIG_PQ_MDS_PIB     1 /* PQ MDS Platform IO Board */
  
  #define CONFIG_HAS_FSL_DR_USB 1 /* fixup device tree for the DR USB */
Domain: System / Kernel;