video: Drop CONFIG_LCD_ALIGNMENT
authorSimon Glass <sjg@chromium.org>
Sun, 16 Oct 2022 21:02:58 +0000 (15:02 -0600)
committerAnatolij Gustschin <agust@denx.de>
Sun, 30 Oct 2022 19:07:16 +0000 (20:07 +0100)
This option is not needed now that the LCD implementation is being
removed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
README
common/lcd.c
include/configs/nyan-big.h
include/configs/tegra20-common.h
scripts/config_whitelist.txt

diff --git a/README b/README
index ec492f9..d1d4a62 100644 (file)
--- a/README
+++ b/README
@@ -815,14 +815,6 @@ The following options need to be configured:
 
                        320x240. Black & white.
 
-               CONFIG_LCD_ALIGNMENT
-
-               Normally the LCD is page-aligned (typically 4KB). If this is
-               defined then the LCD will be aligned to this value instead.
-               For ARM it is sometimes useful to use MMU_SECTION_SIZE
-               here, since it is cheaper to change data cache settings on
-               a per-section basis.
-
 - MII/PHY support:
                CONFIG_PHY_CLOCK_FREQ (ppc4xx)
 
index a462b22..2134e60 100644 (file)
 #endif
 #endif
 
-#ifndef CONFIG_LCD_ALIGNMENT
-#define CONFIG_LCD_ALIGNMENT PAGE_SIZE
-#endif
-
 #if (LCD_BPP != LCD_COLOR8) && (LCD_BPP != LCD_COLOR16) && \
        (LCD_BPP != LCD_COLOR32)
 #error Unsupported LCD BPP.
@@ -239,10 +235,6 @@ ulong lcd_setmem(ulong addr)
 
        size = lcd_get_size(&line_length);
 
-       /* Round up to nearest full page, or MMU section if defined */
-       size = ALIGN(size, CONFIG_LCD_ALIGNMENT);
-       addr = ALIGN(addr - CONFIG_LCD_ALIGNMENT + 1, CONFIG_LCD_ALIGNMENT);
-
        /* Allocate pages for the frame buffer. */
        addr -= size;
 
index bc57545..c59e103 100644 (file)
 #define CONFIG_TEGRA_ENABLE_UARTA
 #define CONFIG_SYS_NS16550_COM1                NV_PA_APB_UARTA_BASE
 
-/* Environment in eMMC, at the end of 2nd "boot sector" */
-
-/* Align LCD to 1MB boundary */
-#define CONFIG_LCD_ALIGNMENT   MMU_SECTION_SIZE
-
 /* SPI */
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
index 71867bb..617bfb2 100644 (file)
        "fdt_addr_r=0x03000000\0" \
        "ramdisk_addr_r=0x03100000\0"
 
-/* Defines for SPL */
-
-/* Align LCD to 1MB boundary */
-#define CONFIG_LCD_ALIGNMENT   MMU_SECTION_SIZE
-
 #ifdef CONFIG_TEGRA_LP0
 #define TEGRA_LP0_ADDR                 0x1C406000
 #define TEGRA_LP0_SIZE                 0x2000
index 6e4b02f..af56d44 100644 (file)
@@ -261,7 +261,6 @@ CONFIG_KSNET_SERDES_SGMII2_BASE
 CONFIG_KSNET_SERDES_SGMII_BASE
 CONFIG_L1_INIT_RAM
 CONFIG_L2_CACHE
-CONFIG_LCD_ALIGNMENT
 CONFIG_LCD_MENU
 CONFIG_LD9040
 CONFIG_LEGACY_BOOTCMD_ENV