- Support SPL and OpenSBI (FW_DYNAMIC firmware) boot.
- Fix qemu kconfig build warning.
default 64 if SYS_CACHE_SHIFT_6
default 32 if SYS_CACHE_SHIFT_5
+config ARCH_CPU_INIT
+ bool "Enable ARCH_CPU_INIT"
+ help
+ Some architectures require a call to arch_cpu_init()
+ Say Y here to enable it
+
config SYS_ARCH_TIMER
bool "ARM Generic Timer support"
depends on CPU_V7A || ARM64
/* Basic CPU architecture */
-#define CONFIG_ARCH_CPU_INIT
/* UART configuration */
#if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
#ifndef __AT91RM9200_H__
#define __AT91RM9200_H__
-#define CONFIG_ARCH_CPU_INIT /* we need arch_cpu_init() for hw timers */
#define CONFIG_AT91_GPIO /* and require always gpio features */
/* Periperial Identifiers */
endif # SPL_SPI_FLASH_SUPPORT
+config SYS_SPI_U_BOOT_OFFS
+ hex "address of u-boot payload in SPI flash"
+ default 0x0
+ depends on SPL_SPI_LOAD || SPL_SPI_SUNXI
+ help
+ Address within SPI-Flash from where the u-boot payload is fetched
+ from.
+
config SPL_SPI_SUPPORT
bool "Support SPI drivers"
help
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_TARGET_SBx81LIFKW=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_TARGET_SBx81LIFXCAT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_TPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-# CONFIG_TPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_AM33XX=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0x40301950
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_TPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
-# CONFIG_TPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
-CONFIG_BLK=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SYS_TEXT_BASE=0x30000000
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM=y
-CONFIG_BLK=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_COMMON_CMD_OPTIONS=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM=y
-CONFIG_BLK=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_ISW_ENTRY_ADDR=0x40300350
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_USB_STORAGE=y
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_ENV_IS_IN_FAT=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM=y
-CONFIG_BLK=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0x403018e0
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
CONFIG_SPL_USB_HOST_SUPPORT=y
-CONFIG_SPL_USB_STORAGE=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
# CONFIG_CMD_FLASH is not set
CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_DM=y
-CONFIG_BLK=y
CONFIG_DFU_MMC=y
CONFIG_DFU_RAM=y
CONFIG_DFU_SF=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_DTIMG=y
CONFIG_CMD_SPL=y
CONFIG_SPL_DMA_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_DTIMG=y
CONFIG_CMD_BCB=y
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0xE80C0000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_ASPENITE=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_TARGET_AT91RM9200EK=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x20100000
CONFIG_TARGET_AT91RM9200EK=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x0000000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9263EK=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_AT91SAM9RLEK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_AT91SAM9260EK=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SPL_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-# CONFIG_TPL_BANNER_PRINT is not set
CONFIG_SPL_CRC32_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CLK_AT91=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARCH_BCM63158=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_TARGET_BCM963158=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_ENABLE_RSASSA_PSS_SUPPORT=y
CONFIG_ARCH_BCM6858=y
CONFIG_SYS_TEXT_BASE=0x10000000
CONFIG_SYS_MALLOC_F_LEN=0x8000
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
CONFIG_TARGET_BCM968580XREF=y
CONFIG_ENV_VARS_UBOOT_CONFIG=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_FIT_VERBOSE=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ENV_OFFSET=0x40000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_OFFSET=0x60000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_BOOTD is not set
CONFIG_ENV_OFFSET=0x40000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
CONFIG_SPL=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x0
# CONFIG_EXPERT is not set
# CONFIG_FIT is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_TPL_BANNER_PRINT is not set
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
# CONFIG_SPL_CRC32_SUPPORT is not set
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
# CONFIG_SPL_CRC32_SUPPORT is not set
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
# CONFIG_SPL_CRC32_SUPPORT is not set
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
# CONFIG_SPL_CRC32_SUPPORT is not set
CONFIG_SPL_PAYLOAD="u-boot.img"
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_TEXT_BASE=0xf4000a00
# CONFIG_SPL_BANNER_PRINT is not set
-# CONFIG_TPL_BANNER_PRINT is not set
CONFIG_SPL_MMC_TINY=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_DM=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SYS_PROMPT="CM-FX6 # "
# CONFIG_CMD_XIMG is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SYS_PROMPT="CM-T43 # "
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXS=y
CONFIG_NAND_MXS_DT=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_COLIBRI_PXA270=y
CONFIG_SYS_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_GO is not set
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_ATMEL_USART=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NET2BIG_V2=y
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CRC32_VERIFY=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_DAVINCI=y
CONFIG_SYS_TEXT_BASE=0x60000000
CONFIG_TARGET_DA850EVM=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CRC32_VERIFY=y
CONFIG_DM_MMC=y
CONFIG_MTD=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_SYS_I2C_MVTWSI=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_BLK=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_MTD=y
CONFIG_MTD_DEVICE=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_LPC32XX=y
CONFIG_SYS_TEXT_BASE=0x83F00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_LPC32XX_SLC=y
CONFIG_SPL_NAND_SIMPLE=y
CONFIG_PHYLIB=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_UNZIP=y
CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="display5 > "
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_USB_HOST_SUPPORT=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_SDP_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DNS325=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DOCKSTAR=y
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_SPL=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_SPL_DMA_SUPPORT=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
CONFIG_CMD_MTDPARTS=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_DFU=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DREAMPLUG=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_DS109=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_PCI=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ORION5X=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
CONFIG_ARCH_EXYNOS7=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x27000000
CONFIG_TARGET_ETHERNUT5=y
CONFIG_AT91_GPIO=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
CONFIG_USB_GADGET_PRODUCT_NUM=0x320a
CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_TPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_TPL_BANNER_PRINT is not set
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
# CONFIG_MMC is not set
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_DM_ETH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_GOFLEXHOME=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_GPLUGD=y
CONFIG_SYS_TEXT_BASE=0x00f00000
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARM=y
-# CONFIG_SPL_SYS_THUMB_BUILD is not set
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x18000000
CONFIG_RZA1=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HWECC=y
CONFIG_PHYLIB=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_GURUPLUG=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_IB62X0=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_ICONNECT=y
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_RAW_IMAGE_SUPPORT=y
CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_TPL_BANNER_PRINT is not set
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_DMA_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXS=y
CONFIG_NAND_MXS_DT=y
CONFIG_PHYLIB=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_REMOTEPROC=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_FLASH is not set
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC0A0000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0xC0A0000
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC200000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0xC200000
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_SYS_TEXT_BASE=0xC000000
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_MX_CYCLIC=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_GPIO is not set
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_KEYSTONE=y
CONFIG_TI_SECURE_DEVICE=y
CONFIG_ISW_ENTRY_ADDR=0xC100000
CONFIG_MISC=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
# CONFIG_SYS_THUMB_BUILD is not set
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_LSXL=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_LSXL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_I2C_DEFAULT_BUS_NUMBER=0
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
-CONFIG_DM_RTC=y
-CONFIG_DM_GPIO=y
-CONFIG_CMD_DATE=y
-CONFIG_RTC_PCF2127=y
-CONFIG_I2C_MUX=y
-CONFIG_I2C_MUX_PCA954x=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_I2C_DEFAULT_BUS_NUMBER=0
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
-CONFIG_DM_RTC=y
-CONFIG_DM_GPIO=y
-CONFIG_CMD_DATE=y
-CONFIG_RTC_PCF2127=y
-CONFIG_I2C_MUX=y
-CONFIG_I2C_MUX_PCA954x=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
-CONFIG_DM_RTC=y
-CONFIG_DM_GPIO=y
-CONFIG_CMD_DATE=y
-CONFIG_RTC_PCF2127=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
-CONFIG_I2C_DEFAULT_BUS_NUMBER=0
-CONFIG_DM_RTC=y
-CONFIG_DM_GPIO=y
-CONFIG_CMD_DATE=y
-CONFIG_RTC_PCF2127=y
CONFIG_DM_MMC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_I2C=y
CONFIG_CMD_SF=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_MEESC=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21F00000
CONFIG_TARGET_MEESC=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x07d00000
CONFIG_TARGET_KM_KIRKWOOD=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXC=y
CONFIG_MII=y
CONFIG_SMC911X=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NAS220=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NET2BIG_V2=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NETSPACE_V2=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_NSA310S=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43e00000
CONFIG_ARCH_EXYNOS4=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd"
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="usb start"
CONFIG_NR_DRAM_BANKS=2
CONFIG_SPL=y
CONFIG_DISTRO_DEFAULTS=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_USE_PREBOOT=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_DEFAULT_FDT_FILE="omap3-evm.dtb"
CONFIG_DM_MMC=y
CONFIG_MTD=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_DAVINCI=y
CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
-CONFIG_USE_TINY_PRINTF=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_OHCI_HCD=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
# CONFIG_CMD_BMODE is not set
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_BOOTDELAY=5
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttymxc0,115200"
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1"
CONFIG_SUN8I_EMAC=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-zero"
CONFIG_SUN8I_EMAC=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
CONFIG_ARCH_EXYNOS4=y
CONFIG_SPL_TEXT_BASE=0x00908000
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXS=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x23E00000
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x23E00000
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0
CONFIG_TARGET_PM9261=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0
CONFIG_TARGET_PM9263=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_TARGET_POGO_E02=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_RCAR_GEN3=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_SPL_STACK_R_ADDR=0x80000
CONFIG_DEBUG_UART=y
-CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_TPL=y
CONFIG_ENV_IS_IN_MMC=y
-CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
CONFIG_USB_ETHER_MCS7830=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4.dtb"
+CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_USB_ETHER_SMSC95XX=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
-CONFIG_MISC_INIT_R=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00008000
CONFIG_TARGET_RPI_0_W=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00008000
CONFIG_TARGET_RPI_2=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00008000
CONFIG_TARGET_RPI_3_32B=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00080000
CONFIG_TARGET_RPI_3=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00080000
CONFIG_TARGET_RPI_3=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_BCM283X=y
CONFIG_SYS_TEXT_BASE=0x00008000
CONFIG_TARGET_RPI=y
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_S5PC1XX=y
CONFIG_SYS_TEXT_BASE=0x34800000
CONFIG_TARGET_S5P_GONI=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x44800000
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_SAMA5D27_SOM1_EK=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_ICP=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_PTC_EK=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HW_PMECC=y
CONFIG_PMECC_CAP=4
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_PTC_EK=y
CONFIG_DM_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ATMEL=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HW_PMECC=y
CONFIG_PMECC_CAP=4
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D2_XPLAINED=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_DM_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_ETH=y
CONFIG_MACB=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3_XPLAINED=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=4
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=4
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D3XEK=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_TEXT_BASE=0x300000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_SYS_FLASH_PROTECTION=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HW_PMECC=y
CONFIG_PMECC_CAP=8
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
CONFIG_I2C_EEPROM=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=8
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4_XPLAINED=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
CONFIG_AT91_GPIO=y
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=8
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x26f00000
CONFIG_TARGET_SAMA5D4EK=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SPL_TEXT_BASE=0x200000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
CONFIG_DM_MMC=y
CONFIG_GENERIC_ATMEL_MCI=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
CONFIG_KIRKWOOD=y
CONFIG_SYS_TEXT_BASE=0x600000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PHYLIB=y
CONFIG_USB=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_EXYNOS=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x23E00000
CONFIG_ARCH_EXYNOS5=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_S5PC1XX=y
CONFIG_SYS_TEXT_BASE=0x34800000
CONFIG_TARGET_SMDKC100=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43E00000
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_SNAPPER9260=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x21f00000
CONFIG_TARGET_SNAPPER9260=y
CONFIG_CMD_PCA953X=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_EXYNOS=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_ASKENV=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_DFU=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_BOOTDELAY=5
CONFIG_SPL_TEXT_BASE=0xFFE00000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
CONFIG_CMD_MEMTEST=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SPL_TEXT_BASE=0xFFFF0000
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_SPL_SPI_SUNXI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_USE_PREBOOT=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
# CONFIG_CMD_FLASH is not set
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR300=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR300=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR300=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR300=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR310=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR310=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR310=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR310=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR310=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR310=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR320=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR320=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR320=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR320=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR320=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR320=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR600=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR600=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR600=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_TARGET_SPEAR600=y
CONFIG_SYS_TEXT_BASE=0x00700000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_ARCH_EXYNOS=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_ARM=y
CONFIG_SPL_SYS_ICACHE_OFF=y
CONFIG_SPL_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2067"
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOARD_EARLY_INIT_F=y
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-# CONFIG_TPL_BANNER_PRINT is not set
CONFIG_SPL_CRC32_SUPPORT=y
CONFIG_SPL_NAND_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_DFU_NAND=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0x40004030
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
# CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_USE_PREBOOT=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SYS_PROMPT="zynq-uboot> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_USE_PREBOOT=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SYS_PROMPT="zynq-uboot> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_USE_PREBOOT=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
CONFIG_SYS_PROMPT="zynq-uboot> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x43e00000
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x63300000
CONFIG_ARCH_EXYNOS4=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_CMD_MEMTEST=y
CONFIG_SYS_ALT_MEMTEST=y
CONFIG_CMD_SHA1SUM=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_USB_A9263=y
CONFIG_AT91_GPIO=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
-# CONFIG_SPL_SYS_THUMB_BUILD is not set
CONFIG_ARCH_VF610=y
CONFIG_SYS_TEXT_BASE=0x3f401000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
CONFIG_SYS_THUMB_BUILD=y
-# CONFIG_SPL_SYS_THUMB_BUILD is not set
CONFIG_ARCH_VF610=y
CONFIG_SYS_TEXT_BASE=0x3f401000
CONFIG_NR_DRAM_BANKS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x20f00000
CONFIG_TARGET_VINCO=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_SYS_MALLOC_F_LEN=0x4000
CONFIG_TARGET_SOFTING_VINING_2000=y
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
CONFIG_NR_DRAM_BANKS=1
# CONFIG_CMD_BMODE is not set
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x400
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/softing/vining_2000/imximage.cfg"
CONFIG_BOOTDELAY=0
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_CMD_MTDPARTS=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=4
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_AT91=y
CONFIG_SYS_TEXT_BASE=0x23f00000
CONFIG_TARGET_WB50N=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NAND=y
+# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_PMECC_CAP=8
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
CONFIG_ARM=y
CONFIG_SYS_ICACHE_OFF=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_LPC32XX=y
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_MVEBU=y
CONFIG_SYS_TEXT_BASE=0x00800000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_MISC_INIT_R=y
CONFIG_SPL_TEXT_BASE=0x40000030
CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_CMD_MEMINFO=y
# CONFIG_CMD_FLASH is not set
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_MMC is not set
CONFIG_NAND=y
+CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_PXA3XX=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_BUS=1
CONFIG_ARM=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_SYS_THUMB_BUILD=y
# CONFIG_SPL_USE_ARCH_MEMCPY is not set
# CONFIG_SPL_USE_ARCH_MEMSET is not set
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
CONFIG_USE_PREBOOT=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_DFU=y
# CONFIG_CMD_FLASH is not set
# CONFIG_ARCH_EARLY_INIT_R is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_MEMTEST=y
CONFIG_SPL_FPGA_SUPPORT=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_FPGA_LOADBP=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_OS_BOOT=y
CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
CONFIG_SYS_PROMPT="Zynq> "
CONFIG_CMD_THOR_DOWNLOAD=y
CONFIG_CMD_DFU=y
offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
The position of U-Boot is controlled with this setting in U-Boot:
- #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
+ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
If you have a Dediprog em100pro connected then you can write the image with:
Omit standard ECC layouts to safe space. Select this if your driver
is known to provide its own ECC layout.
+config SYS_NAND_USE_FLASH_BBT
+ bool "Enable BBT (Bad Block Table) support"
+ help
+ Enable the BBT (Bad Block Table) usage.
+
config NAND_ATMEL
bool "Support Atmel NAND controller"
imply SYS_NAND_USE_FLASH_BBT
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
/* SPL support */
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF2
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
*/
#if defined(CONFIG_SPI_BOOT)
/* SPL related */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
#ifndef __CONFIG_AM43XX_EVM_H
#define __CONFIG_AM43XX_EVM_H
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
/* SPI SPL */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#endif /* __CONFIG_AM57XX_EVM_H */
#define BOARD_LATE_INIT
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_TMU_TIMER
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_ARCH_CPU_INIT
-
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
#endif
/* Misc CPU related */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
-#define CONFIG_ARCH_CPU_INIT
-
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#elif CONFIG_SYS_USE_NANDFLASH
-#elif CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
-
#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#elif CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
-
#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
*/
#if defined(CONFIG_SPI_BOOT)
/* SPL related */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
#if defined(CONFIG_SPI)
/* SPI Flash */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
/* Environment */
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
#define CONFIG_INITRD_TAG
/* SPI Flash */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
/* Environment */
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_MACH_TYPE 4122
#ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#include "imx6_spl.h"
#endif
/* SPL */
#include "imx7_spl.h"
-#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
-#endif /* CONFIG_SPL_BUILD */
#endif /* __CONFIG_H */
#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#elif defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC) || defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SATA)
/* SPL related MMC defines */
/* SPL */
#include "imx6_spl.h"
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
/* Display */
#define CONFIG_IMX_HDMI
#define __CONFIG_CM_T43_H
#define CONFIG_CM_T43
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
/* SPL defines. */
#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
/* EEPROM */
/* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */
#define CONFIG_SYS_NAND_BASE -1
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
/* USB Configs */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
*/
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOTCOMMAND \
"if fatload mmc 0 0xa0000000 uImage; then " \
"bootm 0xa0000000; " \
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#ifdef CONFIG_DIRECT_NOR_BOOT
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SYS_DV_NOR_BOOT_CFG (0x11)
#endif
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
#ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
#endif
#define CONFIG_ENV_SIZE (128 << 10)
#define CONFIG_ENV_SECT_SIZE (128 << 10)
#endif
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
#define CONFIG_SYS_MEMTEST_END 0x007fffff /* (_8M - 1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif /* _CONFIG_DB_88F6720_H */
#endif
/* NAND */
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* Keep device tree and initrd in lower memory so the kernel can access them */
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#endif
/* NAND */
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_ONFI_DETECTION
/*
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
/* NAND */
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_ONFI_DETECTION
/* Keep device tree and initrd in lower memory so the kernel can access them */
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
/*
* USB
/* SPL */
#include "imx6_spl.h" /* common IMX6 SPL configuration */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x11400
#define CONFIG_SPL_TARGET "u-boot-with-spl.imx"
/* Miscellaneous configurable options */
#define CONFIG_SYS_SPI_ARGS_SIZE 0x10000
#include "imx6_spl.h"
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#endif
/* SPI SPL */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
/* USB xHCI HOST */
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
/* DS414 bus width is 32bits */
#define CONFIG_DDR_32BIT
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR 0x00800000
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_MXC_UART
#ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#include "imx6_spl.h"
#endif
#define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
/* CPU information */
-#define CONFIG_ARCH_CPU_INIT
/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <linux/sizes.h>
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT
/* Keep L2 Cache Disabled */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <linux/sizes.h>
-#define CONFIG_ARCH_CPU_INIT
-
/* Size of malloc() pool before and after relocation */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
/* SPL support */
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF0
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
#define CONFIG_CMDLINE_TAG
-#define CONFIG_ARCH_CPU_INIT
/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00500000
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
/* MTD device */
#ifdef CONFIG_TARGET_J721E_A72_EVM
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE + \
CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x280000
#else
/*
* Maximum size in memory allocated to the SPL BSS. Keep it as tight as
/* Configure R5 SPL post-relocation malloc pool in DDR */
#define CONFIG_SYS_SPL_MALLOC_START 0x84000000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_16M
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000
#endif
#ifdef CONFIG_SYS_K3_SPL_ATF
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
/*
* Ethernet Driver configuration
/* SPL support */
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF0
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
#include <asm/arch/rmobile.h>
-#define CONFIG_ARCH_CPU_INIT
-
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* SPL support */
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF0
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
/* Environment is in NAND */
#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
/* Misc CPU related */
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG
#define CONFIG_SPL_PAD_TO 0x10000
#define CONFIG_SPI_ADDR 0x30000000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
/* SPL -> Uboot */
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
/*
* Ethernet Driver configuration
#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MXC_NAND_HWECC
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI1_CLKID)
#ifdef CONFIG_USE_SPIFLASH
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000
#endif
#ifdef CONFIG_NAND
#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
#define CONFIG_ENV_SIZE (128 << 9)
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_PAGE_2K
#define CONFIG_SYS_NAND_CS 3
/* SPL */
#ifdef CONFIG_SPL
#include "imx6_spl.h"
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#endif
#define CONFIG_FEC_MXC
/* CPU */
#ifdef CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
#endif
#define __PCM058_CONFIG_H
#ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#include "imx6_spl.h"
#endif
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#endif
/* DMA stuff, needed for GPMI/MXS NAND support */
#define __PCM058_CONFIG_H
#ifdef CONFIG_SPL
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
#include "imx6_spl.h"
#endif
/* CPU */
#ifdef CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
#elif defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MACH_TYPE MACH_TYPE_PM9261
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263"
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MACH_TYPE MACH_TYPE_PM9263
/* SPL support */
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF0
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
#define CONFIG_SPL_TARGET "spl/u-boot-spl.srec"
#endif
-#define CONFIG_ARCH_CPU_INIT
-
#ifndef CONFIG_PINCTRL_PFC
#define CONFIG_SH_GPIO_PFC
#endif
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
-#define CONFIG_ARCH_CPU_INIT
-
/* Generic Interrupt Controller Definitions */
#define CONFIG_GICV2
#define GICD_BASE 0xF1010000
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
/* RAW SD card / eMMC locations. */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_SDRAM_BASE 0x60000000
#define CONFIG_IRAM_BASE 0xff700000
/* RAW SD card / eMMC locations. */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
/* FAT sd card locations. */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
-
/* FAT sd card locations. */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_SDRAM_BASE 0
#define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000
/* RAW SD card / eMMC locations. */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
/* FAT sd card locations. */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#endif
/* Architecture, CPU, etc.*/
-#define CONFIG_ARCH_CPU_INIT
/* Use SoC timer for AArch32, but architected timer for AArch64 */
#ifndef CONFIG_ARM64
#include <linux/sizes.h>
#include <asm/arch/cpu.h> /* get chip and board defs */
-#define CONFIG_ARCH_CPU_INIT
-
/* input clock of PLL: has 24MHz input clock at S5PC110 */
#define CONFIG_SYS_CLK_FREQ_C110 24000000
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#endif
-#ifdef CONFIG_QSPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
-#endif
-
#endif
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#elif CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
-
#endif
#endif
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#elif CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
-
#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#elif CONFIG_SYS_USE_NANDFLASH
-#elif CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
-
#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#elif CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
-
#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
-
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
/* SPL support */
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIF2
#define CONFIG_SH_SCIF_CLK_FREQ 65000000
#include <asm/arch/cpu.h> /* get chip and board defs */
-#define CONFIG_ARCH_CPU_INIT
-
/* input clock of PLL: SMDKC100 has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 12000000
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
/* CPU */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#endif
/* SPL QSPI boot support */
-#ifdef CONFIG_SPL_SPI_SUPPORT
-#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
-#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
-#endif
-#endif
/* SPL NAND boot support */
#ifdef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SYS_SPL_MALLOC_SIZE (CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR \
- CONFIG_SYS_SPL_MALLOC_SIZE)
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x3C00000
/* SPL SDMMC boot support */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
/* Miscellaneous configurable options */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
/* SPL support */
#define CONFIG_SPL_STACK 0xe6340000
#define CONFIG_SPL_MAX_SIZE 0x4000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
#ifdef CONFIG_SPL_BUILD
#define CONFIG_CONS_SCIFA0
#define CONFIG_SH_SCIF_CLK_FREQ 52000000
#define CONFIG_SYS_MAX_NAND_DEVICE 8
#endif
-#ifdef CONFIG_SPL_SPI_SUNXI
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
-#endif
-
/* mmc config */
#ifdef CONFIG_MMC
#define CONFIG_MMC_SUNXI_SLOT 0
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
/* Misc CPU related */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#if defined(CONFIG_SPL_BUILD)
/* SPL related */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#endif
/* load address */
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1a000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
#define CONFIG_SYS_NS16550_COM1 0x48020000 /* Base EVM has UART0 */
/* CPU */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
/*
#ifndef __CONFIG_TI_AM335X_COMMON_H__
#define __CONFIG_TI_AM335X_COMMON_H__
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
/* SoC Configuration */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SPL_TARGET "u-boot-spi.gph"
/* Memory Configuration */
CONFIG_SYS_SPL_MALLOC_SIZE + \
SPL_MALLOC_F_SIZE + \
KEYSTONE_SPL_STACK_SIZE - 4)
-#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
/* SRAM scratch space entries */
#define SRAM_SCRATCH_SPACE_ADDR CONFIG_SPL_STACK + 0x8
#define CONFIG_SYS_NAND_MASK_CLE 0x4000
#define CONFIG_SYS_NAND_MASK_ALE 0x2000
#define CONFIG_SYS_NAND_CS 2
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
#define CONFIG_SYS_NAND_LARGEPAGE
/* SPL settings */
#undef CONFIG_SPL_ETH_SUPPORT
-#undef CONFIG_SYS_SPI_U_BOOT_OFFS
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#undef CONFIG_SPL_MAX_FOOTPRINT
#define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
#ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
/* SPL related SPI defines */
-# define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
# define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif
#define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263
-#define CONFIG_ARCH_CPU_INIT
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_ARCH_CPU_INIT
-
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
/* NAND */
#define CONFIG_SYS_NAND_ONFI_DETECTION
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define BBT_CUSTOM_SCAN
#endif
/* NAND */
-#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
/*
* Other required minimal configurations
*/
-#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* SPL related SPI defines */
-#define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
#endif /* _CONFIG_X530_H */
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
/* Miscellaneous configurable options */
-#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOT_PARAMS_ADDR 0x00000100
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
# define CONFIG_SYS_SPI_KERNEL_OFFS 0x80000
# define CONFIG_SYS_SPI_ARGS_OFFS 0xa0000
# define CONFIG_SYS_SPI_ARGS_SIZE 0xa0000
-
-# define CONFIG_SYS_SPI_U_BOOT_OFFS 0x170000
#endif
/* u-boot is like dtb */
/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
-#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
CONFIG_APER_SIZE
CONFIG_APUS_FAST_EXCEPT
CONFIG_ARCH_ADPAG101P
-CONFIG_ARCH_CPU_INIT
CONFIG_ARCH_HAS_ILOG2_U32
CONFIG_ARCH_HAS_ILOG2_U64
CONFIG_ARCH_KIRKWOOD
CONFIG_SYS_NAND_SIZE
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
CONFIG_SYS_NAND_SPL_SIZE
-CONFIG_SYS_NAND_USE_FLASH_BBT
CONFIG_SYS_NAND_U_BOOT_DST
CONFIG_SYS_NAND_U_BOOT_RELOC
CONFIG_SYS_NAND_U_BOOT_RELOC_SP
CONFIG_SYS_SPI_MXC_WAIT
CONFIG_SYS_SPI_RTC_DEVID
CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
-CONFIG_SYS_SPI_U_BOOT_OFFS
CONFIG_SYS_SPI_U_BOOT_SIZE
CONFIG_SYS_SPI_WRITE_TOUT
CONFIG_SYS_SPL_ARGS_ADDR