Convert CONFIG_SYS_NAND_DBW_8 et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_NAND_DBW_8
   CONFIG_SYS_NAND_DBW_16

Note that all instances of the code check for CONFIG_SYS_NAND_DBW_16
being defined, and then "else" to CONFIG_SYS_NAND_DBW_8 whereas all of
the configs set CONFIG_SYS_NAND_DBW_8. So we introduce
CONFIG_SYS_NAND_DBW_16 as an option.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index da2c579..48a7507 100644 (file)
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -83,6 +83,18 @@ config SPL_GENERATE_ATMEL_PMECC_HEADER
        help
          Generate Programmable Multibit ECC (PMECC) header for SPL image.
 
+choice
+       prompt "NAND bus width (bits)"
+       default SYS_NAND_DBW_8
+
+config SYS_NAND_DBW_8
+       bool "NAND bus width is 8 bits"
+
+config SYS_NAND_DBW_16
+       bool "NAND bus width is 16 bits"
+
+endchoice
+
 endif
 
 config NAND_BRCMNAND

diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index d51da9d..60b4737 100644 (file)
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -44,7 +44,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14

diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 5dc8f21..d80a686 100644 (file)
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -25,7 +25,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   0x40000000
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD22 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 22)
 /* our CLE is AD21 */

diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index d31a774..89a8e43 100644 (file)
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -151,7 +151,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index 0108547..55edd70 100644 (file)
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -21,7 +21,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index c60c248..0a512c2 100644 (file)
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -26,7 +26,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 71a2863..b8a14d5 100644 (file)
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -28,7 +28,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 0596afb..3e7c0c0 100644 (file)
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -38,7 +38,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 22647ab..a18920d 100644 (file)
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -38,7 +38,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h
index 52b9fe2..3d62efb 100644 (file)
--- a/include/configs/gardena-smart-gateway-at91sam.h
+++ b/include/configs/gardena-smart-gateway-at91sam.h
@@ -23,7 +23,6 @@
 
 /* NAND flash */
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       BIT(21)
 /* our CLE is AD22 */

diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 9f913fa..30267e2 100644 (file)
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -53,7 +53,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 # define CONFIG_SYS_NAND_BASE                  ATMEL_BASE_CS3 /* 0x40000000 */
-# define CONFIG_SYS_NAND_DBW_8
 # define CONFIG_SYS_NAND_MASK_ALE              (1 << 21)
 # define CONFIG_SYS_NAND_MASK_CLE              (1 << 22)
 # define CONFIG_SYS_NAND_ENABLE_PIN            GPIO_PIN_PD(15)

diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 278f1b5..6a89fb1 100644 (file)
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -130,7 +130,6 @@
 
 /* NAND flash */
 #define CONFIG_SYS_NAND_BASE                   0x40000000
-#define CONFIG_SYS_NAND_DBW_8                  1
 /* our ALE is AD22 */
 #define CONFIG_SYS_NAND_MASK_ALE               (1 << 22)
 /* our CLE is AD21 */

diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 7c23206..c56db4d 100644 (file)
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -147,7 +147,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           0x40000000
-#define CONFIG_SYS_NAND_DBW_8          1
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 /* our CLE is AD22 */

diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 35fd525..7d3a326 100644 (file)
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -26,7 +26,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE                   ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 /* our ALE is AD21 */
 #define CONFIG_SYS_NAND_MASK_ALE               BIT(21)
 /* our CLE is AD22 */

diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index a77215d..c8f5816 100644 (file)
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -55,7 +55,6 @@
 
 /* NAND flash settings */
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14

diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index c56fb37..6aba1d3 100644 (file)
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -31,7 +31,6 @@
 /* NAND Flash */
 #define CONFIG_SYS_NAND_ECC_BASE       ATMEL_BASE_ECC
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21) /* AD21 */
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22) /* AD22 */
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14

diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 45780d9..ca9616d 100644 (file)
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -55,7 +55,6 @@
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_NAND_BASE           ATMEL_BASE_CS3
-#define CONFIG_SYS_NAND_DBW_8
 #define CONFIG_SYS_NAND_MASK_ALE       (1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE       (1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN     AT91_PIN_PC14