ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1

Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1
tag. None of the existing boards had any devicetree updates.

This commit adds the following new board devicetrees:
 - sun8i-r40-oka40i-c.dts
 - sun8i-t3-cqa3t-bv3.dts

Signed-off-by: Samuel Holland <samuel@sholland.org>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e0f856b..c610025 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -667,6 +667,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
        sun8i-h3-zeropi.dtb
 dtb-$(CONFIG_MACH_SUN8I_R40) += \
        sun8i-r40-bananapi-m2-ultra.dtb \
+       sun8i-r40-oka40i-c.dtb \
+       sun8i-t3-cqa3t-bv3.dtb \
        sun8i-v40-bananapi-m2-berry.dtb
 dtb-$(CONFIG_MACH_SUN8I_V3S) += \
        sun8i-s3-elimo-initium.dtb \

diff --git a/arch/arm/dts/sun8i-r40-feta40i.dtsi b/arch/arm/dts/sun8i-r40-feta40i.dtsi
new file mode 100644 (file)
index 0000000..265e0fa
--- /dev/null
+++ b/arch/arm/dts/sun8i-r40-feta40i.dtsi
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com>
+// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is:
+//  Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+//  Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+
+#include "sun8i-r40.dtsi"
+
+&i2c0 {
+       status = "okay";
+
+       axp22x: pmic@34 {
+               compatible = "x-powers,axp221";
+               reg = <0x34>;
+               interrupt-parent = <&nmi_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
+#include "axp22x.dtsi"
+
+&mmc2 {
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_aldo2>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+&pio {
+       pinctrl-names = "default";
+       pinctrl-0 = <&clk_out_a_pin>;
+       vcc-pa-supply = <&reg_dcdc1>;
+       vcc-pc-supply = <&reg_aldo2>;
+       vcc-pd-supply = <&reg_dcdc1>;
+       vcc-pf-supply = <&reg_dldo4>;
+       vcc-pg-supply = <&reg_dldo1>;
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1800000>;
+       regulator-max-microvolt = <1800000>;
+       regulator-name = "vcc-pa";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+       regulator-always-on;
+       regulator-min-microvolt = <1100000>;
+       regulator-max-microvolt = <1100000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1500000>;
+       regulator-max-microvolt = <1500000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi-io";
+};
+
+&reg_dldo4 {
+       regulator-always-on;
+       regulator-min-microvolt = <2500000>;
+       regulator-max-microvolt = <2500000>;
+       regulator-name = "vdd2v5-sata";
+};
+
+&reg_eldo2 {
+       regulator-min-microvolt = <1200000>;
+       regulator-max-microvolt = <1200000>;
+       regulator-name = "vdd1v2-sata";
+};
+
+&reg_eldo3 {
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "vcc-pe";
+};

diff --git a/arch/arm/dts/sun8i-r40-oka40i-c.dts b/arch/arm/dts/sun8i-r40-oka40i-c.dts
new file mode 100644 (file)
index 0000000..0bd1336
--- /dev/null
+++ b/arch/arm/dts/sun8i-r40-oka40i-c.dts
@@ -0,0 +1,203 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com>
+// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is:
+//     Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+//     Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+
+/dts-v1/;
+#include "sun8i-r40-feta40i.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+       model = "Forlinx OKA40i-C";
+       compatible = "forlinx,oka40i-c", "forlinx,feta40i-c", "allwinner,sun8i-r40";
+
+       aliases {
+               ethernet0 = &gmac;
+               serial0 = &uart0;
+               serial2 = &uart2;
+               serial3 = &uart3;
+               serial4 = &uart4;
+               serial5 = &uart5; /* RS485 */
+               serial7 = &uart7;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led-5 { /* this is how the leds are labeled on the board */
+                       gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+               };
+
+               led-6 {
+                       gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_STATUS;
+               };
+       };
+
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN
+               clocks = <&ccu CLK_OUTA>;
+               clock-names = "ext_clock";
+       };
+};
+
+&ahci {
+       ahci-supply = <&reg_dldo4>;
+       phy-supply = <&reg_eldo2>;
+       status = "okay";
+};
+
+&de {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&ehci2 {
+       status = "okay";
+};
+
+&gmac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac_rgmii_pins>;
+       phy-handle = <&phy1>;
+       phy-mode = "rgmii-id";
+       phy-supply = <&reg_dcdc1>;
+       status = "okay";
+};
+
+&gmac_mdio {
+       phy1: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
+
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&mmc0 {
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_dcdc1>;
+       bus-width = <4>;
+       cd-gpios = <&pio 8 11 GPIO_ACTIVE_LOW>; // PI11
+       status = "okay";
+};
+
+&mmc3 {
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_dcdc1>;
+       bus-width = <4>;
+       cd-gpios = <&pio 8 10 GPIO_ACTIVE_LOW>; // PI10
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&reg_dc1sw {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-lcd";
+};
+
+&reg_dldo2 {
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-wifi";
+};
+
+&tcon_tv0 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pb_pins>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pi_pins>, <&uart2_rts_cts_pi_pins>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart4_pg_pins>;
+       status = "okay";
+};
+
+&uart5 { /* RS485 */
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart5_ph_pins>;
+       status = "okay";
+};
+
+&uart7 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart7_pi_pins>;
+       status = "okay";
+};
+
+&usbphy {
+       usb1_vbus-supply = <&reg_vcc5v0>;
+       usb2_vbus-supply = <&reg_vcc5v0>;
+       status = "okay";
+};

diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index d5ad3b9..03d3e5f 100644 (file)
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -357,6 +357,8 @@
                        clock-names = "ahb", "mmc";
                        resets = <&ccu RST_BUS_MMC3>;
                        reset-names = "ahb";
+                       pinctrl-0 = <&mmc3_pins>;
+                       pinctrl-names = "default";
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                        #address-cells = <1>;
@@ -509,6 +511,16 @@
                        #interrupt-cells = <3>;
                        #gpio-cells = <3>;
 
+                       can_ph_pins: can-ph-pins {
+                               pins = "PH20", "PH21";
+                               function = "can";
+                       };
+
+                       can_pa_pins: can-pa-pins {
+                               pins = "PA16", "PA17";
+                               function = "can";
+                       };
+
                        clk_out_a_pin: clk-out-a-pin {
                                pins = "PI12";
                                function = "clk_out_a";
@@ -602,6 +614,15 @@
                        };
 
                        /omit-if-no-ref/
+                       mmc3_pins: mmc3-pins {
+                               pins = "PI4", "PI5", "PI6",
+                                      "PI7", "PI8", "PI9";
+                               function = "mmc3";
+                               drive-strength = <30>;
+                               bias-pull-up;
+                       };
+
+                       /omit-if-no-ref/
                        spi0_pc_pins: spi0-pc-pins {
                                pins = "PC0", "PC1", "PC2";
                                function = "spi0";
@@ -631,20 +652,65 @@
                                function = "spi1";
                        };
 
+                       /omit-if-no-ref/
                        uart0_pb_pins: uart0-pb-pins {
                                pins = "PB22", "PB23";
                                function = "uart0";
                        };
 
+                       /omit-if-no-ref/
+                       uart2_pi_pins: uart2-pi-pins {
+                               pins = "PI18", "PI19";
+                               function = "uart2";
+                       };
+
+                       /omit-if-no-ref/
+                       uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
+                               pins = "PI16", "PI17";
+                               function = "uart2";
+                       };
+
+                       /omit-if-no-ref/
                        uart3_pg_pins: uart3-pg-pins {
                                pins = "PG6", "PG7";
                                function = "uart3";
                        };
 
+                       /omit-if-no-ref/
                        uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
                                pins = "PG8", "PG9";
                                function = "uart3";
                        };
+
+                       /omit-if-no-ref/
+                       uart4_pg_pins: uart4-pg-pins {
+                               pins = "PG10", "PG11";
+                               function = "uart4";
+                       };
+
+                       /omit-if-no-ref/
+                       uart5_ph_pins: uart5-ph-pins {
+                               pins = "PH6", "PH7";
+                               function = "uart5";
+                       };
+
+                       /omit-if-no-ref/
+                       uart7_pi_pins: uart7-pi-pins {
+                               pins = "PI20", "PI21";
+                               function = "uart7";
+                       };
+               };
+
+               timer@1c20c00 {
+                       compatible = "allwinner,sun4i-a10-timer";
+                       reg = <0x01c20c00 0x90>;
+                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&osc24M>;
                };
 
                wdt: watchdog@1c20c90 {
@@ -680,6 +746,45 @@
                        status = "disabled";
                };
 
+               i2s0: i2s@1c22000 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun8i-r40-i2s",
+                                    "allwinner,sun8i-h3-i2s";
+                       reg = <0x01c22000 0x400>;
+                       interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+                       clock-names = "apb", "mod";
+                       resets = <&ccu RST_BUS_I2S0>;
+                       dmas = <&dma 3>, <&dma 3>;
+                       dma-names = "rx", "tx";
+               };
+
+               i2s1: i2s@1c22400 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun8i-r40-i2s",
+                                    "allwinner,sun8i-h3-i2s";
+                       reg = <0x01c22400 0x400>;
+                       interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
+                       clock-names = "apb", "mod";
+                       resets = <&ccu RST_BUS_I2S1>;
+                       dmas = <&dma 4>, <&dma 4>;
+                       dma-names = "rx", "tx";
+               };
+
+               i2s2: i2s@1c22800 {
+                       #sound-dai-cells = <0>;
+                       compatible = "allwinner,sun8i-r40-i2s",
+                                    "allwinner,sun8i-h3-i2s";
+                       reg = <0x01c22800 0x400>;
+                       interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
+                       clock-names = "apb", "mod";
+                       resets = <&ccu RST_BUS_I2S2>;
+                       dmas = <&dma 6>, <&dma 6>;
+                       dma-names = "rx", "tx";
+               };
+
                ths: thermal-sensor@1c24c00 {
                        compatible = "allwinner,sun8i-r40-ths";
                        reg = <0x01c24c00 0x100>;
@@ -831,6 +936,15 @@
                        #size-cells = <0>;
                };
 
+               can0: can@1c2bc00 {
+                       compatible = "allwinner,sun8i-r40-can";
+                       reg = <0x01c2bc00 0x400>;
+                       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CAN>;
+                       resets = <&ccu RST_BUS_CAN>;
+                       status = "disabled";
+               };
+
                i2c4: i2c@1c2c000 {
                        compatible = "allwinner,sun6i-a31-i2c";
                        reg = <0x01c2c000 0x400>;
@@ -1117,8 +1231,8 @@
                        reg-io-width = <1>;
                        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
-                                <&ccu CLK_HDMI>;
-                       clock-names = "iahb", "isfr", "tmds";
+                                <&ccu CLK_HDMI>, <&rtc 0>;
+                       clock-names = "iahb", "isfr", "tmds", "cec";
                        resets = <&ccu RST_BUS_HDMI1>;
                        reset-names = "ctrl";
                        phys = <&hdmi_phy>;

diff --git a/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts
new file mode 100644 (file)
index 0000000..6931aaa
--- /dev/null
+++ b/arch/arm/dts/sun8i-t3-cqa3t-bv3.dts
@@ -0,0 +1,226 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ * Copyright (C) 2018 Hao Zhang <hao5781286@gmail.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-r40.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       model = "t3-cqa3t-bv3";
+       compatible = "qihua,t3-cqa3t-bv3", "allwinner,sun8i-t3",
+                    "allwinner,sun8i-r40";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; /* PH23 */
+               enable-active-high;
+       };
+};
+
+&ahci {
+       ahci-supply = <&reg_dldo4>;
+       phy-supply = <&reg_eldo3>;
+       status = "okay";
+};
+
+&de {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&ehci2 {
+       status = "okay";
+};
+
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
+&i2c0 {
+       status = "okay";
+
+       axp22x: pmic@34 {
+               compatible = "x-powers,axp221";
+               reg = <0x34>;
+               interrupt-parent = <&nmi_intc>;
+               interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
+#include "axp22x.dtsi"
+
+&mmc0 {
+       vmmc-supply = <&reg_dcdc1>;
+       bus-width = <4>;
+       cd-gpios = <&pio 7 15 GPIO_ACTIVE_LOW>; /* PH15 */
+       status = "okay";
+};
+
+&mmc2 {
+       vmmc-supply = <&reg_dcdc1>;
+       vqmmc-supply = <&reg_dcdc1>;
+       bus-width = <8>;
+       non-removable;
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&reg_aldo2 {
+       regulator-always-on;
+       regulator-min-microvolt = <2500000>;
+       regulator-max-microvolt = <2500000>;
+       regulator-name = "vcc-pa";
+};
+
+&reg_aldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <2700000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "avcc";
+};
+
+&reg_dcdc1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3000000>;
+       regulator-max-microvolt = <3000000>;
+       regulator-name = "vcc-3v0";
+};
+
+&reg_dcdc2 {
+       regulator-always-on;
+       regulator-min-microvolt = <1000000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+       regulator-always-on;
+       regulator-min-microvolt = <1000000>;
+       regulator-max-microvolt = <1300000>;
+       regulator-name = "vdd-sys";
+};
+
+&reg_dcdc5 {
+       regulator-always-on;
+       regulator-min-microvolt = <1500000>;
+       regulator-max-microvolt = <1500000>;
+       regulator-name = "vcc-dram";
+};
+
+&reg_dldo1 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-pg";
+};
+
+&reg_dldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <3300000>;
+       regulator-max-microvolt = <3300000>;
+       regulator-name = "vcc-dldo3";
+};
+
+&reg_eldo3 {
+       regulator-always-on;
+       regulator-min-microvolt = <2800000>;
+       regulator-max-microvolt = <2800000>;
+       regulator-name = "vcc-pe";
+};
+
+&tcon_tv0 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pb_pins>;
+       status = "okay";
+};
+
+&usbphy {
+       usb1_vbus-supply = <&reg_vcc5v0>;
+       usb2_vbus-supply = <&reg_vcc5v0>;
+       status = "okay";
+};