sh: boards: Change clock definition of SCIF and TMU
authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Wed, 21 Aug 2013 07:11:21 +0000 (16:11 +0900)
committerNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Thu, 17 Oct 2013 00:43:36 +0000 (09:43 +0900)
This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to
CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ to
CONFIG_SH_TMU_CLK_FREQ for boards.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
20 files changed:
include/configs/MigoR.h
include/configs/ap325rxa.h
include/configs/ap_sh4a_4a.h
include/configs/ecovec.h
include/configs/espt.h
include/configs/mpr2.h
include/configs/ms7720se.h
include/configs/ms7722se.h
include/configs/ms7750se.h
include/configs/r0p7734.h
include/configs/r2dplus.h
include/configs/r7780mp.h
include/configs/rsk7203.h
include/configs/rsk7264.h
include/configs/rsk7269.h
include/configs/sh7752evb.h
include/configs/sh7757lcr.h
include/configs/sh7763rdp.h
include/configs/sh7785lcr.h
include/configs/shmin.h

index dc4a768..d536ebd 100644 (file)
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         (4)     /* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ          1000
 
index af3a427..07ec8a7 100644 (file)
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         (4)     /* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ          1000
 
index b911291..ada42d7 100644 (file)
 #else
 #define CONFIG_SYS_CLK_FREQ 44444444
 #endif
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV      4
 #define CONFIG_SYS_HZ       1000
 
index 2c9594b..34bd0b3 100644 (file)
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ 41666666
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV      4
 #define CONFIG_SYS_HZ       1000
 
index e906efb..f1a44bc 100644 (file)
@@ -98,6 +98,8 @@
 
 /* Clock */
 #define CONFIG_SYS_CLK_FREQ    66666666
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV      4
 #define CONFIG_SYS_HZ       1000
 
index 7e18723..b0b23a6 100644 (file)
@@ -67,6 +67,8 @@
 
 /* Clocks */
 #define CONFIG_SYS_CLK_FREQ    24000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         4       /* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ          1000
 
index bc8bb8d..d6b1762 100644 (file)
@@ -85,6 +85,8 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         4       /* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ          1000
 
index a757737..787c255 100644 (file)
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         (4)     /* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ          1000
 
index c4c96bf..37ef02e 100644 (file)
@@ -82,6 +82,8 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         4
 #define CONFIG_SYS_HZ          1000
 
index 0804480..5894f5f 100644 (file)
 #else
 #define CONFIG_SYS_CLK_FREQ 44444444
 #endif
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV      4
 #define CONFIG_SYS_HZ       1000
 
index 65dcffb..8c11b99 100644 (file)
@@ -77,6 +77,8 @@
  * SuperH Clock setting
  */
 #define CONFIG_SYS_CLK_FREQ    60000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         4
 #define CONFIG_SYS_HZ          1000
 #define        CONFIG_SYS_PLL_SETTLING_TIME    100/* in us */
index dd1caf1..07c9903 100644 (file)
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         4
 #define CONFIG_SYS_HZ          1000
 
index d7473c3..2e96883 100644 (file)
@@ -85,6 +85,8 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    33333333
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CMT_CLK_DIVIDER        32      /* 8 (default), 32, 128 or 512 */
 #define CONFIG_SYS_HZ                  (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
 
index 783467a..cf7bc63 100644 (file)
@@ -65,6 +65,8 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    36000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CMT_CLK_DIVIDER                32      /* 8 (default), 32, 128 or 512 */
 #define CONFIG_SYS_HZ          (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
 
index 11c2a93..1f4e2f3 100644 (file)
@@ -64,6 +64,8 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    66125000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CMT_CLK_DIVIDER                32      /* 8 (default), 32, 128 or 512 */
 #define CONFIG_SYS_HZ          (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
 
index fb4dc6f..bab7e4d 100644 (file)
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    48000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV 4
 #define CONFIG_SYS_HZ          1000
 #endif /* __SH7752EVB_H */
index af76f49..b0df4da 100644 (file)
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ    48000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV 4
 #define CONFIG_SYS_HZ          1000
 #endif /* __SH7757LCR_H */
index c1d33d8..d0dc102 100644 (file)
@@ -98,6 +98,8 @@
 
 /* Clock */
 #define CONFIG_SYS_CLK_FREQ    66666666
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         (4)     /* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ          1000
 
index 04f1d22..baee07b 100644 (file)
 /* Board Clock */
 /* The SCIF used external clock. system clock only used timer. */
 #define CONFIG_SYS_CLK_FREQ    50000000
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV         4
 #define CONFIG_SYS_HZ          1000
 
index 5fb7176..8cdb8f9 100644 (file)
 #else
 #define CONFIG_SYS_CLK_FREQ 33333333
 #endif /* CONFIG_T_SH7706LSR */
+#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
 #define CONFIG_SYS_TMU_CLK_DIV 4
 #define CONFIG_SYS_HZ  1000