Merge branch 'master' of git://git.denx.de/u-boot
authorStefano Babic <sbabic@denx.de>
Sun, 31 Mar 2019 17:54:10 +0000 (19:54 +0200)
committerStefano Babic <sbabic@denx.de>
Sun, 31 Mar 2019 17:54:10 +0000 (19:54 +0200)
Signed-off-by: Stefano Babic <sbabic@denx.de>
760 files changed:
Kconfig
MAINTAINERS
Makefile
README
arch/arm/cpu/armv7/ls102xa/Kconfig
arch/arm/cpu/armv7/ls102xa/soc.c
arch/arm/cpu/armv8/Kconfig
arch/arm/cpu/armv8/start.S
arch/arm/dts/Makefile
arch/arm/dts/armada-385-amc.dts
arch/arm/dts/armada-385-turris-omnia.dts
arch/arm/dts/armada-388-clearfog.dts
arch/arm/dts/armada-388-gp.dts
arch/arm/dts/armada-38x-controlcenterdc.dts
arch/arm/dts/exynos5422-odroidxu3.dts
arch/arm/dts/kirkwood-dreamplug.dts
arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
arch/arm/dts/r8a7795-salvator-x-u-boot.dts
arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
arch/arm/dts/r8a7796-salvator-x-u-boot.dts
arch/arm/dts/r8a77965-salvator-x-u-boot.dts
arch/arm/dts/r8a77990-ebisu-u-boot.dts
arch/arm/dts/socfpga_stratix10.dtsi
arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
arch/arm/lib/bootm.c
arch/arm/mach-exynos/spl_boot.c
arch/arm/mach-kirkwood/include/mach/config.h
arch/arm/mach-mvebu/include/mach/config.h
arch/mips/dts/Makefile
arch/powerpc/dts/Makefile
board/Arcturus/ucp1020/cmd_arc.c
board/freescale/ls1021aiot/ls1021aiot.c
board/freescale/ls1021aqds/ddr.c
board/freescale/ls1021aqds/ddr.h
board/freescale/ls1021aqds/ls1021aqds.c
board/freescale/ls1021atwr/ls1021atwr.c
board/freescale/lx2160a/eth_lx2160aqds.c
board/raspberrypi/rpi/MAINTAINERS
board/samsung/arndale/MAINTAINERS
board/samsung/common/board.c
board/samsung/common/bootscripts/autoboot.cmd
board/samsung/common/exynos5-dt-types.c
board/samsung/common/misc.c
board/samsung/odroid/odroid.c
board/synopsys/axs10x/Makefile
board/synopsys/axs10x/nand.c [deleted file]
board/synopsys/hsdk/README
board/ti/am57xx/board.c
board/ti/dra7xx/evm.c
board/tqc/tqma6/tqma6.c
cmd/Kconfig
cmd/fastboot.c
cmd/nvedit_efi.c
cmd/spi.c
common/image-android-dt.c
common/spl/spl_fit.c
configs/B4420QDS_NAND_defconfig
configs/B4420QDS_SPIFLASH_defconfig
configs/B4420QDS_defconfig
configs/B4860QDS_NAND_defconfig
configs/B4860QDS_SECURE_BOOT_defconfig
configs/B4860QDS_SPIFLASH_defconfig
configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
configs/B4860QDS_defconfig
configs/BSC9131RDB_NAND_SYSCLK100_defconfig
configs/BSC9131RDB_NAND_defconfig
configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
configs/BSC9131RDB_SPIFLASH_defconfig
configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_NAND_DDRCLK100_defconfig
configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_NAND_DDRCLK133_defconfig
configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_NOR_DDRCLK100_defconfig
configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_NOR_DDRCLK133_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
configs/C29XPCIE_NAND_defconfig
configs/C29XPCIE_NOR_SECBOOT_defconfig
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
configs/C29XPCIE_SPIFLASH_defconfig
configs/C29XPCIE_defconfig
configs/M52277EVB_stmicro_defconfig
configs/M54418TWR_defconfig
configs/M54418TWR_serial_mii_defconfig
configs/M54418TWR_serial_rmii_defconfig
configs/M54451EVB_stmicro_defconfig
configs/M54455EVB_stm33_defconfig
configs/MPC8536DS_36BIT_defconfig
configs/MPC8536DS_SDCARD_defconfig
configs/MPC8536DS_SPIFLASH_defconfig
configs/MPC8536DS_defconfig
configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
configs/P1010RDB-PA_36BIT_NOR_defconfig
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PA_NAND_SECBOOT_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PA_NOR_SECBOOT_defconfig
configs/P1010RDB-PA_NOR_defconfig
configs/P1010RDB-PA_SDCARD_defconfig
configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PA_SPIFLASH_defconfig
configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
configs/P1010RDB-PB_36BIT_NOR_defconfig
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PB_NAND_SECBOOT_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1010RDB-PB_NOR_SECBOOT_defconfig
configs/P1010RDB-PB_NOR_defconfig
configs/P1010RDB-PB_SDCARD_defconfig
configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
configs/P1010RDB-PB_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PC_SDCARD_defconfig
configs/P1020RDB-PC_SPIFLASH_defconfig
configs/P1020RDB-PC_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P1020RDB-PD_SDCARD_defconfig
configs/P1020RDB-PD_SPIFLASH_defconfig
configs/P1020RDB-PD_defconfig
configs/P1021RDB-PC_36BIT_NAND_defconfig
configs/P1021RDB-PC_36BIT_SDCARD_defconfig
configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1021RDB-PC_36BIT_defconfig
configs/P1021RDB-PC_NAND_defconfig
configs/P1021RDB-PC_SDCARD_defconfig
configs/P1021RDB-PC_SPIFLASH_defconfig
configs/P1021RDB-PC_defconfig
configs/P1022DS_36BIT_NAND_defconfig
configs/P1022DS_36BIT_SDCARD_defconfig
configs/P1022DS_36BIT_SPIFLASH_defconfig
configs/P1022DS_36BIT_defconfig
configs/P1022DS_NAND_defconfig
configs/P1022DS_SDCARD_defconfig
configs/P1022DS_SPIFLASH_defconfig
configs/P1022DS_defconfig
configs/P1024RDB_36BIT_defconfig
configs/P1024RDB_NAND_defconfig
configs/P1024RDB_SDCARD_defconfig
configs/P1024RDB_SPIFLASH_defconfig
configs/P1024RDB_defconfig
configs/P1025RDB_36BIT_defconfig
configs/P1025RDB_NAND_defconfig
configs/P1025RDB_SDCARD_defconfig
configs/P1025RDB_SPIFLASH_defconfig
configs/P1025RDB_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P2020RDB-PC_36BIT_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/P2020RDB-PC_SDCARD_defconfig
configs/P2020RDB-PC_SPIFLASH_defconfig
configs/P2020RDB-PC_defconfig
configs/P2041RDB_NAND_defconfig
configs/P2041RDB_SDCARD_defconfig
configs/P2041RDB_SECURE_BOOT_defconfig
configs/P2041RDB_SPIFLASH_defconfig
configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
configs/P2041RDB_defconfig
configs/P3041DS_NAND_SECURE_BOOT_defconfig
configs/P3041DS_NAND_defconfig
configs/P3041DS_SDCARD_defconfig
configs/P3041DS_SECURE_BOOT_defconfig
configs/P3041DS_SPIFLASH_defconfig
configs/P3041DS_SRIO_PCIE_BOOT_defconfig
configs/P3041DS_defconfig
configs/P4080DS_SDCARD_defconfig
configs/P4080DS_SECURE_BOOT_defconfig
configs/P4080DS_SPIFLASH_defconfig
configs/P4080DS_SRIO_PCIE_BOOT_defconfig
configs/P4080DS_defconfig
configs/P5020DS_NAND_SECURE_BOOT_defconfig
configs/P5020DS_NAND_defconfig
configs/P5020DS_SDCARD_defconfig
configs/P5020DS_SECURE_BOOT_defconfig
configs/P5020DS_SPIFLASH_defconfig
configs/P5020DS_SRIO_PCIE_BOOT_defconfig
configs/P5020DS_defconfig
configs/P5040DS_NAND_SECURE_BOOT_defconfig
configs/P5040DS_NAND_defconfig
configs/P5040DS_SDCARD_defconfig
configs/P5040DS_SECURE_BOOT_defconfig
configs/P5040DS_SPIFLASH_defconfig
configs/P5040DS_defconfig
configs/SBx81LIFKW_defconfig
configs/SBx81LIFXCAT_defconfig
configs/T1023RDB_NAND_defconfig
configs/T1023RDB_SDCARD_defconfig
configs/T1023RDB_SECURE_BOOT_defconfig
configs/T1023RDB_SPIFLASH_defconfig
configs/T1023RDB_defconfig
configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
configs/T1024QDS_DDR4_defconfig
configs/T1024QDS_NAND_defconfig
configs/T1024QDS_SDCARD_defconfig
configs/T1024QDS_SECURE_BOOT_defconfig
configs/T1024QDS_SPIFLASH_defconfig
configs/T1024QDS_defconfig
configs/T1024RDB_NAND_defconfig
configs/T1024RDB_SDCARD_defconfig
configs/T1024RDB_SECURE_BOOT_defconfig
configs/T1024RDB_SPIFLASH_defconfig
configs/T1024RDB_defconfig
configs/T1040D4RDB_NAND_defconfig
configs/T1040D4RDB_SDCARD_defconfig
configs/T1040D4RDB_SECURE_BOOT_defconfig
configs/T1040D4RDB_SPIFLASH_defconfig
configs/T1040D4RDB_defconfig
configs/T1040QDS_DDR4_defconfig
configs/T1040QDS_SECURE_BOOT_defconfig
configs/T1040QDS_defconfig
configs/T1040RDB_NAND_defconfig
configs/T1040RDB_SDCARD_defconfig
configs/T1040RDB_SECURE_BOOT_defconfig
configs/T1040RDB_SPIFLASH_defconfig
configs/T1040RDB_defconfig
configs/T1042D4RDB_NAND_defconfig
configs/T1042D4RDB_SDCARD_defconfig
configs/T1042D4RDB_SECURE_BOOT_defconfig
configs/T1042D4RDB_SPIFLASH_defconfig
configs/T1042D4RDB_defconfig
configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
configs/T1042RDB_PI_NAND_defconfig
configs/T1042RDB_PI_SDCARD_defconfig
configs/T1042RDB_PI_SPIFLASH_defconfig
configs/T1042RDB_PI_defconfig
configs/T1042RDB_SECURE_BOOT_defconfig
configs/T1042RDB_defconfig
configs/T2080QDS_NAND_defconfig
configs/T2080QDS_SDCARD_defconfig
configs/T2080QDS_SECURE_BOOT_defconfig
configs/T2080QDS_SPIFLASH_defconfig
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
configs/T2080QDS_defconfig
configs/T2080RDB_NAND_defconfig
configs/T2080RDB_SDCARD_defconfig
configs/T2080RDB_SECURE_BOOT_defconfig
configs/T2080RDB_SPIFLASH_defconfig
configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
configs/T2080RDB_defconfig
configs/T2081QDS_NAND_defconfig
configs/T2081QDS_SDCARD_defconfig
configs/T2081QDS_SPIFLASH_defconfig
configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
configs/T2081QDS_defconfig
configs/T4160QDS_NAND_defconfig
configs/T4160QDS_SDCARD_defconfig
configs/T4160QDS_SECURE_BOOT_defconfig
configs/T4160QDS_defconfig
configs/T4160RDB_defconfig
configs/T4240QDS_NAND_defconfig
configs/T4240QDS_SDCARD_defconfig
configs/T4240QDS_SECURE_BOOT_defconfig
configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
configs/T4240QDS_defconfig
configs/T4240RDB_SDCARD_defconfig
configs/T4240RDB_defconfig
configs/UCP1020_SPIFLASH_defconfig
configs/UCP1020_defconfig
configs/ae350_rv32_defconfig
configs/ae350_rv64_defconfig
configs/am335x_boneblack_vboot_defconfig
configs/am335x_evm_defconfig
configs/am335x_hs_evm_defconfig
configs/am335x_hs_evm_uart_defconfig
configs/am43xx_evm_defconfig
configs/am43xx_evm_qspiboot_defconfig
configs/am43xx_evm_rtconly_defconfig
configs/am43xx_evm_usbhost_boot_defconfig
configs/am43xx_hs_evm_defconfig
configs/am57xx_evm_defconfig
configs/am57xx_hs_evm_defconfig
configs/am57xx_hs_evm_usb_defconfig
configs/ap121_defconfig
configs/ap143_defconfig
configs/aristainetos2_defconfig
configs/aristainetos2b_defconfig
configs/aristainetos_defconfig
configs/at91sam9260ek_dataflash_cs0_defconfig
configs/at91sam9260ek_dataflash_cs1_defconfig
configs/at91sam9261ek_dataflash_cs0_defconfig
configs/at91sam9261ek_dataflash_cs3_defconfig
configs/at91sam9263ek_dataflash_cs0_defconfig
configs/at91sam9263ek_dataflash_defconfig
configs/at91sam9g10ek_dataflash_cs0_defconfig
configs/at91sam9g10ek_dataflash_cs3_defconfig
configs/at91sam9g20ek_dataflash_cs0_defconfig
configs/at91sam9g20ek_dataflash_cs1_defconfig
configs/at91sam9n12ek_mmc_defconfig
configs/at91sam9n12ek_nandflash_defconfig
configs/at91sam9n12ek_spiflash_defconfig
configs/at91sam9rlek_dataflash_defconfig
configs/at91sam9x5ek_dataflash_defconfig
configs/at91sam9x5ek_mmc_defconfig
configs/at91sam9x5ek_nandflash_defconfig
configs/at91sam9x5ek_spiflash_defconfig
configs/at91sam9xeek_dataflash_cs0_defconfig
configs/at91sam9xeek_dataflash_cs1_defconfig
configs/axs101_defconfig
configs/axs103_defconfig
configs/bcm7445_defconfig
configs/beaver_defconfig
configs/bg0900_defconfig
configs/birdland_bav335a_defconfig
configs/birdland_bav335b_defconfig
configs/brppt1_spi_defconfig
configs/cardhu_defconfig
configs/cei-tk1-som_defconfig
configs/cgtqmx6eval_defconfig
configs/chromebit_mickey_defconfig
configs/chromebook_bob_defconfig
configs/chromebook_jerry_defconfig
configs/chromebook_minnie_defconfig
configs/chromebook_speedy_defconfig
configs/cl-som-am57x_defconfig
configs/cl-som-imx7_defconfig
configs/clearfog_defconfig
configs/clearfog_gt_8k_defconfig
configs/cm_fx6_defconfig
configs/cm_t43_defconfig
configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
configs/controlcenterd_36BIT_SDCARD_defconfig
configs/controlcenterdc_defconfig
configs/d2net_v2_defconfig
configs/da850_am18xxevm_defconfig
configs/da850evm_defconfig
configs/dalmore_defconfig
configs/db-88f6720_defconfig
configs/db-88f6820-amc_defconfig
configs/db-88f6820-gp_defconfig
configs/db-mv784mp-gp_defconfig
configs/dh_imx6_defconfig
configs/display5_defconfig
configs/display5_factory_defconfig
configs/dms-ba16-1g_defconfig
configs/dms-ba16_defconfig
configs/dra7xx_evm_defconfig
configs/dra7xx_hs_evm_defconfig
configs/dra7xx_hs_evm_usb_defconfig
configs/dreamplug_defconfig
configs/ds109_defconfig
configs/ds414_defconfig
configs/e2220-1170_defconfig
configs/ea20_defconfig
configs/ethernut5_defconfig
configs/evb-rk3036_defconfig
configs/evb-rk3128_defconfig
configs/evb-rk3288_defconfig
configs/evb-rk3328_defconfig
configs/evb-rk3399_defconfig
configs/fennec-rk3288_defconfig
configs/ficus-rk3399_defconfig
configs/firefly-rk3288_defconfig
configs/firefly-rk3399_defconfig
configs/ge_bx50v3_defconfig
configs/helios4_defconfig
configs/inetspace_v2_defconfig
configs/jetson-tk1_defconfig
configs/k2e_evm_defconfig
configs/k2e_hs_evm_defconfig
configs/k2g_evm_defconfig
configs/k2g_hs_evm_defconfig
configs/k2hk_evm_defconfig
configs/k2hk_hs_evm_defconfig
configs/k2l_evm_defconfig
configs/k2l_hs_evm_defconfig
configs/km_kirkwood_128m16_defconfig
configs/km_kirkwood_defconfig
configs/km_kirkwood_pci_defconfig
configs/kmcoge4_defconfig
configs/kmcoge5un_defconfig
configs/kmlion1_defconfig
configs/kmnusa_defconfig
configs/kmsugp1_defconfig
configs/kmsuv31_defconfig
configs/kylin-rk3036_defconfig
configs/legoev3_defconfig
configs/ls1012aqds_qspi_defconfig
configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
configs/ls1012aqds_tfa_defconfig
configs/ls1043aqds_defconfig
configs/ls1043aqds_lpuart_defconfig
configs/ls1043aqds_nand_defconfig
configs/ls1043aqds_nor_ddr3_defconfig
configs/ls1043aqds_sdcard_ifc_defconfig
configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
configs/ls1043aqds_tfa_defconfig
configs/ls1043ardb_SECURE_BOOT_defconfig
configs/ls1043ardb_defconfig
configs/ls1043ardb_nand_SECURE_BOOT_defconfig
configs/ls1043ardb_nand_defconfig
configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
configs/ls1043ardb_sdcard_defconfig
configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
configs/ls1043ardb_tfa_defconfig
configs/ls1046aqds_SECURE_BOOT_defconfig
configs/ls1046aqds_defconfig
configs/ls1046aqds_lpuart_defconfig
configs/ls1046aqds_nand_defconfig
configs/ls1046aqds_sdcard_ifc_defconfig
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
configs/ls1046aqds_tfa_defconfig
configs/lschlv2_defconfig
configs/lsxhl_defconfig
configs/marsboard_defconfig
configs/maxbcm_defconfig
configs/mccmon6_nor_defconfig
configs/mccmon6_sd_defconfig
configs/meesc_dataflash_defconfig
configs/mgcoge3un_defconfig
configs/miqi-rk3288_defconfig
configs/mscc_jr2_defconfig
configs/mscc_luton_defconfig
configs/mscc_ocelot_defconfig
configs/mscc_serval_defconfig
configs/mscc_servalt_defconfig
configs/mvebu_db-88f3720_defconfig
configs/mvebu_db_armada8k_defconfig
configs/mvebu_espressobin-88f3720_defconfig
configs/mvebu_mcbin-88f8040_defconfig
configs/mx28evk_auart_console_defconfig
configs/mx28evk_defconfig
configs/mx28evk_nand_defconfig
configs/mx28evk_spi_defconfig
configs/mx31pdk_defconfig
configs/mx6qsabrelite_defconfig
configs/mx6sabreauto_defconfig
configs/mx6sabresd_defconfig
configs/mx6slevk_defconfig
configs/mx6slevk_spinor_defconfig
configs/mx6slevk_spl_defconfig
configs/mx6sxsabreauto_defconfig
configs/mx6sxsabresd_defconfig
configs/mx6ul_14x14_evk_defconfig
configs/mx6ul_9x9_evk_defconfig
configs/mx6ull_14x14_evk_defconfig
configs/mx6ull_14x14_evk_plugin_defconfig
configs/mx7dsabresd_qspi_defconfig
configs/net2big_v2_defconfig
configs/netspace_lite_v2_defconfig
configs/netspace_max_v2_defconfig
configs/netspace_mini_v2_defconfig
configs/netspace_v2_defconfig
configs/nitrogen6dl2g_defconfig
configs/nitrogen6dl_defconfig
configs/nitrogen6q2g_defconfig
configs/nitrogen6q_defconfig
configs/nitrogen6s1g_defconfig
configs/nitrogen6s_defconfig
configs/nyan-big_defconfig
configs/odroid-xu3_defconfig
configs/omapl138_lcdk_defconfig
configs/ot1200_defconfig
configs/ot1200_spl_defconfig
configs/p2371-0000_defconfig
configs/p2371-2180_defconfig
configs/p2571_defconfig
configs/pcm051_rev1_defconfig
configs/pcm051_rev3_defconfig
configs/pcm058_defconfig
configs/peach-pi_defconfig
configs/peach-pit_defconfig
configs/pfla02_defconfig
configs/phycore-rk3288_defconfig
configs/popmetal-rk3288_defconfig
configs/portl2_defconfig
configs/puma-rk3399_defconfig
configs/riotboard_defconfig
configs/riotboard_spl_defconfig
configs/rock2_defconfig
configs/rock960-rk3399_defconfig
configs/rock_defconfig
configs/sama5d27_som1_ek_mmc1_defconfig
configs/sama5d27_som1_ek_mmc_defconfig
configs/sama5d2_xplained_emmc_defconfig
configs/sama5d2_xplained_mmc_defconfig
configs/sama5d2_xplained_spiflash_defconfig
configs/sama5d36ek_cmp_mmc_defconfig
configs/sama5d36ek_cmp_nandflash_defconfig
configs/sama5d36ek_cmp_spiflash_defconfig
configs/sama5d3xek_mmc_defconfig
configs/sama5d3xek_nandflash_defconfig
configs/sama5d3xek_spiflash_defconfig
configs/sama5d4_xplained_mmc_defconfig
configs/sama5d4_xplained_nandflash_defconfig
configs/sama5d4_xplained_spiflash_defconfig
configs/sama5d4ek_mmc_defconfig
configs/sama5d4ek_nandflash_defconfig
configs/sama5d4ek_spiflash_defconfig
configs/smdk5250_defconfig
configs/smdk5420_defconfig
configs/snow_defconfig
configs/socfpga_sr1500_defconfig
configs/socfpga_stratix10_defconfig
configs/spring_defconfig
configs/stmark2_defconfig
configs/tec-ng_defconfig
configs/theadorable_debug_defconfig
configs/tinker-rk3288_defconfig
configs/topic_miami_defconfig
configs/topic_miamilite_defconfig
configs/topic_miamiplus_defconfig
configs/tqma6dl_mba6_mmc_defconfig
configs/tqma6dl_mba6_spi_defconfig
configs/tqma6q_mba6_mmc_defconfig
configs/tqma6q_mba6_spi_defconfig
configs/tqma6s_mba6_mmc_defconfig
configs/tqma6s_mba6_spi_defconfig
configs/trimslice_defconfig
configs/turris_mox_defconfig
configs/turris_omnia_defconfig
configs/uDPU_defconfig
configs/usb_a9263_dataflash_defconfig
configs/venice2_defconfig
configs/vinco_defconfig
configs/vyasa-rk3288_defconfig
configs/x530_defconfig
configs/zc5202_defconfig
configs/zc5601_defconfig
configs/zynq_cc108_defconfig
configs/zynq_cse_qspi_defconfig
configs/zynq_dlc20_rev1_0_defconfig
configs/zynq_microzed_defconfig
configs/zynq_minized_defconfig
configs/zynq_z_turn_defconfig
configs/zynq_zc702_defconfig
configs/zynq_zc706_defconfig
configs/zynq_zc770_xm010_defconfig
configs/zynq_zc770_xm013_defconfig
configs/zynq_zed_defconfig
configs/zynq_zybo_defconfig
configs/zynq_zybo_z7_defconfig
doc/README.uefi
doc/device-tree-bindings/regulator/regulator.txt
doc/git-mailrc
drivers/adc/exynos-adc.c
drivers/clk/renesas/clk-rcar-gen2.c
drivers/ddr/marvell/a38x/ddr3_training_db.c
drivers/ddr/marvell/a38x/ddr3_training_hw_algo.c
drivers/fastboot/fb_common.c
drivers/i2c/i2c-cdns.c
drivers/mmc/mmc.c
drivers/mmc/sh_mmcif.c
drivers/mmc/tmio-common.c
drivers/mtd/spi/Kconfig
drivers/net/fsl-mc/mc.c
drivers/net/ldpaa_eth/ls1088a.c
drivers/net/ldpaa_eth/lx2160a.c
drivers/pci/pci_mvebu.c
drivers/power/regulator/regulator-uclass.c
drivers/power/regulator/s2mps11_regulator.c
drivers/usb/gadget/udc/udc-uclass.c
dts/Makefile
env/Kconfig
env/sf.c
fs/ext4/ext4_write.c
include/command.h
include/configs/B4860QDS.h
include/configs/BSC9131RDB.h
include/configs/BSC9132QDS.h
include/configs/C29XPCIE.h
include/configs/M52277EVB.h
include/configs/M54418TWR.h
include/configs/M54451EVB.h
include/configs/M54455EVB.h
include/configs/MPC8536DS.h
include/configs/P1010RDB.h
include/configs/P1022DS.h
include/configs/P2041RDB.h
include/configs/SBx81LIFKW.h
include/configs/SBx81LIFXCAT.h
include/configs/T102xQDS.h
include/configs/T102xRDB.h
include/configs/T1040QDS.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240QDS.h
include/configs/T4240RDB.h
include/configs/UCP1020.h
include/configs/adp-ae3xx.h
include/configs/advantech_dms-ba16.h
include/configs/am335x_evm.h
include/configs/am43xx_evm.h
include/configs/am57xx_evm.h
include/configs/ap121.h
include/configs/ap143.h
include/configs/aristainetos-common.h
include/configs/aristainetos.h
include/configs/aristainetos2.h
include/configs/aristainetos2b.h
include/configs/at91sam9260ek.h
include/configs/at91sam9261ek.h
include/configs/at91sam9263ek.h
include/configs/at91sam9n12ek.h
include/configs/at91sam9rlek.h
include/configs/at91sam9x5ek.h
include/configs/ax25-ae350.h
include/configs/axs10x.h
include/configs/bav335x.h
include/configs/bcm7445.h
include/configs/beaver.h
include/configs/bg0900.h
include/configs/brppt1.h
include/configs/cardhu.h
include/configs/cei-tk1-som.h
include/configs/cgtqmx6eval.h
include/configs/cl-som-am57x.h
include/configs/cl-som-imx7.h
include/configs/clearfog.h
include/configs/cm_fx6.h
include/configs/cm_t43.h
include/configs/controlcenterd.h
include/configs/controlcenterdc.h
include/configs/corenet_ds.h
include/configs/da850evm.h
include/configs/dalmore.h
include/configs/db-88f6720.h
include/configs/db-88f6820-amc.h
include/configs/db-88f6820-gp.h
include/configs/db-mv784mp-gp.h
include/configs/dh_imx6.h
include/configs/display5.h
include/configs/dra7xx_evm.h
include/configs/dreamplug.h
include/configs/ds109.h
include/configs/ds414.h
include/configs/e2220-1170.h
include/configs/ea20.h
include/configs/el6x_common.h
include/configs/embestmx6boards.h
include/configs/espresso7420.h
include/configs/ethernut5.h
include/configs/exynos5-common.h
include/configs/exynos5-dt-common.h
include/configs/ge_bx50v3.h
include/configs/gw_ventana.h
include/configs/helios4.h
include/configs/jetson-tk1.h
include/configs/k2g_evm.h
include/configs/km/km_arm.h
include/configs/km/kmp204x-common.h
include/configs/lacie_kw.h
include/configs/legoev3.h
include/configs/ls1012a_common.h
include/configs/ls1012aqds.h
include/configs/ls1021aiot.h
include/configs/ls1021atwr.h
include/configs/ls1043a_common.h
include/configs/ls1046a_common.h
include/configs/ls1046aqds.h
include/configs/ls1088a_common.h
include/configs/ls1088aqds.h
include/configs/ls2080a_common.h
include/configs/lsxl.h
include/configs/lx2160a_common.h
include/configs/maxbcm.h
include/configs/mccmon6.h
include/configs/meesc.h
include/configs/microblaze-generic.h
include/configs/mvebu_armada-37xx.h
include/configs/mvebu_armada-8k.h
include/configs/mx28evk.h
include/configs/mx31pdk.h
include/configs/mx6sabre_common.h
include/configs/mx6slevk.h
include/configs/mx6sxsabreauto.h
include/configs/mx6sxsabresd.h
include/configs/mx6ul_14x14_evk.h
include/configs/mx6ullevk.h
include/configs/mx7dsabresd.h
include/configs/nitrogen6x.h
include/configs/nyan-big.h
include/configs/odroid.h
include/configs/odroid_xu3.h
include/configs/omapl138_lcdk.h
include/configs/ot1200.h
include/configs/p1_p2_rdb_pc.h
include/configs/p2371-0000.h
include/configs/p2371-2180.h
include/configs/p2571.h
include/configs/pcm051.h
include/configs/pcm058.h
include/configs/pfla02.h
include/configs/pm9261.h
include/configs/pm9263.h
include/configs/puma_rk3399.h
include/configs/rk3036_common.h
include/configs/rk3128_common.h
include/configs/rk3188_common.h
include/configs/rk3288_common.h
include/configs/rk3328_common.h
include/configs/rk3399_common.h
include/configs/sama5d27_som1_ek.h
include/configs/sama5d2_xplained.h
include/configs/sama5d3xek.h
include/configs/sama5d4_xplained.h
include/configs/sama5d4ek.h
include/configs/siemens-am33x-common.h
include/configs/socfpga_common.h
include/configs/socfpga_sr1500.h
include/configs/socfpga_stratix10_socdk.h
include/configs/stmark2.h
include/configs/taurus.h
include/configs/tec-ng.h
include/configs/theadorable.h
include/configs/ti_armv7_common.h
include/configs/ti_armv7_keystone2.h
include/configs/topic_miami.h
include/configs/tqma6.h
include/configs/trimslice.h
include/configs/turris_mox.h
include/configs/turris_omnia.h
include/configs/usb_a9263.h
include/configs/vcoreiii.h
include/configs/venice2.h
include/configs/vinco.h
include/configs/x530.h
include/configs/zynq-common.h
include/efi_api.h
include/ext4fs.h
include/pci.h
include/power/regulator.h
include/samsung/misc.h
include/spi_flash.h
lib/efi_loader/efi_boottime.c
lib/efi_loader/efi_file.c
lib/efi_loader/efi_hii.c
lib/efi_loader/efi_memory.c
lib/efi_loader/efi_variable.c
lib/efi_selftest/efi_freestanding.c [new file with mode: 0644]
lib/efi_selftest/efi_selftest_devicepath_util.c
lib/efi_selftest/efi_selftest_hii.c
lib/rsa/rsa-verify.c
lib/time.c
scripts/Makefile.extrawarn
scripts/Makefile.lib
scripts/Makefile.spl
scripts/config_whitelist.txt
tools/fit_image.c

diff --git a/Kconfig b/Kconfig
index 512c7be..305b265 100644 (file)
--- a/Kconfig
+++ b/Kconfig
@@ -226,7 +226,8 @@ config BUILD_ROM
 
 config BUILD_TARGET
        string "Build target special images"
-       default "u-boot-with-spl.sfp" if ARCH_SOCFPGA
+       default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10
+       default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
        default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
        default "u-boot-elf.srec" if RCAR_GEN3
        default "u-boot.itb" if SPL_LOAD_FIT && ARCH_SUNXI
index 4fabb75..3166ec7 100644 (file)
@@ -12,13 +12,8 @@ Descriptions of section entries:
        S: Status, one of the following:
           Supported:   Someone is actually paid to look after this.
           Maintained:  Someone actually looks after it.
-          Odd Fixes:   It has a maintainer but they don't have time to do
-                       much other than throw the odd patch in. See below..
           Orphan:      No current maintainer [but maybe you could take the
                        role as you write your new code].
-          Obsolete:    Old code. Something tagged obsolete generally means
-                       it has been replaced by a better system and you
-                       should be using that.
        F: Files and directories with wildcard patterns.
           A trailing slash includes all files and subdirectory files.
           F:   drivers/net/    all files in and below drivers/net
@@ -166,16 +161,19 @@ S:        Maintained
 F:     arch/arm/cpu/armv8/hisilicon
 F:     arch/arm/include/asm/arch-hi6220/
 
-ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX
-M:     Prafulla Wadaskar <prafulla@marvell.com>
-M:     Luka Perkov <luka.perkov@sartura.hr>
+ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K
 M:     Stefan Roese <sr@denx.de>
 S:     Maintained
 T:     git git://git.denx.de/u-boot-marvell.git
 F:     arch/arm/mach-kirkwood/
 F:     arch/arm/mach-mvebu/
 F:     drivers/ata/ahci_mvebu.c
-F:     drivers/phy/marvell/
+F:     drivers/ddr/marvell/
+F:     drivers/gpio/mvebu_gpio.c
+F:     drivers/spi/kirkwood_spi.c
+F:     drivers/pci/pci_mvebu.c
+F:     drivers/pci/pcie_dw_mvebu.c
+F:     drivers/watchdog/orion_wdt.c
 
 ARM MARVELL PXA
 M:     Marek Vasut <marex@denx.de>
@@ -456,7 +454,7 @@ EFI PAYLOAD
 M:     Heinrich Schuchardt <xypron.glpk@gmx.de>
 R:     Alexander Graf <agraf@csgraf.de>
 S:     Maintained
-T:     git git://github.com/agraf/u-boot.git
+T:     git git://git.denx.de/u-boot-efi.git
 F:     doc/README.uefi
 F:     doc/README.iscsi
 F:     Documentation/efi.rst
index 26db4e7..c1af930 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
 VERSION = 2019
 PATCHLEVEL = 04
 SUBLEVEL =
-EXTRAVERSION = -rc3
+EXTRAVERSION = -rc4
 NAME =
 
 # *DOCUMENTATION*
@@ -893,7 +893,7 @@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
        >$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
 
 quiet_cmd_mkfitimage = MKIMAGE $@
-cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -E -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@\
+cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@\
        >$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
 
 quiet_cmd_cat = CAT     $@
@@ -1200,6 +1200,12 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
        $(call if_changed,mkimage)
        $(BOARD_SIZE_CHECK)
 
+ifeq ($(CONFIG_SPL_LOAD_FIT_FULL),y)
+MKIMAGEFLAGS_u-boot.itb =
+else
+MKIMAGEFLAGS_u-boot.itb = -E
+endif
+
 u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
        $(call if_changed,mkfitimage)
        $(BOARD_SIZE_CHECK)
diff --git a/README b/README
index 6525b81..c9a20db 100644 (file)
--- a/README
+++ b/README
@@ -2130,21 +2130,6 @@ The following options need to be configured:
                this is instead controlled by the value of
                /config/load-environment.
 
-- Serial Flash support
-               Usage requires an initial 'sf probe' to define the serial
-               flash parameters, followed by read/write/erase/update
-               commands.
-
-               The following defaults may be provided by the platform
-               to handle the common case when only a single serial
-               flash is present on the system.
-
-               CONFIG_SF_DEFAULT_BUS           Bus identifier
-               CONFIG_SF_DEFAULT_CS            Chip-select
-               CONFIG_SF_DEFAULT_MODE          (see include/spi.h)
-               CONFIG_SF_DEFAULT_SPEED         in Hz
-
-
 - TFTP Fixed UDP Port:
                CONFIG_TFTP_PORT
 
index 5d6a711..94fa682 100644 (file)
@@ -4,6 +4,7 @@ config ARCH_LS1021A
        select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
        select SYS_FSL_ERRATUM_A008378
        select SYS_FSL_ERRATUM_A008407
+       select SYS_FSL_ERRATUM_A008850
        select SYS_FSL_ERRATUM_A008997
        select SYS_FSL_ERRATUM_A009007
        select SYS_FSL_ERRATUM_A009008
@@ -63,6 +64,11 @@ config SYS_CCI400_OFFSET
          Offset for CCI400 base.
          CCI400 base addr = CCSRBAR + CCI400_OFFSET
 
+config SYS_FSL_ERRATUM_A008850
+       bool
+       help
+         Workaround for DDR erratum A008850
+
 config SYS_FSL_ERRATUM_A008997
        bool
        help
index 448d951..a779d33 100644 (file)
@@ -11,6 +11,7 @@
 #include <asm/arch/ls102xa_soc.h>
 #include <asm/arch/ls102xa_stream_id.h>
 #include <fsl_csu.h>
+#include <fsl_ddr_sdram.h>
 
 struct liodn_id_table sec_liodn_tbl[] = {
        SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10),
@@ -103,6 +104,41 @@ static void erratum_a009007(void)
 #endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */
 }
 
+static void erratum_a008850_early(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008850
+       /* part 1 of 2 */
+       struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR +
+                                               CONFIG_SYS_CCI400_OFFSET);
+       struct ccsr_ddr __iomem *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
+
+       /* disables propagation of barrier transactions to DDRC from CCI400 */
+       out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);
+
+       /* disable the re-ordering in DDRC */
+       out_be32(&ddr->eor, DDR_EOR_RD_REOD_DIS | DDR_EOR_WD_REOD_DIS);
+#endif
+}
+
+void erratum_a008850_post(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008850
+       /* part 2 of 2 */
+       struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR +
+                                               CONFIG_SYS_CCI400_OFFSET);
+       struct ccsr_ddr __iomem *ddr = (void *)CONFIG_SYS_FSL_DDR_ADDR;
+       u32 tmp;
+
+       /* enable propagation of barrier transactions to DDRC from CCI400 */
+       out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
+
+       /* enable the re-ordering in DDRC */
+       tmp = in_be32(&ddr->eor);
+       tmp &= ~(DDR_EOR_RD_REOD_DIS | DDR_EOR_WD_REOD_DIS);
+       out_be32(&ddr->eor, tmp);
+#endif
+}
+
 void s_init(void)
 {
 }
@@ -163,13 +199,6 @@ int arch_soc_init(void)
                 */
                out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
                out_le32(&cci->slave[2].sha_ord, CCI400_SHAORD_NON_SHAREABLE);
-
-               /* Workaround for the issue that DDR could not respond to
-                * barrier transaction which is generated by executing DSB/ISB
-                * instruction. Set CCI-400 control override register to
-                * terminate the barrier transaction. After DDR is initialized,
-                * allow barrier transaction to DDR again */
-               out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);
        }
 
        /* Enable all the snoop signal for various masters */
@@ -191,6 +220,7 @@ int arch_soc_init(void)
        out_be32(&scfg->eddrtqcfg, 0x63b20042);
 
        /* Erratum */
+       erratum_a008850_early();
        erratum_a009008();
        erratum_a009798();
        erratum_a008997();
index f053603..7405c3a 100644 (file)
@@ -3,7 +3,7 @@ if ARM64
 config ARMV8_SPL_EXCEPTION_VECTORS
        bool "Install crash dump exception vectors"
        depends on SPL
-       default y
+       default n
        help
          The default exception vector table is only used for the crash
          dump, but still takes quite a lot of space in the image size.
index 12a78ee..fe52166 100644 (file)
@@ -88,7 +88,7 @@ pie_fixup_done:
        bl reset_sctrl
 #endif
 
-#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
 .macro set_vbar, regname, reg
        msr     \regname, \reg
 .endm
@@ -354,7 +354,7 @@ ENDPROC(smp_kick_all_cpus)
 /*-----------------------------------------------------------------------*/
 
 ENTRY(c_runtime_cpu_setup)
-#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
        /* Relocate vBAR */
        adr     x0, vectors
        switch_el x1, 3f, 2f, 1f
index 2a040b2..0e2ffdb 100644 (file)
@@ -16,6 +16,8 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
 
 dtb-$(CONFIG_TARGET_HIKEY) += hi6220-hikey.dtb
 
+dtb-$(CONFIG_TARGET_POPLAR) += hi3798cv200-poplar.dtb
+
 dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
        exynos5250-snow.dtb \
        exynos5250-spring.dtb \
@@ -25,10 +27,44 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
        exynos5800-peach-pi.dtb \
        exynos5422-odroidxu3.dtb
 dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
+
+dtb-$(CONFIG_ARCH_DAVINCI) += \
+       da850-evm.dtb \
+       da850-lcdk.dtb
+
+dtb-$(CONFIG_KIRKWOOD) += \
+       kirkwood-atl-sbx81lifkw.dtb \
+       kirkwood-atl-sbx81lifxcat.dtb \
+       kirkwood-blackarmor-nas220.dtb \
+       kirkwood-d2net.dtb \
+       kirkwood-dns325.dtb \
+       kirkwood-dockstar.dtb \
+       kirkwood-dreamplug.dtb \
+       kirkwood-ds109.dtb \
+       kirkwood-goflexnet.dtb \
+       kirkwood-guruplug-server-plus.dtb \
+       kirkwood-ib62x0.dtb \
+       kirkwood-iconnect.dtb \
+       kirkwood-is2.dtb \
+       kirkwood-km_kirkwood.dtb \
+       kirkwood-lsxhl.dtb \
+       kirkwood-lschlv2.dtb \
+       kirkwood-net2big.dtb \
+       kirkwood-ns2.dtb \
+       kirkwood-ns2lite.dtb \
+       kirkwood-ns2max.dtb \
+       kirkwood-ns2mini.dtb \
+       kirkwood-pogo_e02.dtb \
+       kirkwood-sheevaplug.dtb
+
+dtb-$(CONFIG_ARCH_OWL) += \
+       bubblegum_96.dtb
+
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
        rk3036-sdk.dtb \
        rk3128-evb.dtb \
        rk3188-radxarock.dtb \
+       rk3229-evb.dtb \
        rk3288-evb.dtb \
        rk3288-fennec.dtb \
        rk3288-firefly.dtb \
@@ -50,6 +86,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
        rk3368-px5-evb.dtb \
        rk3399-evb.dtb \
        rk3399-firefly.dtb \
+       rk3399-gru-bob.dtb \
        rk3399-puma-ddr1333.dtb \
        rk3399-puma-ddr1600.dtb \
        rk3399-puma-ddr1866.dtb \
@@ -96,12 +133,13 @@ dtb-$(CONFIG_ARCH_MVEBU) +=                        \
        armada-3720-db.dtb                      \
        armada-3720-espressobin.dtb             \
        armada-3720-turris-mox.dtb              \
-       armada-3720-uDPU.dts                    \
+       armada-3720-uDPU.dtb                    \
        armada-375-db.dtb                       \
        armada-388-clearfog.dtb                 \
        armada-388-gp.dtb                       \
        armada-388-helios4.dtb                  \
        armada-385-amc.dtb                      \
+       armada-385-turris-omnia.dtb             \
        armada-7040-db.dtb                      \
        armada-7040-db-nand.dtb                 \
        armada-8040-db.dtb                      \
@@ -140,6 +178,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
        uniphier-sld8-ref.dtb
 
 dtb-$(CONFIG_ARCH_ZYNQ) += \
+       bitmain-antminer-s9.dtb \
        zynq-cc108.dtb \
        zynq-cse-nand.dtb \
        zynq-cse-nor.dtb \
@@ -156,6 +195,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
        zynq-zc706.dtb \
        zynq-zc770-xm010.dtb \
        zynq-zc770-xm011.dtb \
+       zynq-zc770-xm011-x16.dtb \
        zynq-zc770-xm012.dtb \
        zynq-zc770-xm013.dtb \
        zynq-zed.dtb \
@@ -192,7 +232,14 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
        versal-mini-emmc1.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
        zynqmp-r5.dtb
-dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \
+dtb-$(CONFIG_AM33XX) += \
+       am335x-baltos.dtb \
+       am335x-bone.dtb \
+       am335x-boneblack.dtb \
+       am335x-brppt1-mmc.dtb \
+       am335x-brppt1-nand.dtb \
+       am335x-brppt1-spi.dtb \
+       am335x-brxre1.dtb \
        am335x-draco.dtb \
        am335x-evm.dtb \
        am335x-evmsk.dtb \
@@ -209,6 +256,7 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
        am43x-epos-evm.dtb \
        am437x-idk-evm.dtb \
        am4372-generic.dtb
+dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb
 dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
 dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
 
@@ -355,6 +403,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
        sun7i-a20-olinuxino-lime2.dtb \
        sun7i-a20-olinuxino-lime2-emmc.dtb \
        sun7i-a20-olinuxino-micro.dtb \
+       sun7i-a20-olinuxino-micro-emmc.dtb \
        sun7i-a20-orangepi.dtb \
        sun7i-a20-orangepi-mini.dtb \
        sun7i-a20-pcduino3.dtb \
@@ -383,7 +432,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
        sun8i-a83t-allwinner-h8homlet-v2.dtb \
        sun8i-a83t-bananapi-m3.dtb \
        sun8i-a83t-cubietruck-plus.dtb \
-       sun8i-a83t-tbs-a711.dts
+       sun8i-a83t-tbs-a711.dtb
 dtb-$(CONFIG_MACH_SUN8I_H3) += \
        sun8i-h2-plus-bananapi-m2-zero.dtb \
        sun8i-h2-plus-libretech-all-h3-cc.dtb \
@@ -408,6 +457,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
 dtb-$(CONFIG_MACH_SUN8I_V3S) += \
        sun8i-v3s-licheepi-zero.dtb
 dtb-$(CONFIG_MACH_SUN50I_H5) += \
+       sun50i-h5-bananapi-m2-plus.dtb \
        sun50i-h5-emlid-neutis-n5-devboard.dtb \
        sun50i-h5-libretech-all-h3-cc.dtb \
        sun50i-h5-nanopi-neo2.dtb \
@@ -426,6 +476,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
        sun50i-a64-nanopi-a64.dtb \
        sun50i-a64-olinuxino.dtb \
        sun50i-a64-orangepi-win.dtb \
+       sun50i-a64-pine64-lts.dtb \
        sun50i-a64-pine64-plus.dtb \
        sun50i-a64-pine64.dtb \
        sun50i-a64-pinebook.dtb \
@@ -441,7 +492,12 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
        pcm052.dtb \
        bk4r1.dtb
 
-dtb-$(CONFIG_MX53) += imx53-cx9020.dtb
+dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
+       imx53-kp.dtb
+
+dtb-$(CONFIG_MX6Q) += \
+       imx6q-display5.dtb \
+       imx6q-logicpd.dtb
 
 dtb-$(CONFIG_MX6QDL) += \
        imx6dl-icore.dtb \
@@ -452,7 +508,6 @@ dtb-$(CONFIG_MX6QDL) += \
        imx6q-icore.dtb \
        imx6q-icore-mipi.dtb \
        imx6q-icore-rqs.dtb \
-       imx6q-logicpd.dtb \
        imx6q-sabreauto.dtb \
        imx6q-sabresd.dtb \
        imx6dl-sabreauto.dtb \
@@ -462,7 +517,7 @@ dtb-$(CONFIG_MX6QDL) += \
 
 dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb
 
-dtb-$(CONFIG_MX6SL) += imx6sll-evk.dtb
+dtb-$(CONFIG_MX6SLL) += imx6sll-evk.dtb
 
 dtb-$(CONFIG_MX6SX) += \
        imx6sx-sabreauto.dtb \
@@ -477,12 +532,19 @@ dtb-$(CONFIG_MX6UL) += \
        imx6ul-9x9-evk.dtb \
        imx6ul-9x9-evk.dtb \
        imx6ul-liteboard.dtb \
-       imx6ul-phycore-segin.dtb
+       imx6ul-phycore-segin.dtb \
+       imx6ul-pico-hobbit.dtb \
+       imx6ul-pico-pi.dtb
 
-dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
+dtb-$(CONFIG_MX6ULL) += \
+       imx6ull-14x14-evk.dtb \
+       imx6ull-colibri.dtb \
 
 dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
-       imx7d-sdb-qspi.dtb
+       imx7d-sdb-qspi.dtb \
+       imx7-colibri-emmc.dtb \
+       imx7-colibri-rawnand.dtb \
+       imx7s-warp.dtb
 
 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
 
@@ -490,6 +552,16 @@ dtb-$(CONFIG_ARCH_IMX8) += fsl-imx8qxp-mek.dtb
 
 dtb-$(CONFIG_ARCH_IMX8M) += fsl-imx8mq-evk.dtb
 
+dtb-$(CONFIG_RCAR_GEN2) += \
+       r8a7790-lager-u-boot.dtb \
+       r8a7790-stout-u-boot.dtb \
+       r8a7791-koelsch-u-boot.dtb \
+       r8a7791-porter-u-boot.dtb \
+       r8a7792-blanche-u-boot.dtb \
+       r8a7793-gose-u-boot.dtb \
+       r8a7794-alt-u-boot.dtb \
+       r8a7794-silk-u-boot.dtb
+
 dtb-$(CONFIG_RCAR_GEN3) += \
        r8a7795-h3ulcb-u-boot.dtb \
        r8a7795-salvator-x-u-boot.dtb \
@@ -509,8 +581,12 @@ dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
 
 dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
 
+dtb-$(CONFIG_TARGET_PM9261) += at91sam9261ek.dtb
+
 dtb-$(CONFIG_TARGET_PM9263) += at91sam9263ek.dtb
 
+dtb-$(CONFIG_TARGET_MEESC) += at91sam9263ek.dtb
+
 dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb
 
 dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb
@@ -531,9 +607,15 @@ dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
 
 dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb
 
+dtb-$(CONFIG_TARGET_ETHERNUT5) += ethernut5.dtb
+
+dtb-$(CONFIG_TARGET_USB_A9263) += usb_a9263.dtb
+
 dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
-       logicpd-torpedo-37xx-devkit.dtb \
-       logicpd-som-lv-37xx-devkit.dtb
+       logicpd-som-lv-35xx-devkit.dtb \
+       logicpd-som-lv-37xx-devkit.dtb \
+       logicpd-torpedo-35xx-devkit.dtb \
+       logicpd-torpedo-37xx-devkit.dtb
 
 dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
        omap3-evm-37xx.dtb \
@@ -582,9 +664,16 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
        bcm2835-rpi-b-plus.dtb \
        bcm2835-rpi-b-rev2.dtb \
        bcm2835-rpi-b.dtb \
+       bcm2835-rpi-zero-w.dtb \
        bcm2836-rpi-2-b.dtb \
        bcm2837-rpi-3-b.dtb
 
+dtb-$(CONFIG_ARCH_BCM63158) += \
+       bcm963158.dtb
+
+dtb-$(CONFIG_ARCH_BCM6858) += \
+       bcm968580xref.dtb
+
 dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
 
 dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
index d4d127f..c9ccbb5 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        pcie@1,0 {
                                /* Port 0, Lane 0 */
index 28eede1..5511c84 100644 (file)
@@ -96,7 +96,7 @@
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
 
                        pcie@1,0 {
index a3493dd..4ddeaa0 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        /*
                         * The two PCIe units are accessible through
index 7bc878f..d5ad2fd 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        /*
                         * One PCIe units is accessible through
index ffbd0dc..bad7c60 100644 (file)
                        };
                };
 
-               pcie-controller {
+               pcie {
                        status = "okay";
                        /*
                         * The two PCIe units are accessible through
index e859dd1..6df6be9 100644 (file)
@@ -32,6 +32,7 @@
 
        adc@12D10000 {
                u-boot,dm-pre-reloc;
+               vdd-supply = <&ldo4_reg>;
                status = "okay";
        };
 
@@ -44,6 +45,7 @@
                                        regulator-name = "vdd_ldo1";
                                        regulator-min-microvolt = <1000000>;
                                        regulator-max-microvolt = <1000000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vddq_mmc0";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                };
 
                                ldo4_reg: LDO4 {
                                        regulator-name = "vdd_adc";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                };
 
                                ldo5_reg: LDO5 {
                                        regulator-name = "vdd_ldo5";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
@@ -70,6 +75,7 @@
                                        regulator-name = "vdd_ldo6";
                                        regulator-min-microvolt = <1000000>;
                                        regulator-max-microvolt = <1000000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
@@ -77,6 +83,7 @@
                                        regulator-name = "vdd_ldo7";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
@@ -84,6 +91,7 @@
                                        regulator-name = "vdd_ldo8";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
@@ -91,6 +99,7 @@
                                        regulator-name = "vdd_ldo9";
                                        regulator-min-microvolt = <3000000>;
                                        regulator-max-microvolt = <3000000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vdd_ldo10";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vdd_ldo11";
                                        regulator-min-microvolt = <1000000>;
                                        regulator-max-microvolt = <1000000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vdd_ldo12";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vddq_mmc2";
                                        regulator-min-microvolt = <2800000>;
                                        regulator-max-microvolt = <2800000>;
+                                       regulator-ramp-delay = <12000>;
                                };
 
                                ldo15_reg: LDO15 {
                                        regulator-name = "vdd_ldo15";
                                        regulator-min-microvolt = <3300000>;
                                        regulator-max-microvolt = <3300000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vdd_ldo16";
                                        regulator-min-microvolt = <2200000>;
                                        regulator-max-microvolt = <2200000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vdd_ldo17";
                                        regulator-min-microvolt = <3300000>;
                                        regulator-max-microvolt = <3300000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vdd_emmc_1V8";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
+                                       regulator-ramp-delay = <12000>;
                                };
 
                                ldo19_reg: LDO19 {
                                        regulator-name = "vdd_sd";
                                        regulator-min-microvolt = <2800000>;
                                        regulator-max-microvolt = <2800000>;
+                                       regulator-ramp-delay = <12000>;
                                };
 
                                ldo24_reg: LDO24 {
                                        regulator-name = "tsp_io";
                                        regulator-min-microvolt = <2800000>;
                                        regulator-max-microvolt = <2800000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
                                        regulator-name = "vdd_ldo26";
                                        regulator-min-microvolt = <3000000>;
                                        regulator-max-microvolt = <3000000>;
+                                       regulator-ramp-delay = <12000>;
                                        regulator-always-on;
                                };
 
        };
 
        serial@12C20000 {
-               status="okay";
+               status = "okay";
        };
 
        mmc@12200000 {
index a647a65..ccd74dd 100644 (file)
                stdout-path = &uart0;
        };
 
+       aliases {
+               spi0 = &spi0;
+       };
+
        ocp@f1000000 {
                pinctrl: pin-controller@10000 {
                        pmx_led_bluetooth: pmx-led-bluetooth {
index ebbd234..3de6407 100644 (file)
        };
 };
 
+&vcc_sdhi0 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
 &sdhi2_pins {
        groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
        power-source = <1800>;
index 8be5e41..a22028b 100644 (file)
@@ -8,6 +8,14 @@
 #include "r8a7795-salvator-x.dts"
 #include "r8a7795-u-boot.dtsi"
 
+&vcc_sdhi0 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
+&vcc_sdhi3 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
 &sdhi2_pins {
        groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
        power-source = <1800>;
index 4e96008..612cc87 100644 (file)
        };
 };
 
+&vcc_sdhi0 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
 &sdhi2_pins {
        groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
        power-source = <1800>;
index 44b2f9f..c730b90 100644 (file)
@@ -8,6 +8,14 @@
 #include "r8a7796-salvator-x.dts"
 #include "r8a7796-u-boot.dtsi"
 
+&vcc_sdhi0 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
+&vcc_sdhi3 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
 &sdhi2_pins {
        groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
        power-source = <1800>;
index 9e0cd26..cfc0f74 100644 (file)
@@ -8,6 +8,14 @@
 #include "r8a77965-salvator-x.dts"
 #include "r8a77965-u-boot.dtsi"
 
+&vcc_sdhi0 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
+&vcc_sdhi3 {
+       u-boot,off-on-delay-us = <20000>;
+};
+
 &sdhi2_pins {
        groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
        power-source = <1800>;
index b030d5c..4c1669e 100644 (file)
@@ -36,6 +36,7 @@
 
                gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
                enable-active-high;
+               u-boot,off-on-delay-us = <20000>;
        };
 
        vccq_sdhi0: regulator-vccq-sdhi0 {
@@ -60,6 +61,7 @@
 
                gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
                enable-active-high;
+               u-boot,off-on-delay-us = <20000>;
        };
 
        vccq_sdhi1: regulator-vccq-sdhi1 {
index ccd3f32..ee93725 100644 (file)
@@ -95,6 +95,7 @@
                        mac-address = [00 00 00 00 00 00];
                        resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
                        reset-names = "stmmaceth";
+                       altr,sysmgr-syscon = <&sysmgr 0x44 0>;
                        status = "disabled";
                };
 
                        mac-address = [00 00 00 00 00 00];
                        resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
                        reset-names = "stmmaceth";
+                       altr,sysmgr-syscon = <&sysmgr 0x48 0>;
                        status = "disabled";
                };
 
                        mac-address = [00 00 00 00 00 00];
                        resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
                        reset-names = "stmmaceth";
+                       altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
                        status = "disabled";
                };
 
index 05e8b49..1fde8bc 100644 (file)
@@ -10,6 +10,8 @@ unsigned int get_soc_major_rev(void);
 int arch_soc_init(void);
 int ls102xa_smmu_stream_id_init(void);
 
+void erratum_a008850_post(void);
+
 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
 void erratum_a010315(void);
 #endif
index 329f20c..bf68a5b 100644 (file)
@@ -88,8 +88,6 @@ __weak void board_quiesce_devices(void)
  */
 static void announce_and_cleanup(int fake)
 {
-       printf("\nStarting kernel ...%s\n\n", fake ?
-               "(fake run for tracing)" : "");
        bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
 #ifdef CONFIG_BOOTSTAGE_FDT
        bootstage_fdt_add_report();
@@ -104,6 +102,8 @@ static void announce_and_cleanup(int fake)
 
        board_quiesce_devices();
 
+       printf("\nStarting kernel ...%s\n\n", fake ?
+               "(fake run for tracing)" : "");
        /*
         * Call remove function of all devices with a removal flag set.
         * This may be useful for last-stage operations, like cancelling
index b4945bd..103bb38 100644 (file)
@@ -107,7 +107,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
 {
        int upto, todo;
        int i, timeout = 100;
-       struct exynos_spi *regs = (struct exynos_spi *)CONFIG_ENV_SPI_BASE;
+       struct exynos_spi *regs = (struct exynos_spi *)CONFIG_SYS_SPI_BASE;
 
        set_spi_clk(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */
        /* set the spi1 GPIO */
index fcd9038..893bd3f 100644 (file)
 #define CONFIG_KIRKWOOD_EGIGA_INIT     /* Enable GbePort0/1 for kernel */
 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */
 #define CONFIG_KIRKWOOD_PCIE_INIT       /* Enable PCIE Port0 for kernel */
+/*
+ * Disable the dcache. Currently the network driver (mvgbe.c) and USB
+ * EHCI driver (ehci-marvell.c) and possibly others rely on the data
+ * cache being disabled.
+ */
+#define CONFIG_SYS_DCACHE_OFF
 
 /*
  * By default kwbimage.cfg from board specific folder is used
 #endif
 
 /*
- * SPI Flash configuration
- */
-#ifdef CONFIG_CMD_SF
-#ifndef CONFIG_ENV_SPI_BUS
-# define CONFIG_ENV_SPI_BUS            0
-#endif
-#ifndef CONFIG_ENV_SPI_CS
-# define CONFIG_ENV_SPI_CS             0
-#endif
-#ifndef CONFIG_ENV_SPI_MAX_HZ
-# define CONFIG_ENV_SPI_MAX_HZ         50000000
-#endif
-#endif
-
-/*
  * Ethernet Driver configuration
  */
 #ifdef CONFIG_CMD_NET
index e3235fc..71c4f70 100644 (file)
 
 #define MV_UART_CONSOLE_BASE           MVEBU_UART0_BASE
 
-/*
- * SPI Flash configuration
- */
-#ifdef CONFIG_CMD_SF
-#ifndef CONFIG_ENV_SPI_BUS
-# define CONFIG_ENV_SPI_BUS            0
-#endif
-#ifndef CONFIG_ENV_SPI_CS
-# define CONFIG_ENV_SPI_CS             0
-#endif
-#ifndef CONFIG_ENV_SPI_MAX_HZ
-# define CONFIG_ENV_SPI_MAX_HZ         50000000
-#endif
-#endif
-
 /* Needed for SPI NOR booting in SPL */
 #define CONFIG_DM_SEQ_ALIAS            1
 
index b94b582..665d3cc 100644 (file)
@@ -1,5 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0+
 
+dtb-$(CONFIG_ARCH_MT7620) += \
+       gardena-smart-gateway-mt7688.dtb \
+       linkit-smart-7688.dtb
 dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
 dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
 dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
@@ -17,6 +20,8 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
 dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
 dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
 dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
+dtb-$(CONFIG_SOC_BMIPS_BCM6358) += sfr,nb4-ser.dtb
+dtb-$(CONFIG_SOC_BMIPS_BCM6838) += brcm,bcm968380gerg.dtb
 dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
 dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
 dtb-$(CONFIG_SOC_JR2) += jr2_pcb110.dtb jr2_pcb111.dtb serval2_pcb112.dtb
index 172bed4..f080a96 100644 (file)
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 
 dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
-dtb-$(CONFIG_MCR3000) += mcr3000.dtb
+dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb
 
 targets += $(dtb-y)
 
index 1c42fee..9579d52 100644 (file)
 
 #include <asm/io.h>
 
-#ifndef CONFIG_SF_DEFAULT_SPEED
-#   define CONFIG_SF_DEFAULT_SPEED     1000000
-#endif
-#ifndef CONFIG_SF_DEFAULT_MODE
-#   define CONFIG_SF_DEFAULT_MODE      SPI_MODE0
-#endif
-#ifndef CONFIG_SF_DEFAULT_CS
-#   define CONFIG_SF_DEFAULT_CS                0
-#endif
-#ifndef CONFIG_SF_DEFAULT_BUS
-#   define CONFIG_SF_DEFAULT_BUS       0
-#endif
-
 #define MAX_SERIAL_SIZE 15
 #define MAX_HWADDR_SIZE 17
 
index fb05b55..70992a5 100644 (file)
@@ -97,6 +97,8 @@ int dram_init(void)
        ddrmc_init();
 #endif
 
+       erratum_a008850_post();
+
        gd->ram_size = DDR_SIZE;
        return 0;
 }
index 98faf93..d3e2e53 100644 (file)
@@ -179,6 +179,8 @@ int fsl_initdram(void)
        fsl_dp_resume();
 #endif
 
+       erratum_a008850_post();
+
        gd->ram_size = dram_size;
 
        return 0;
index ff1fe8e..58a8838 100644 (file)
@@ -5,6 +5,9 @@
 
 #ifndef __DDR_H__
 #define __DDR_H__
+
+void erratum_a008850_post(void);
+
 struct board_specific_parameters {
        u32 n_ranks;
        u32 datarate_mhz_high;
index c08be1e..2ca2bd9 100644 (file)
@@ -200,10 +200,6 @@ int board_early_init_f(void)
 #ifdef CONFIG_SPL_BUILD
 void board_init_f(ulong dummy)
 {
-       struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
-                                       CONFIG_SYS_CCI400_OFFSET);
-       unsigned int major;
-
 #ifdef CONFIG_NAND_BOOT
        struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
        u32 porsr1, pinctl;
@@ -240,10 +236,6 @@ void board_init_f(ulong dummy)
        i2c_init_all();
 #endif
 
-       major = get_soc_major_rev();
-       if (major == SOC_MAJOR_VER_1_0)
-               out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER);
-
        timer_init();
        dram_init();
 
@@ -420,22 +412,12 @@ int misc_init_r(void)
 
 int board_init(void)
 {
-       struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
-                                       CONFIG_SYS_CCI400_OFFSET);
-       unsigned int major;
-
 #ifdef CONFIG_SYS_FSL_ERRATUM_A010315
        erratum_a010315();
 #endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009942
        erratum_a009942_check_cpo();
 #endif
-       major = get_soc_major_rev();
-       if (major == SOC_MAJOR_VER_1_0) {
-               /* Set CCI-400 control override register to
-                * enable barrier transaction */
-               out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
-       }
 
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
 
@@ -456,18 +438,6 @@ int board_init(void)
 #if defined(CONFIG_DEEP_SLEEP)
 void board_sleep_prepare(void)
 {
-       struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR +
-                                               CONFIG_SYS_CCI400_OFFSET);
-       unsigned int major;
-
-       major = get_soc_major_rev();
-       if (major == SOC_MAJOR_VER_1_0) {
-               /* Set CCI-400 control override register to
-                * enable barrier transaction */
-               out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
-       }
-
-
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
        enable_layerscape_ns_access();
 #endif
index beb82ce..01ba1bc 100644 (file)
@@ -222,6 +222,8 @@ int dram_init(void)
        ddrmc_init();
 #endif
 
+       erratum_a008850_post();
+
        gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
 
 #if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD)
index 1e98d0c..f6e22d7 100644 (file)
@@ -628,8 +628,9 @@ int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle)
 int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset)
 {
        char mdio_ioslot_str[] = "mdio@00";
-       char mdio_mux_str[] = "mdio-mux-0";
        struct lx2160a_qds_mdio *priv;
+       u64 reg;
+       u32 phandle;
        int offset, mux_val;
 
        /*Test if the MDIO bus is real mdio bus or muxing front end ?*/
@@ -643,15 +644,32 @@ int fdt_get_ioslot_offset(void *fdt, struct mii_dev *mii_dev, int fpga_offset)
        debug("real_bus_num = %d, ioslot = %d\n",
              priv->realbusnum, priv->ioslot);
 
-       sprintf(mdio_mux_str, "mdio-mux-%1d", priv->realbusnum);
-       offset = fdt_subnode_offset(fdt, fpga_offset, mdio_mux_str);
+       if (priv->realbusnum == EMI1)
+               reg = CONFIG_SYS_FSL_WRIOP1_MDIO1;
+       else
+               reg = CONFIG_SYS_FSL_WRIOP1_MDIO2;
+
+       offset = fdt_node_offset_by_compat_reg(fdt, "fsl,fman-memac-mdio", reg);
+       if (offset < 0) {
+               printf("mdio@%llx node not found in device tree\n", reg);
+               return offset;
+       }
+
+       phandle = fdt_get_phandle(fdt, offset);
+       phandle = cpu_to_fdt32(phandle);
+       offset = fdt_node_offset_by_prop_value(fdt, -1, "mdio-parent-bus",
+                                              &phandle, 4);
        if (offset < 0) {
-               printf("%s node not found under node %s in device tree\n",
-                      mdio_mux_str, fdt_get_name(fdt, fpga_offset, NULL));
+               printf("mdio-mux-%d node not found in device tree\n",
+                      priv->realbusnum == EMI1 ? 1 : 2);
                return offset;
        }
 
        mux_val = lx2160a_qds_get_mdio_mux_val(priv->realbusnum, priv->ioslot);
+       if (priv->realbusnum == EMI1)
+               mux_val >>= BRDCFG4_EMI1SEL_SHIFT;
+       else
+               mux_val >>= BRDCFG4_EMI2SEL_SHIFT;
        sprintf(mdio_ioslot_str, "mdio@%x", (u8)mux_val);
 
        offset = fdt_subnode_offset(fdt, offset, mdio_ioslot_str);
@@ -675,7 +693,9 @@ int fdt_create_phy_node(void *fdt, int offset, u8 phyaddr, int *subnodeoffset,
 
        *subnodeoffset = fdt_add_subnode(fdt, offset, phy_node_name);
        if (*subnodeoffset <= 0) {
-               printf("Could not add subnode %s\n", phy_node_name);
+               printf("Could not add subnode %s inside node %s err = %s\n",
+                      phy_node_name, fdt_get_name(fdt, offset, NULL),
+                      fdt_strerror(*subnodeoffset));
                return *subnodeoffset;
        }
 
@@ -779,7 +799,6 @@ int fdt_fixup_board_phy(void *fdt)
                        }
                        if (dpmac_id == NUM_WRIOP_PORTS)
                                continue;
-
                        ret = fdt_create_phy_node(fdt, offset, i,
                                                  &subnodeoffset,
                                                  phy_dev, phandle);
@@ -792,6 +811,11 @@ int fdt_fixup_board_phy(void *fdt)
                                fdt_del_node(fdt, subnodeoffset);
                                break;
                        }
+                       /* calculate offset again as new node addition may have
+                        * changed offset;
+                        */
+                       offset = fdt_get_ioslot_offset(fdt, mii_dev,
+                                                      fpga_offset);
                        phandle++;
                }
 
index cce1a7a..4f1b23e 100644 (file)
@@ -1,5 +1,5 @@
 RPI BOARD
-M:     Alexander Graf <agraf@suse.de>
+M:     Matthias Brugger <mbrugger@suse.com>
 S:     Maintained
 F:     board/raspberrypi/rpi/
 F:     include/configs/rpi.h
index 7dc1785..aa64c7a 100644 (file)
@@ -1,5 +1,5 @@
 ARNDALE BOARD
-M:     Chander Kashyap <k.chander@samsung.com>
+M:     Krzysztof Kozlowski <krzk@kernel.org>
 S:     Maintained
 F:     board/samsung/arndale/
 F:     include/configs/arndale.h
index 96228a8..9adbd1e 100644 (file)
@@ -249,11 +249,22 @@ int board_eth_init(bd_t *bis)
        return 0;
 }
 
-#ifdef CONFIG_DISPLAY_BOARDINFO
+#if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
 int checkboard(void)
 {
        if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
-               const char *board_info = get_board_type();
+               const char *board_info;
+
+               if (IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
+                       /*
+                        * Printing type requires having revision, although
+                        * this will succeed only if done late.
+                        * Otherwise revision will be set in misc_init_r().
+                        */
+                       set_board_revision();
+               }
+
+               board_info = get_board_type();
 
                if (board_info)
                        printf("Type:  %s\n", board_info);
@@ -287,6 +298,16 @@ int board_late_init(void)
 #ifdef CONFIG_MISC_INIT_R
 int misc_init_r(void)
 {
+       if (IS_ENABLED(CONFIG_BOARD_TYPES) &&
+           !IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
+               /*
+                * If revision was not set by late display boardinfo,
+                * set it here. At this point regulators should be already
+                * available.
+                */
+               set_board_revision();
+       }
+
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
        set_board_info();
 #endif
index 11c724c..d66bccc 100644 (file)
@@ -3,7 +3,7 @@
 # ./tools/mkimage -c none -A arm -T script -d autoboot.cmd boot.scr
 #
 # It requires a list of environment variables to be defined before load:
-# platform dependent: boardname, fdtfile, console
+# platform dependent: board_name, fdtfile, console
 # system dependent: mmcbootdev, mmcbootpart, mmcrootdev, mmcrootpart, rootfstype
 #
 setenv fdtaddr     "40800000"
@@ -35,17 +35,17 @@ else
        setenv initrd_addr -;
 fi;"
 
-#### Routine: boot_fit - check that env $boardname is set and boot proper config of ITB image
+#### Routine: boot_fit - check that env $board_name is set and boot proper config of ITB image
 setenv setboot_fit "
-if test -e '${boardname}'; then
+if test -e '${board_name}'; then
        setenv fdt_addr ;
        setenv initrd_addr ;
        setenv kerneladdr  0x42000000;
        setenv kernelname  Image.itb;
-       setenv itbcfg      "\"#${boardname}\"";
+       setenv itbcfg      "\"#${board_name}\"";
        setenv imgbootcmd  bootm;
 else
-       echo Warning! Variable: \$boardname is undefined!;
+       echo Warning! Variable: \$board_name is undefined!;
 fi"
 
 #### Routine: setboot_uimg - prepare env to boot uImage
index 7a86e91..516c329 100644 (file)
@@ -57,12 +57,48 @@ static unsigned int odroid_get_rev(void)
        return 0;
 }
 
+/*
+ * Read ADC at least twice and check the resuls.  If regulator providing voltage
+ * on to measured point was just turned on, first reads might require time
+ * to stabilize.
+ */
+static int odroid_get_adc_val(unsigned int *adcval)
+{
+       unsigned int adcval_prev = 0;
+       int ret, retries = 20;
+
+       ret = adc_channel_single_shot("adc", CONFIG_ODROID_REV_AIN,
+                                     &adcval_prev);
+       if (ret)
+               return ret;
+
+       while (retries--) {
+               mdelay(5);
+
+               ret = adc_channel_single_shot("adc", CONFIG_ODROID_REV_AIN,
+                                             adcval);
+               if (ret)
+                       return ret;
+
+               /*
+                * If difference between ADC reads is less than 3%,
+                * accept the result
+                */
+               if ((100 * abs(*adcval - adcval_prev) / adcval_prev) < 3)
+                       return ret;
+
+               adcval_prev = *adcval;
+       }
+
+       return ret;
+}
+
 static int odroid_get_board_type(void)
 {
        unsigned int adcval;
        int ret, i;
 
-       ret = adc_channel_single_shot("adc", CONFIG_ODROID_REV_AIN, &adcval);
+       ret = odroid_get_adc_val(&adcval);
        if (ret)
                goto rev_default;
 
@@ -192,8 +228,11 @@ const char *get_board_type(void)
 
 /**
  * set_board_type() - set board type in gd->board_type.
- * As default type set EXYNOS5_BOARD_GENERIC, if detect Odroid,
- * then set its proper type.
+ * As default type set EXYNOS5_BOARD_GENERIC. If Odroid is detected,
+ * set its proper type based on device tree.
+ *
+ * This might be called early when some more specific ways to detect revision
+ * are not yet available.
  */
 void set_board_type(void)
 {
@@ -211,8 +250,15 @@ void set_board_type(void)
                gd->board_type = of_match->data;
                break;
        }
+}
 
-       /* If Odroid, then check its revision */
+/**
+ * set_board_revision() - set detailed board type in gd->board_type.
+ * Should be called when resources (e.g. regulators) are available
+ * so ADC can be used to detect the specific revision of a board.
+ */
+void set_board_revision(void)
+{
        if (board_is_odroidxu3())
                gd->board_type = odroid_get_board_type();
 }
index 05243fc..53cd1b2 100644 (file)
@@ -101,7 +101,7 @@ void set_board_info(void)
                bdtype = "";
 
        sprintf(info, "%s%s", bdname, bdtype);
-       env_set("boardname", info);
+       env_set("board_name", info);
 #endif
        snprintf(info, ARRAY_SIZE(info),  "%s%x-%s%s.dtb",
                 CONFIG_SYS_SOC, s5p_cpu_id, bdname, bdtype);
index 552333f..3e594fd 100644 (file)
@@ -54,6 +54,14 @@ void set_board_type(void)
                gd->board_type = ODROID_TYPE_U3;
 }
 
+void set_board_revision(void)
+{
+       /*
+        * Revision already set by set_board_type() because it can be
+        * executed early.
+        */
+}
+
 const char *get_board_type(void)
 {
        const char *board_type[] = {"u3", "x2"};
@@ -462,18 +470,33 @@ struct dwc2_plat_otg_data s5pc210_otg_data = {
 
 #if defined(CONFIG_USB_GADGET) || defined(CONFIG_CMD_USB)
 
+static void set_usb3503_ref_clk(void)
+{
+#ifdef CONFIG_BOARD_TYPES
+       /*
+        * gpx3-0 chooses primary (low) or secondary (high) reference clock
+        * frequencies table.  The choice of clock is done through hard-wired
+        * REF_SEL pins.
+        * The Odroid Us have reference clock at 24 MHz (00 entry from secondary
+        * table) and Odroid Xs have it at 26 MHz (01 entry from primary table).
+        */
+       if (gd->board_type == ODROID_TYPE_U3)
+               gpio_direction_output(EXYNOS4X12_GPIO_X30, 0);
+       else
+               gpio_direction_output(EXYNOS4X12_GPIO_X30, 1);
+#else
+       /* Choose Odroid Xs frequency without board types */
+       gpio_direction_output(EXYNOS4X12_GPIO_X30, 1);
+#endif /* CONFIG_BOARD_TYPES */
+}
+
 int board_usb_init(int index, enum usb_init_type init)
 {
 #ifdef CONFIG_CMD_USB
        struct udevice *dev;
        int ret;
 
-       /* Set Ref freq 0 => 24MHz, 1 => 26MHz*/
-       /* Odroid Us have it at 24MHz, Odroid Xs at 26MHz */
-       if (gd->board_type == ODROID_TYPE_U3)
-               gpio_direction_output(EXYNOS4X12_GPIO_X30, 0);
-       else
-               gpio_direction_output(EXYNOS4X12_GPIO_X30, 1);
+       set_usb3503_ref_clk();
 
        /* Disconnect, Reset, Connect */
        gpio_direction_output(EXYNOS4X12_GPIO_X34, 0);
index 340e12c..dd5ee68 100644 (file)
@@ -3,4 +3,3 @@
 # Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved.
 
 obj-y  += axs10x.o
-obj-$(CONFIG_CMD_NAND) += nand.o
diff --git a/board/synopsys/axs10x/nand.c b/board/synopsys/axs10x/nand.c
deleted file mode 100644 (file)
index 8108460..0000000
+++ /dev/null
@@ -1,242 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
- */
-
-#include <bouncebuf.h>
-#include <common.h>
-#include <malloc.h>
-#include <nand.h>
-#include <asm/io.h>
-#include "axs10x.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#define BUS_WIDTH      8               /* AXI data bus width in bytes  */
-
-/* DMA buffer descriptor bits & masks */
-#define BD_STAT_OWN                    (1 << 31)
-#define BD_STAT_BD_FIRST               (1 << 3)
-#define BD_STAT_BD_LAST                        (1 << 2)
-#define BD_SIZES_BUFFER1_MASK          0xfff
-
-#define BD_STAT_BD_COMPLETE    (BD_STAT_BD_FIRST | BD_STAT_BD_LAST)
-
-/* Controller command flags */
-#define B_WFR          (1 << 19)       /* 1b - Wait for ready          */
-#define B_LC           (1 << 18)       /* 1b - Last cycle              */
-#define B_IWC          (1 << 13)       /* 1b - Interrupt when complete */
-
-/* NAND cycle types */
-#define B_CT_ADDRESS   (0x0 << 16)     /* Address operation            */
-#define B_CT_COMMAND   (0x1 << 16)     /* Command operation            */
-#define B_CT_WRITE     (0x2 << 16)     /* Write operation              */
-#define B_CT_READ      (0x3 << 16)     /* Write operation              */
-
-enum nand_isr_t {
-       NAND_ISR_DATAREQUIRED = 0,
-       NAND_ISR_TXUNDERFLOW,
-       NAND_ISR_TXOVERFLOW,
-       NAND_ISR_DATAAVAILABLE,
-       NAND_ISR_RXUNDERFLOW,
-       NAND_ISR_RXOVERFLOW,
-       NAND_ISR_TXDMACOMPLETE,
-       NAND_ISR_RXDMACOMPLETE,
-       NAND_ISR_DESCRIPTORUNAVAILABLE,
-       NAND_ISR_CMDDONE,
-       NAND_ISR_CMDAVAILABLE,
-       NAND_ISR_CMDERROR,
-       NAND_ISR_DATATRANSFEROVER,
-       NAND_ISR_NONE
-};
-
-enum nand_regs_t {
-       AC_FIFO = 0,            /* address and command fifo */
-       IDMAC_BDADDR = 0x18,    /* idmac descriptor list base address */
-       INT_STATUS = 0x118,     /* interrupt status register */
-       INT_CLR_STATUS = 0x120, /* interrupt clear status register */
-};
-
-struct nand_bd {
-       uint32_t status;        /* DES0 */
-       uint32_t sizes;         /* DES1 */
-       uint32_t buffer_ptr0;   /* DES2 */
-       uint32_t buffer_ptr1;   /* DES3 */
-};
-
-#define NAND_REG_WRITE(r, v)   \
-       writel(v, (volatile void __iomem *)(CONFIG_SYS_NAND_BASE + r))
-#define NAND_REG_READ(r)               \
-       readl((const volatile void __iomem *)(CONFIG_SYS_NAND_BASE + r))
-
-static struct nand_bd *bd;     /* DMA buffer descriptors       */
-
-/**
- * axs101_nand_write_buf -  write buffer to chip
- * @mtd:       MTD device structure
- * @buf:       data buffer
- * @len:       number of bytes to write
- */
-static uint32_t nand_flag_is_set(uint32_t flag)
-{
-       uint32_t reg = NAND_REG_READ(INT_STATUS);
-
-       if (reg & (1 << NAND_ISR_CMDERROR))
-               return 0;
-
-       if (reg & (1 << flag)) {
-               NAND_REG_WRITE(INT_CLR_STATUS, 1 << flag);
-               return 1;
-       }
-
-       return 0;
-}
-
-/**
- * axs101_nand_write_buf -  write buffer to chip
- * @mtd:       MTD device structure
- * @buf:       data buffer
- * @len:       number of bytes to write
- */
-static void axs101_nand_write_buf(struct mtd_info *mtd, const u_char *buf,
-                                  int len)
-{
-       struct bounce_buffer bbstate;
-
-       bounce_buffer_start(&bbstate, (void *)buf, len, GEN_BB_READ);
-
-       /* Setup buffer descriptor */
-       writel(BD_STAT_OWN | BD_STAT_BD_COMPLETE, &bd->status);
-       writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes);
-       writel(bbstate.bounce_buffer, &bd->buffer_ptr0);
-       writel(0, &bd->buffer_ptr1);
-
-       /* Flush modified buffer descriptor */
-       flush_dcache_range((unsigned long)bd,
-                          (unsigned long)bd + sizeof(struct nand_bd));
-
-       /* Issue "write" command */
-       NAND_REG_WRITE(AC_FIFO, B_CT_WRITE | B_WFR | B_IWC | B_LC | (len-1));
-
-       /* Wait for NAND command and DMA to complete */
-       while (!nand_flag_is_set(NAND_ISR_CMDDONE))
-               ;
-       while (!nand_flag_is_set(NAND_ISR_TXDMACOMPLETE))
-               ;
-
-       bounce_buffer_stop(&bbstate);
-}
-
-/**
- * axs101_nand_read_buf -  read chip data into buffer
- * @mtd:       MTD device structure
- * @buf:       buffer to store data
- * @len:       number of bytes to read
- */
-static void axs101_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
-{
-       struct bounce_buffer bbstate;
-
-       bounce_buffer_start(&bbstate, buf, len, GEN_BB_WRITE);
-
-       /* Setup buffer descriptor */
-       writel(BD_STAT_OWN | BD_STAT_BD_COMPLETE, &bd->status);
-       writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes);
-       writel(bbstate.bounce_buffer, &bd->buffer_ptr0);
-       writel(0, &bd->buffer_ptr1);
-
-       /* Flush modified buffer descriptor */
-       flush_dcache_range((unsigned long)bd,
-                          (unsigned long)bd + sizeof(struct nand_bd));
-
-       /* Issue "read" command */
-       NAND_REG_WRITE(AC_FIFO, B_CT_READ | B_WFR | B_IWC | B_LC | (len - 1));
-
-       /* Wait for NAND command and DMA to complete */
-       while (!nand_flag_is_set(NAND_ISR_CMDDONE))
-               ;
-       while (!nand_flag_is_set(NAND_ISR_RXDMACOMPLETE))
-               ;
-
-       bounce_buffer_stop(&bbstate);
-}
-
-/**
- * axs101_nand_read_byte -  read one byte from the chip
- * @mtd:       MTD device structure
- */
-static u_char axs101_nand_read_byte(struct mtd_info *mtd)
-{
-       u8 byte;
-
-       axs101_nand_read_buf(mtd, (uchar *)&byte, sizeof(byte));
-       return byte;
-}
-
-/**
- * axs101_nand_read_word -  read one word from the chip
- * @mtd:       MTD device structure
- */
-static u16 axs101_nand_read_word(struct mtd_info *mtd)
-{
-       u16 word;
-
-       axs101_nand_read_buf(mtd, (uchar *)&word, sizeof(word));
-       return word;
-}
-
-/**
- * axs101_nand_hwcontrol - NAND control functions wrapper.
- * @mtd:       MTD device structure
- * @cmd:       Command
- */
-static void axs101_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd,
-                                  unsigned int ctrl)
-{
-       if (cmd == NAND_CMD_NONE)
-               return;
-
-       cmd = cmd & 0xff;
-
-       switch (ctrl & (NAND_ALE | NAND_CLE)) {
-       /* Address */
-       case NAND_ALE:
-               cmd |= B_CT_ADDRESS;
-               break;
-
-       /* Command */
-       case NAND_CLE:
-               cmd |= B_CT_COMMAND | B_WFR;
-
-               break;
-
-       default:
-               debug("%s: unknown ctrl %#x\n", __func__, ctrl);
-       }
-
-       NAND_REG_WRITE(AC_FIFO, cmd | B_LC);
-       while (!nand_flag_is_set(NAND_ISR_CMDDONE))
-               ;
-}
-
-int board_nand_init(struct nand_chip *nand)
-{
-       bd = (struct nand_bd *)memalign(ARCH_DMA_MINALIGN,
-                                       sizeof(struct nand_bd));
-
-       /* Set buffer descriptor address in IDMAC */
-       NAND_REG_WRITE(IDMAC_BDADDR, bd);
-
-       nand->ecc.mode = NAND_ECC_SOFT;
-       nand->cmd_ctrl = axs101_nand_hwcontrol;
-       nand->read_byte = axs101_nand_read_byte;
-       nand->read_word = axs101_nand_read_word;
-       nand->write_buf = axs101_nand_write_buf;
-       nand->read_buf = axs101_nand_read_buf;
-
-       /* MBv3 has NAND IC with 16-bit data bus */
-       if (gd->board_type == AXS_MB_V3)
-               nand->options |= NAND_BUSWIDTH_16;
-
-       return 0;
-}
index e29a6a1..9155f17 100644 (file)
@@ -83,10 +83,11 @@ Useful notes on bulding and using of U-Boot on ARC HS Development Kit (AKA HSDK)
       HSDK board.
 
       Note that Python3 script is used for generation of a header, thus
-      to get that done it's required to have Python3 with elftools installed.
-      On CentOS/RHEL/Fedora this could be installed with:
+      to get that done it's required to have Python3 with "pyelftools" installed.
+
+      "pyelftools" could be installed with help of "pip" even w/o root rights:
       ------------------------->8----------------------
-      sudo dnf install python3-pyelftools
+      python3 -m pip install --user pyelftools
       ------------------------->8----------------------
 
    EXECUTING U-BOOT
index 7063345..1a903f1 100644 (file)
@@ -1096,6 +1096,16 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
+int fastboot_set_reboot_flag(void)
+{
+       printf("Setting reboot to fastboot flag ...\n");
+       env_set("dofastboot", "1");
+       env_save();
+       return 0;
+}
+#endif
+
 #ifdef CONFIG_TI_SECURE_DEVICE
 void board_fit_image_post_process(void **p_image, size_t *p_size)
 {
@@ -1107,15 +1117,5 @@ void board_tee_image_process(ulong tee_image, size_t tee_size)
        secure_tee_install((u32)tee_image);
 }
 
-#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
-int fastboot_set_reboot_flag(void)
-{
-       printf("Setting reboot to fastboot flag ...\n");
-       env_set("dofastboot", "1");
-       env_save();
-       return 0;
-}
-#endif
-
 U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
 #endif
index d69641e..060c471 100644 (file)
@@ -1092,6 +1092,16 @@ int board_fit_config_name_match(const char *name)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
+int fastboot_set_reboot_flag(void)
+{
+       printf("Setting reboot to fastboot flag ...\n");
+       env_set("dofastboot", "1");
+       env_save();
+       return 0;
+}
+#endif
+
 #ifdef CONFIG_TI_SECURE_DEVICE
 void board_fit_image_post_process(void **p_image, size_t *p_size)
 {
@@ -1103,15 +1113,5 @@ void board_tee_image_process(ulong tee_image, size_t tee_size)
        secure_tee_install((u32)tee_image);
 }
 
-#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
-int fastboot_set_reboot_flag(void)
-{
-       printf("Setting reboot to fastboot flag ...\n");
-       env_set("dofastboot", "1");
-       env_save();
-       return 0;
-}
-#endif
-
 U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
 #endif
index 816672e..372a17c 100644 (file)
@@ -155,11 +155,13 @@ __weak void tqma6_iomuxc_spi(void)
                                         ARRAY_SIZE(tqma6_ecspi1_pads));
 }
 
+#if defined(CONFIG_SF_DEFAULT_BUS) && defined(CONFIG_SF_DEFAULT_CS)
 int board_spi_cs_gpio(unsigned bus, unsigned cs)
 {
        return ((bus == CONFIG_SF_DEFAULT_BUS) &&
                (cs == CONFIG_SF_DEFAULT_CS)) ? TQMA6_SF_CS_GPIO : -1;
 }
+#endif
 
 static struct i2c_pads_info tqma6_i2c3_pads = {
        /* I2C3: on board LM75, M24C64,  */
index 4bcc5c4..0b07b3b 100644 (file)
@@ -1040,10 +1040,20 @@ config CMD_SF_TEST
          everything is working properly.
 
 config CMD_SPI
-       bool "sspi"
+       bool "sspi - Command to access spi device"
        help
          SPI utility command.
 
+config DEFAULT_SPI_BUS
+       int "default spi bus used by sspi command"
+       depends on CMD_SPI
+       default 0
+
+config DEFAULT_SPI_MODE
+       hex "default spi mode used by sspi command (see include/spi.h)"
+       depends on CMD_SPI
+       default 0
+
 config CMD_TSI148
        bool "tsi148 - Command to access tsi148 device"
        help
index 0be83b7..1b42151 100644 (file)
@@ -13,6 +13,7 @@
 #include <fastboot.h>
 #include <net.h>
 #include <usb.h>
+#include <watchdog.h>
 
 static int do_fastboot_udp(int argc, char *const argv[],
                           uintptr_t buf_addr, size_t buf_size)
@@ -74,6 +75,7 @@ static int do_fastboot_usb(int argc, char *const argv[],
                        break;
                if (ctrlc())
                        break;
+               WATCHDOG_RESET();
                usb_gadget_handle_interrupts(controller_index);
        }
 
index ca32566..e65b38d 100644 (file)
@@ -80,7 +80,6 @@ static void efi_dump_single_var(u16 *name, efi_guid_t *guid)
        printf(", DataSize = 0x%zx\n", size);
        print_hex_dump("    ", DUMP_PREFIX_OFFSET, 16, 1, data, size, true);
 
-       return;
 out:
        free(data);
 }
index 9a2edcf..75226fd 100644 (file)
--- a/cmd/spi.c
+++ b/cmd/spi.c
 #   define MAX_SPI_BYTES 32    /* Maximum number of bytes we can handle */
 #endif
 
-#ifndef CONFIG_DEFAULT_SPI_BUS
-#   define CONFIG_DEFAULT_SPI_BUS      0
-#endif
-#ifndef CONFIG_DEFAULT_SPI_MODE
-#   define CONFIG_DEFAULT_SPI_MODE     SPI_MODE_0
-#endif
-
 /*
  * Values from last command.
  */
index c0683ee..6916826 100644 (file)
@@ -53,8 +53,8 @@ bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
        entry_size = fdt32_to_cpu(hdr->dt_entry_size);
        unmap_sysmem(hdr);
 
-       if (index > entry_count) {
-               printf("Error: index > dt_entry_count (%u > %u)\n", index,
+       if (index >= entry_count) {
+               printf("Error: index >= dt_entry_count (%u >= %u)\n", index,
                       entry_count);
                return false;
        }
index db43626..c9bfe0c 100644 (file)
@@ -491,6 +491,10 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
 
                if (!spl_fit_image_get_os(fit, node, &os_type))
                        debug("Loadable is %s\n", genimg_get_os_name(os_type));
+#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
+               else
+                       os_type = IH_OS_U_BOOT;
+#endif
 
                if (os_type == IH_OS_U_BOOT) {
                        spl_fit_append_fdt(&image_info, info, sector,
index fd74888..d48bc77 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 8e3b0a7..e576a87 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 29b351a..896df53 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index bfd1bcf..5b15b9c 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 26ad411..e376a19 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 612cb7e..90e19bd 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 9bfed3c..c35c752 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 3232530..03b925f 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 3f271cc..55906fa 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
index 51dc152..e26ad53 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
index 2d3c3d6..2324158 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
index 5a9f10d..0e5a2da 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_CAAM=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
index 1e26861..af1bc88 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 0db36b0..a0c697a 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 005087e..abc0886 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index a37a8a2..d688029 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index d88b6d4..81c3b3b 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 09751ed..a16838c 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 94d099b..dca1260 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 7b4ecee..e56be3f 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 4a53c72..1e5c762 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index ea2e040..f55cb61 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index fc41568..1203bdb 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 622f5ca..407c2e6 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 5eca1f1..a0e9cd8 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index b6f2e69..309159e 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index fc89a74..f086438 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 18f40bb..1af0223 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index aef42ac..94f04d7 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
index efc8dd9..a256315 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
index dcf793b..8629f8a 100644 (file)
@@ -28,6 +28,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
index aaecadb..031ab2c 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
index a487dca..ac525e8 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
index 3628729..cafc861 100644 (file)
@@ -15,6 +15,8 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_DATE=y
 CONFIG_CMD_JFFS2=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=2
 # CONFIG_NET is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
index f69f405..a239f4a 100644 (file)
@@ -20,6 +20,8 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=1
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
index b2266a0..8b72bd3 100644 (file)
@@ -20,6 +20,8 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=1
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
index f69f405..a239f4a 100644 (file)
@@ -20,6 +20,8 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=1
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_MII=y
index ce5f656..b614ca7 100644 (file)
@@ -20,6 +20,8 @@ CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_DATE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=1
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
index fc19de5..467bfae 100644 (file)
@@ -25,6 +25,8 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_JFFS2=y
 CONFIG_ISO_PARTITION=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=1
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
index 654a517..428586a 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index eebc003..1a02f26 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index c376abe..155f227 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 7501488..01863a4 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 568d886..51b6488 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2399330..9e938b2 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index e565b41..b14e7de 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 1723d8d..10a2eff 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 798a0dc..2e38575 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index d8482a3..b24f704 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 3b4992f..9bdbac0 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index b2f000a..036f8e8 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 0dd4d4a..aea4529 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 806bf88..349fc95 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index f1429ab..47c5cca 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index eb3151c..1455291 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 9c759db..0fa105c 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 5513446..bb38e71 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index aee9edf..dcc7d11 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 0f7e989..ce80bad 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index f41e050..6ed4467 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index a7e7ecf..9ea5d83 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index aca0441..69a933c 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 9a0332d..6f43d69 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 7041356..4ec77b8 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 39b62bb..8e76629 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index cdf51c8..1873c13 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 45c7d3c..cc2a04f 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index f1753a3..4178800 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 56200bb..be6ca00 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 60e2e1b..78aef83 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index f44d36c..6efe1aa 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 09fc7d9..13a47f8 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 778a258..96c9f3c 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 3157256..a28913e 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 3dbefd3..8ada9bb 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2cc48c6..6b5c7a5 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 983fbc7..6ab5929 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 0f49a81..afc789b 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2dadfa9..dec97c4 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 58f2571..324881d 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index c6cb7a5..4c72120 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 848ca27..243456c 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 5377df3..0f25faf 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index d03cfc0..c0524e7 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index a086c52..a5bcf76 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2ff094c..c4160b4 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 72c79d7..ae7752b 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 0ee7a35..4221812 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 4c49da3..ebd6b4c 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index ac8c9b2..5ce4384 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index c831333..093c0ae 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index a28d506..e73c54a 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 5e49b03..6a03645 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index cf1b6a0..aa6640c 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index e1fb283..44c950e 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index c69ae01..7d25d55 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index dbf1872..cf90121 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2c05461..81421c9 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 3449838..42c47f7 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index b34dc74..577d9e8 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index ed1b5e5..4eabadf 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 0925c2c..3e35df0 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 398112f..5e92ce1 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2f21e2a..694a2e9 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 30cef8e..703b8d7 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 9e5bf25..2670cf1 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 5ca059c..fec3ac8 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index ebb0475..f8c6486 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2feb9cc..19ac763 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index e16c385..ea80231 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index fb78b20..7f0d3f8 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index e453814..ad0c7cc 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 2d7b823..a9c21fb 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 964f21d..aeb14c8 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 784262e..a2bdcc2 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 6470097..df72a7d 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 7e905dc..706a27d 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 96c388b..44966d8 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 3d5d96e..3d558c5 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 098f40f..f42c141 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index e8698e8..4fb3794 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 75dedf3..ac74a25 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 07c212b..2a70296 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 0f38a46..b1bc659 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index a8dea7d..81ce703 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 40b40fc..7392948 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 06555e8..f7ed963 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 84b5d76..c89ee84 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 8e39410..2bc3f81 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 2d72e76..6bae5a5 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 1a617b2..b67e12a 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 517a3af..0e47d70 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index b90d65e..b108367 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 9b3ba81..a011c8c 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 83a925b..ee4f51d 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 7d420a3..078d70b 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 8c89cca..7cbd790 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 0116c2d..c5438e2 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index ce172a9..16607ae 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 28ac033..0ac8813 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index e81af0e..487ad27 100644 (file)
@@ -28,6 +28,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 7177716..6ef6de9 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 19c41ea..fd277ce 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 3e7c1f7..b2c61d7 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index b12bb8f..dbff8f7 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 66c116f..2469443 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 1c34959..1552f84 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 314d05b..e8ff36e 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index e0ce159..afda7ed 100644 (file)
@@ -20,6 +20,8 @@ CONFIG_CMD_SNTP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_PCA953X=y
index 4a6e058..4cb4797 100644 (file)
@@ -22,6 +22,8 @@ CONFIG_CMD_SNTP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_PCA953X=y
index 22feb6f..767458e 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index de99d16..f3b09d0 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 60c8a47..ebb5ce3 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index b0434ea..dfbc755 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 7a57a75..b334490 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index c38fee0..dd5c006 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 9a9a25b..9d887f1 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index fa031a9..612c63f 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index be461fc..392a180 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index ecebd48..5d8a919 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 8ad4d35..7769acf 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 23ed39e..fbba22c 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 294d126..88eb858 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index e31578c..7078b3d 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 4269133..76e959f 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 148eef0..de60091 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index cb1f264..683a619 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 637fa07..61ab715 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 88f3c28..e07c1e6 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 030f72a..d1b3c1a 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 7adf65c..76b3792 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index c9032c2..17c47de 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index fd2c74f..fad61d4 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 719a1e4..a86936a 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 81454ab..e3ae3d7 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 3287d1b..353feba 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 57d214d..93fd667 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 62d1c30..ea400b2 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index c086a9f..beb8b8c 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 0209fb8..3e7b3e8 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 0bb15cc..73fc6ae 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 1f7cf60..248136d 100644 (file)
@@ -48,6 +48,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index ef9b243..9d40088 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index a2a7d67..abf29ef 100644 (file)
@@ -49,6 +49,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 5d60022..466aea2 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 245abd2..e1ad125 100644 (file)
@@ -54,6 +54,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 0d72714..1c5f6b5 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 4b2d182..d8688aa 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 8c36654..6ab4091 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index ec816e7..d968324 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 2e40362..5072f2a 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 515dec4..2bf2647 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 948a05a..f5609ed 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 30e87df..8af628b 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 9e155ee..dd71811 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 0cccb3a..d0b7d38 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 9c9a436..133dc7d 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 79cf442..7f5a26f 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 4a5a56e..5731a1f 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index dfe5e8b..66a1a11 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 5ec495a..0166821 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 6d6d640..58abfbd 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 297c31f..a5d83bc 100644 (file)
@@ -28,6 +28,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index 4f155de..e782ba0 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
index d38a1e3..a2c4953 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 4dd0e90..1e9686a 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 6dc7d6d..9b55633 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 43fe470..83d5e50 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index 24b616b..e785b58 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index af529b2..3bc51e5 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index b29c069..8afa322 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 4463386..bf7b701 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 4f45229..7834ebf 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 06c8038..c5a8bb0 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index caeeacb..8efb924 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index b461e08..07bda33 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 416b415..2535ea3 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 1169b66..d360f3b 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_FSL_CAAM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index d1f33d7..89cd173 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index 8bde983..ae9d663 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index d9f5845..ef26e7c 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
index d75c1f3..a2d7e66 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
index 7fc6acc..0a676d4 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
index 5837b48..6e0be88 100644 (file)
@@ -27,6 +27,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x0
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_FTMAC100=y
 CONFIG_BAUDRATE=38400
index b250d3f..b472a76 100644 (file)
@@ -28,6 +28,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x0
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_FTMAC100=y
 CONFIG_BAUDRATE=38400
index f455b01..6afda72 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
index 9241168..a6a237f 100644 (file)
@@ -31,7 +31,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
 CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-# CONFIG_BLK is not set
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_NAND=y
@@ -44,6 +43,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
index faa6c2b..1746df9 100644 (file)
@@ -32,7 +32,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
 CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-# CONFIG_BLK is not set
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_NAND=y
@@ -45,6 +44,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
index 02332db..d2d6f2f 100644 (file)
@@ -34,7 +34,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
 CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-# CONFIG_BLK is not set
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_NAND=y
@@ -47,6 +46,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
index e346414..526dda2 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
index 0d7bd72..b644273 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
index 7d56db4..c855705 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
index 5bd919b..e0580b9 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
index c01fda9..76224c6 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
index 3e2c166..3d71020 100644 (file)
@@ -57,6 +57,8 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=76800000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
index 685334c..9b71afa 100644 (file)
@@ -60,6 +60,8 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=76800000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
index 6e4580a..c49140e 100644 (file)
@@ -65,6 +65,8 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=76800000
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MICREL=y
index c9dbe4d..eca24e9 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6144k
 # CONFIG_ISO_PARTITION is not set
 CONFIG_DEFAULT_DEVICE_TREE="ap121"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=25000000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
index 7c1a296..9a5a9f8 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:256k(u-boot),64k(u-boot-env),6336k
 # CONFIG_ISO_PARTITION is not set
 CONFIG_DEFAULT_DEVICE_TREE="ap143"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=25000000
 # CONFIG_NET is not set
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
index f7de4e3..b852b4d 100644 (file)
@@ -39,6 +39,10 @@ CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=3
+CONFIG_SF_DEFAULT_CS=1
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
index ff21f1f..7806d0a 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
index 950f9f6..bad6aeb 100644 (file)
@@ -39,6 +39,9 @@ CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=3
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
index 7fd844c..9b0aa07 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index c2fc77d..1e5d540 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 431cf28..e036ebc 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index e5efad8..b67aa90 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index a19f309..4f8694f 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index a19f309..4f8694f 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 7bf0b79..6f71d34 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index b4e8892..644d59d 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 688c182..c064d01 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 1eb4379..1e409ea 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 6b2cfe9..4eb1652 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
index fd83ba0..b04d95b 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
index 6388935..ef8371f 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
index 800a92c..88c0a43 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 # CONFIG_NET is not set
 CONFIG_DM=y
 CONFIG_CLK=y
index 010d731..1330207 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index ff86f93..b615299 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index bdb2b9a..842047f 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index d0eebcd..28060ee 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index ac6d9de..b125182 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 56c6f12..c07008a 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 6ef6616..0bfb532 100644 (file)
@@ -14,7 +14,6 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="AXS# "
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
index 2208bdb..0c8af40 100644 (file)
@@ -14,7 +14,6 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="AXS# "
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_NAND=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
index a09ac5c..97098bf 100644 (file)
@@ -8,6 +8,9 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_BOOTDELAY=1
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot>"
+CONFIG_CMD_SF=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SPI=y
 CONFIG_OF_PRIOR_STAGE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_MMC_SDHCI=y
index 41e94e0..29f61c1 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_RTL8169=y
 CONFIG_PCI=y
index 2bafc79..2c4d3e3 100644 (file)
@@ -23,6 +23,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=2
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
@@ -32,6 +33,9 @@ CONFIG_DOS_PARTITION=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MII=y
 CONFIG_CONS_INDEX=0
index 17015b9..eea1223 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
index af3dbcf..7358fe5 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x82000000
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
index 12bb8cd..739b078 100644 (file)
@@ -83,6 +83,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD_DEVICE=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
index 5ba6751..985a125 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu"
 CONFIG_SPL_DM=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_RTL8169=y
 CONFIG_PCI=y
index 2747847..746cb03 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_RTL8169=y
 CONFIG_PCI=y
index 99c581b..2311c4f 100644 (file)
@@ -56,6 +56,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHYLIB=y
 CONFIG_MII=y
 CONFIG_SPI=y
index ea19c69..d7c343b 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
index 92c65b1..ce3decc 100644 (file)
@@ -66,6 +66,7 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
index 617c706..5943db0 100644 (file)
@@ -64,6 +64,7 @@ CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
index 297d0e4..2a1f1c1 100644 (file)
@@ -61,6 +61,7 @@ CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
index 624b8f8..aeaee38 100644 (file)
@@ -62,6 +62,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 # CONFIG_SPL_PINCTRL_FULL is not set
index cd780cd..fd8353e 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_LED_STATUS_BIT=37
 CONFIG_LED_STATUS_STATE=2
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
index 3501e2b..2b26e66 100644 (file)
@@ -51,6 +51,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
index c90600e..0429071 100644 (file)
@@ -48,6 +48,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHY_MARVELL=y
index ee84877..b388cc4 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_MAC_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-8040-clearfog-gt-8k"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_AHCI_MVEBU=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
@@ -44,12 +45,14 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_XENON=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHYLIB=y
+CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
+CONFIG_MVPP2=y
 CONFIG_NVME=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
index c8d1e83..6156ac2 100644 (file)
@@ -57,6 +57,8 @@ CONFIG_FSL_ESDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
index ea0cafa..4338629 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=48000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
index 966d321..c4d7488 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_DM=y
 CONFIG_FSL_SATA=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
index 752015c..113dc33 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_DM=y
 CONFIG_FSL_SATA=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_MARVELL=y
 CONFIG_MII=y
index f22a3ab..08fdc55 100644 (file)
@@ -26,9 +26,11 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_GO is not set
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
@@ -42,6 +44,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_BOARD_FIXUP=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SCSI_AHCI=y
 CONFIG_DM_GPIO=y
@@ -53,6 +57,7 @@ CONFIG_LED_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
index 0b27bd7..28c5c83 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index 4192241..b8c16ba 100644 (file)
@@ -39,6 +39,10 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
 CONFIG_SPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=0
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_DA8XX_GPIO=y
index 41dae05..3ee7943 100644 (file)
@@ -41,6 +41,10 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="da850-evm"
 CONFIG_SPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=0
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_DM_GPIO=y
index 8828c6f..0b5c7c2 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
 CONFIG_TEGRA114_SPI=y
index 2c9254b..3de9766 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_CMD_FS_GENERIC=y
 # CONFIG_DOS_PARTITION is not set
 CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_MISC=y
index 3e1b404..dcf2a25 100644 (file)
@@ -3,6 +3,7 @@ CONFIG_ARCH_MVEBU=y
 CONFIG_SYS_TEXT_BASE=0x00800000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6820_AMC=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
@@ -42,6 +43,8 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="armada-385-amc"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_BLK=y
 # CONFIG_SPL_BLK is not set
@@ -52,6 +55,8 @@ CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_NAND=y
 CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_MARVELL=y
index b36b7c3..a4c00e9 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SCSI_AHCI=y
 CONFIG_MMC_SDHCI=y
index b6c61c3..98e47ee 100644 (file)
@@ -42,6 +42,8 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp"
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SATA_MV=y
 # CONFIG_MMC is not set
index a14c5f2..b2faf1c 100644 (file)
@@ -41,6 +41,8 @@ CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index cdf3642..077a451 100644 (file)
@@ -65,6 +65,9 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index 6b9febf..983ea72 100644 (file)
@@ -66,6 +66,9 @@ CONFIG_DFU_SF=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index a2f4395..6ca5d2b 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DWC_AHSATA=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
index 2784c12..4ad3df6 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DWC_AHSATA=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
index ef06150..598a2a3 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm"
 CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x9000
 CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent"
+# CONFIG_ENV_IS_IN_FAT is not set
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM=y
@@ -67,6 +68,8 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=76800000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
index 3cf7659..d854154 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm"
 CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x9000
 CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent"
+# CONFIG_ENV_IS_IN_FAT is not set
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM=y
@@ -71,6 +72,8 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=76800000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
index 378b3d7..aa4b826 100644 (file)
@@ -76,6 +76,8 @@ CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=76800000
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_DM_ETH=y
index d3263cf..8202848 100644 (file)
@@ -23,6 +23,8 @@ CONFIG_ISO_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_DM=y
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
index 3e4e71b..29d5f98 100644 (file)
@@ -18,6 +18,8 @@ CONFIG_ISO_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_DM=y
 CONFIG_MVSATA_IDE=y
 CONFIG_DM_I2C=y
index ce42f23..62cad53 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_CMD_UBI=y
 CONFIG_ISO_PARTITION=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414"
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_OF_TRANSLATE=y
 # CONFIG_MMC is not set
index fbca72a..af3f80e 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
 CONFIG_TEGRA114_SPI=y
index fae7ff9..ceab73d 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_SYS_I2C_DAVINCI=y
 CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_EMAC=y
index b14cf6c..2ec3aae 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_CMD_UBI=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="ethernut5"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index eb7b3a4..a0ca4e1 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 # CONFIG_SPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_SHIFT=2
index d2c0fb0..de85f5a 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
index d0eba8a..8635fd9 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 6783d5a..fffd293 100644 (file)
@@ -33,6 +33,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 3a0ed18..d985353 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 4e0898d..668323f 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 4e4e7dd..94c565e 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
index b8eae0f..ba5b3ba 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 3b3be22..6725b48 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index a250719..7319919 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
 CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_E1000=y
index 6ef40b0..699ce06 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_SPEED=104000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_GIGE=y
 CONFIG_MVNETA=y
index cebe4a5..ca85973 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index c59ca47..f8a0c3a 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_RTL8169=y
 CONFIG_PCI=y
index a108f88..6123dad 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MARVELL=y
index 67f6fb1..11c9fda 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MARVELL=y
index 838b6f1..4ff9c13 100644 (file)
@@ -43,6 +43,8 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index 93fa236..990c7f6 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index ce139d1..6835874 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MARVELL=y
index db61557..e14f901 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MARVELL=y
index 368171d..0e2f73a 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MARVELL=y
index 7bb672f..1f7a93e 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_NAND=y
 CONFIG_NAND_DAVINCI=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MARVELL=y
index b55b8b0..92fb248 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index b47b9e3..b1a95cb 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index fb18630..443399d 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index a3cc06b..4243933 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index 598af88..7ec7281 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index 75e5204..8f02b85 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index 8b3fa7e..34ece18 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index d2206b4..63c5925 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index 62d3a0a..b2d6232 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index d6d5abb..29113f9 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_DM_REGULATOR_FIXED=y
 # CONFIG_SPL_DM_SERIAL is not set
index 7b8f169..32cd52c 100644 (file)
@@ -25,6 +25,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_DIAG=y
 CONFIG_SYS_I2C_DAVINCI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
index 3a1121c..3212f37 100644 (file)
@@ -27,13 +27,21 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
+CONFIG_DEFAULT_SPI_BUS=1
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_DATE=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=0
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=1000000
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0x03
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SCSI_AHCI=y
@@ -42,6 +50,9 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
index 7d0d690..9a6139e 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=1
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
@@ -40,6 +42,9 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
index 30f2343..99188d3 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=1
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
@@ -34,6 +36,12 @@ CONFIG_CMD_DATE=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=0
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=1000000
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0x03
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SCSI_AHCI=y
@@ -42,6 +50,9 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=10000000
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
index a0f9d62..fa0d259 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index ff5ea65..eb5e4da 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index f81ef5e..bfb0a71 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index e9394b3..6178681 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index e876db3..ea93bb0 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 9a6e7da..8964042 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index a6bc1e2..e615f75 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=0
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
@@ -44,6 +46,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 3f5e0b7..7a61abc 100644 (file)
@@ -31,6 +31,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index b1b46b1..b5f12de 100644 (file)
@@ -32,6 +32,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
index 0feeb64..4ceae32 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
index a232b45..099366d 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
index 753957f..c4d5f7e 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index 23e5460..db7393f 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
index ef01a16..a481cb1 100644 (file)
@@ -33,6 +33,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
index 43cb6f9..5802902 100644 (file)
@@ -36,6 +36,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_E1000=y
index 5ba600e..643384e 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index b815fc9..985b578 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 9c7e690..967d0d1 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 2d9169b..0761eed 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index f11da29..f9e7e8d 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 44d9057..715d079 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index e4ccdc6..ede5df6 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=0
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
@@ -45,6 +47,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_E1000=y
 CONFIG_PCI=y
index 8563abc..16d9c92 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index c363606..b6eba4a 100644 (file)
@@ -30,6 +30,7 @@ CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index 48bec11..320e14e 100644 (file)
@@ -23,6 +23,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index 5c716cd..1521392 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm"
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_SPL_OF_TRANSLATE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index 1ab29c1..245dc15 100644 (file)
@@ -38,6 +38,9 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 6d47db5..9bb5e26 100644 (file)
@@ -39,6 +39,9 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 54adab9..476700c 100644 (file)
@@ -20,6 +20,8 @@ CONFIG_CMD_PING=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 0c2785c..d85a216 100644 (file)
@@ -35,6 +35,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index b26bd1e..abc46d0 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 9276df2..95562b7 100644 (file)
@@ -38,6 +38,10 @@ CONFIG_OF_LIST="jr2_pcb110 jr2_pcb111 serval2_pcb112"
 CONFIG_DTB_RESELECT=y
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=0
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
 CONFIG_DM_GPIO=y
index 0fdd9b8..162a514 100644 (file)
@@ -44,6 +44,10 @@ CONFIG_OF_LIST="luton_pcb090 luton_pcb091"
 CONFIG_DTB_RESELECT=y
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=0
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
 CONFIG_DM_GPIO=y
index edc476d..b0dcfaf 100644 (file)
@@ -43,6 +43,10 @@ CONFIG_OF_LIST="ocelot_pcb120 ocelot_pcb123"
 CONFIG_DTB_RESELECT=y
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=0
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
 CONFIG_DM_GPIO=y
index 146188b..f2c9563 100644 (file)
@@ -35,6 +35,10 @@ CONFIG_OF_LIST="serval_pcb106 serval_pcb105"
 CONFIG_DTB_RESELECT=y
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=0
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
 CONFIG_DM_GPIO=y
index a450f48..027aaa4 100644 (file)
@@ -33,6 +33,10 @@ CONFIG_DEFAULT_DEVICE_TREE="servalt_pcb116"
 CONFIG_DTB_RESELECT=y
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=0
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
 CONFIG_DM_GPIO=y
index da51868..ecbcf95 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_XENON=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
index 271875f..e1514b3 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_XENON=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
index 8701d1f..0d7fafe 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_XENON=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
index eb019c9..8c38722 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_XENON=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
index d057221..c54b933 100644 (file)
@@ -23,6 +23,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=2
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -43,6 +44,9 @@ CONFIG_MMC_MXS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_MII=y
 CONFIG_CONS_INDEX=0
index ab59d75..187467d 100644 (file)
@@ -23,6 +23,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=2
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -43,6 +44,9 @@ CONFIG_MMC_MXS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_MII=y
 CONFIG_CONS_INDEX=0
index 6b774cf..7d891e7 100644 (file)
@@ -22,6 +22,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=2
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -42,6 +43,9 @@ CONFIG_MMC_MXS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_MII=y
 CONFIG_CONS_INDEX=0
index 0a77e6e..cb5b1b3 100644 (file)
@@ -22,6 +22,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=2
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
@@ -42,6 +43,9 @@ CONFIG_MMC_MXS=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_MII=y
 CONFIG_CONS_INDEX=0
index c6dcb45..2267818 100644 (file)
@@ -13,6 +13,8 @@ CONFIG_SPL_NAND_SUPPORT=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=1
+CONFIG_DEFAULT_SPI_MODE=4
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
index 2666340..3989352 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index f51b5af..d0f950b 100644 (file)
@@ -64,6 +64,8 @@ CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index ac879a3..0fd32aa 100644 (file)
@@ -75,6 +75,8 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index 44cd50b..d93a4df 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index 72212fb..76f6101 100644 (file)
@@ -36,6 +36,8 @@ CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index bcfeb30..936c152 100644 (file)
@@ -44,6 +44,8 @@ CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index b60e9b6..b2247c4 100644 (file)
@@ -39,6 +39,8 @@ CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index 5c0aa63..3982115 100644 (file)
@@ -41,6 +41,9 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
index 4a3c56f..3ef781e 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 185f543..69160f7 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index a5a1cb5..7902465 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
index 831b8cc..990ea71 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
index 81f4538..3d74967 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_FSL_ESDHC=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_PHYLIB=y
index 8996d52..44c8d5b 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index e6d7724..ac103c3 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index 89df1f3..9eded36 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index 9a5cf19..4b0fff4 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index bd879ab..24749f8 100644 (file)
@@ -31,6 +31,8 @@ CONFIG_EFI_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=20000000
 CONFIG_MVSATA_IDE=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
index af59a71..debe60b 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 9072c04..96d9c02 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index b92d27a..5bc4219 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 3b8cc6a..37fa405 100644 (file)
@@ -40,6 +40,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 36cfe21..1d3f015 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 40c09d7..5bf2b3a 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x12000000
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 19120d0..ff57497 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_CROS_EC_KEYB=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_AS3722=y
index e35f8d6..887522a 100644 (file)
@@ -10,6 +10,8 @@ CONFIG_FIT=y
 CONFIG_FIT_BEST_MATCH=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_CONSOLE_MUX=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_MISC_INIT_R=y
 CONFIG_BOARD_TYPES=y
 CONFIG_SYS_PROMPT="ODROID-XU3 # "
@@ -33,6 +35,7 @@ CONFIG_ADC=y
 CONFIG_ADC_EXYNOS=y
 CONFIG_DFU_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_SYS_I2C_S3C24X0=y
 CONFIG_SMC911X=y
 CONFIG_SMC911X_BASE=0x5000000
 CONFIG_DM_PMIC=y
index d66af98..e282099 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
 CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MII=y
index 2825e44..f0fe375 100644 (file)
@@ -33,6 +33,9 @@ CONFIG_DWC_AHSATA=y
 CONFIG_CMD_PCA953X=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index c8c53e8..d3960e4 100644 (file)
@@ -42,6 +42,9 @@ CONFIG_DWC_AHSATA=y
 CONFIG_CMD_PCA953X=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=25000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
index c258721..6b56436 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
 CONFIG_TEGRA114_SPI=y
index b662ef1..a790cd8 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_RTL8169=y
 CONFIG_PCI=y
index 5f0f8c5..e48e0a1 100644 (file)
@@ -27,6 +27,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
 CONFIG_TEGRA114_SPI=y
index 1780307..718c33f 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
index 27431ee..05ebe66 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
index af4768f..9bb6dd6 100644 (file)
@@ -47,6 +47,8 @@ CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 96ec8fd..6fc89cd 100644 (file)
@@ -29,6 +29,8 @@ CONFIG_CMD_TPM_TEST=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=1
 CONFIG_I2C_CROS_EC_TUNNEL=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -39,6 +41,8 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SMC911X=y
index 792f22f..f091d24 100644 (file)
@@ -28,6 +28,8 @@ CONFIG_CMD_TPM_TEST=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=1
 CONFIG_I2C_CROS_EC_TUNNEL=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -38,6 +40,8 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SMC911X=y
index 2eb59e4..799d54d 100644 (file)
@@ -46,6 +46,9 @@ CONFIG_MTD=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=2
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 1e54035..7503417 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index ca194fd..ac50729 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 7d2e97a..7e0abaa 100644 (file)
@@ -33,6 +33,7 @@ CONFIG_BOOTCOUNT_RAM=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=8100000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MVGBE=y
 CONFIG_MII=y
index 3fcff25..3547ec6 100644 (file)
@@ -67,6 +67,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
index a9191ad..e3d16df 100644 (file)
@@ -23,6 +23,8 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index 2298d5b..51fa98d 100644 (file)
@@ -32,6 +32,8 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index 746c0bf..24ad3e9 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 17311e6..cb5a35f 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
index 2de51e8..19c3858 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_LED=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
index 9ba8d79..a1cc204 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=66000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
index 5dcd80c..447dd23 100644 (file)
@@ -63,6 +63,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=66000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
index d6c30e2..5259dff 100644 (file)
@@ -62,6 +62,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 49e2a73..e291127 100644 (file)
@@ -64,6 +64,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 9bb4a07..b1e010c 100644 (file)
@@ -61,6 +61,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 3026cab..79facd4 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 2967036..ed9d65c 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 04ca6a8..5a93d89 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 548b0b8..d96c054 100644 (file)
@@ -70,6 +70,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 0e36665..ddae1c8 100644 (file)
@@ -65,6 +65,7 @@ CONFIG_PMECC_CAP=4
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 824fa27..610d792 100644 (file)
@@ -65,6 +65,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 9f15c97..6d86f2a 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 38a8b1c..14a1b14 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_PMECC_CAP=8
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 89cfee4..92fb058 100644 (file)
@@ -61,6 +61,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index 9e2e1a9..3d171e7 100644 (file)
@@ -60,6 +60,7 @@ CONFIG_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index b830b8f..6ea0078 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_PMECC_CAP=8
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index c6ab3fd..8087a21 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_DM_ETH=y
 CONFIG_MACB=y
index c86fde7..6741387 100644 (file)
@@ -30,10 +30,14 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=1
 CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SMC911X=y
index e92472e..6a91962 100644 (file)
@@ -25,10 +25,14 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=1
 CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SMC911X=y
index 86a668f..54bf740 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_CMD_TPM_TEST=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=1
 CONFIG_I2C_CROS_EC_LDO=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -44,6 +46,8 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SMC911X=y
index d984047..b8de47a 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=100000000
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHY_MARVELL=y
index 9e6d582..995290c 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0x2003
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
@@ -55,4 +56,3 @@ CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
-CONFIG_USE_TINY_PRINTF=y
index c008428..c24aa2e 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_CMD_TPM_TEST=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=1
 CONFIG_I2C_CROS_EC_LDO=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_ARB_GPIO_CHALLENGE=y
@@ -44,6 +46,8 @@ CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_S5P=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SMC911X=y
index 48e851d..630b01c 100644 (file)
@@ -20,9 +20,12 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="nor0=spi-flash.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-flash.0:1m(u-boot),7m(kernel),-(rootfs)"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=1
 # CONFIG_NET is not set
 CONFIG_MTD_DEVICE=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_SPI=y
index 0d8267f..a55c667 100644 (file)
@@ -26,6 +26,8 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng"
 CONFIG_SPL_DM=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
 CONFIG_TEGRA20_SLINK=y
index a7d02e9..fb9307a 100644 (file)
@@ -46,6 +46,8 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable"
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SATA_MV=y
@@ -55,6 +57,7 @@ CONFIG_FPGA_ALTERA=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=27777777
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHY_MARVELL=y
index 68adf76..85ef9da 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_I2C_EEPROM=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 2d3347e..5cfbbf8 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=108000000
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DEBUG_UART_ZYNQ=y
index 3cc3e64..91d8499 100644 (file)
@@ -38,6 +38,8 @@ CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=108000000
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DEBUG_UART_ZYNQ=y
index e450557..bcfca5d 100644 (file)
@@ -37,6 +37,8 @@ CONFIG_SYS_I2C_CADENCE=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=108000000
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 # CONFIG_NETDEVICES is not set
index af72877..bc54005 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index f69189b..58d08bf 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 744547b..b57cb81 100644 (file)
@@ -33,6 +33,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index c99301e..c713fac 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 8d5f54c..d9d3ce9 100644 (file)
@@ -34,6 +34,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 3470a78..f793658 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
index 5c2cc31..bd08adb 100644 (file)
@@ -24,9 +24,12 @@ CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=48000000
 CONFIG_SPL_DM=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_RTL8169=y
 CONFIG_PCI=y
index 165f0ca..5b168df 100644 (file)
@@ -45,6 +45,8 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_XENON=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
index 7e5943b..c406b25 100644 (file)
@@ -35,6 +35,8 @@ CONFIG_CMD_BTRFS=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=50000000
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_SCSI_AHCI=y
 CONFIG_ATSHA204A=y
index 53f2b6e..2209330 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_XENON=y
 CONFIG_MTD=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index 9f7506f..3b9e4a5 100644 (file)
@@ -25,6 +25,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)"
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="usb_a9263"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=15000000
 CONFIG_DM=y
 CONFIG_CLK=y
 CONFIG_CLK_AT91=y
index 55c34ca..810a4b2 100644 (file)
@@ -30,6 +30,8 @@ CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SYS_NS16550=y
 CONFIG_TEGRA114_SPI=y
index 0130ad4..5abc87e 100644 (file)
@@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="at91-vinco"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
index c4779c0..ab9bda0 100644 (file)
@@ -50,6 +50,7 @@ CONFIG_LED_GPIO=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
index 25b9e88..cd18e9e 100644 (file)
@@ -50,6 +50,8 @@ CONFIG_I2C_MUX_PCA954x=y
 CONFIG_NAND=y
 CONFIG_NAND_PXA3XX=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_SPEED=50000000
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
index cca1f2d..c9b1255 100644 (file)
@@ -35,6 +35,9 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=3
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_MII=y
 CONFIG_PCI=y
index cfe80b3..4b764bc 100644 (file)
@@ -34,6 +34,9 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=3
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_MII=y
index 5f15d42..637fae5 100644 (file)
@@ -33,6 +33,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index 1f8aa6e..c58d649 100644 (file)
@@ -56,6 +56,7 @@ CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
 CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index c61010f..37c5f35 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_REALTEK=y
index bbf9fc0..0af0f23 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
index b64f91f..d61659f 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
index 9704b81..c896880 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_LED_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
index c9eb4d3..7b1b92d 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index 9da1d54..f2ecdac 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index bfff8af..8f74105 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index 996f46b..d43869c 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_FPGA_ZYNQPL=y
 CONFIG_DM_GPIO=y
 # CONFIG_MMC is not set
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
index fdaa5bb..cc21557 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
index 9a4ac2d..496da8f 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_REALTEK=y
index 8cabaf1..e8437b4 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_DM_GPIO=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHY_REALTEK=y
 CONFIG_MII=y
index 0982fad..66b6abe 100644 (file)
@@ -12,6 +12,15 @@ the interaction of drivers and applications with the firmware. The API comprises
 access to block storage, network, and console to name a few. The Linux kernel
 and boot loaders like GRUB or the FreeBSD loader can be executed.
 
+## Development target
+
+The implementation of UEFI in U-Boot strives to reach the minimum requirements
+described in "Server Base Boot Requirements System Software on ARM Platforms -
+Version 1.1" [4].
+
+A full blown UEFI implementation would contradict the U-Boot design principle
+"keep it small".
+
 ## Building for UEFI
 
 The UEFI standard supports only little-endian systems. The UEFI support can be
@@ -299,7 +308,7 @@ This driver is only available if U-Boot is configured with
     CONFIG_BLK=y
     CONFIG_PARTITIONS=y
 
-## TODOs as of U-Boot 2018.07
+## TODOs as of U-Boot 2019.04
 
 * unimplemented or incompletely implemented boot services
   * Exit - call unload function, unload applications only
@@ -308,16 +317,13 @@ This driver is only available if U-Boot is configured with
 
 * unimplemented or incompletely implemented runtime services
   * SetVariable() ignores attribute EFI_VARIABLE_APPEND_WRITE
-  * GetNextVariableName is not implemented
   * QueryVariableInfo is not implemented
 
 * unimplemented events
   * EVT_RUNTIME
   * EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE
-  * event groups
 
 * data model
-  * manage events in a linked list
   * manage configuration tables in a linked list
 
 * UEFI drivers
@@ -329,9 +335,14 @@ This driver is only available if U-Boot is configured with
   * persistence
   * runtime support
 
+* incompletely implemented protocols
+  * support version 0x00020000 of the EFI file protocol
+
 ## Links
 
 * [1](http://uefi.org/specifications)
   http://uefi.org/specifications - UEFI specifications
 * [2](./driver-model/README.txt) doc/driver-model/README.txt - Driver model
 * [3](./README.iscsi) doc/README.iscsi - iSCSI booting with U-Boot and iPXE
+* [4](https://developer.arm.com/docs/den0044/latest/server-base-boot-requirements-system-software-on-arm-platforms-version-11)
+  Server Base Boot Requirements System Software on ARM Platforms - Version 1.1
index 65b69c4..4ba642b 100644 (file)
@@ -35,6 +35,7 @@ Optional properties:
 - regulator-max-microamp: a maximum allowed Current value
 - regulator-always-on: regulator should never be disabled
 - regulator-boot-on: enabled by bootloader/firmware
+- regulator-ramp-delay: ramp delay for regulator (in uV/us)
 
 Note
 The "regulator-name" constraint is used for setting the device's uclass
@@ -60,4 +61,5 @@ ldo0 {
        regulator-max-microamp = <100000>;
        regulator-always-on;
        regulator-boot-on;
+       regulator-ramp-delay = <12000>;
 };
index c2eee8c..b75ebab 100644 (file)
@@ -15,7 +15,7 @@ alias abiessmann     Andreas Bießmann <andreas@biessmann.org>
 alias abrodkin       Alexey Brodkin <alexey.brodkin@synopsys.com>
 alias afleming       Andy Fleming <afleming@gmail.com>
 alias ag             Anatolij Gustschin <agust@denx.de>
-alias agraf          Alexander Graf <agraf@suse.de>
+alias agraf          Alexander Graf <agraf@csgraf.de>
 alias alisonwang     Alison Wang <alison.wang@nxp.com>
 alias angelo_ts      Angelo Dureghello <angelo@sysam.it>
 alias bmeng          Bin Meng <bmeng.cn@gmail.com>
index d33e3d6..12c49fc 100644 (file)
@@ -62,7 +62,7 @@ int exynos_adc_stop(struct udevice *dev)
 
        /* Stop conversion */
        cfg = readl(&regs->con1);
-       cfg |= ~ADC_V2_CON1_STC_EN;
+       cfg &= ~ADC_V2_CON1_STC_EN;
 
        writel(cfg, &regs->con1);
 
index 6dfd02f..13111b3 100644 (file)
@@ -44,13 +44,17 @@ static const struct clk_div_table cpg_sd01_div_table[] = {
        {  0,  0 },
 };
 
-static u8 gen2_clk_get_sdh_div(const struct clk_div_table *table, u8 div)
+static u8 gen2_clk_get_sdh_div(const struct clk_div_table *table, u8 val)
 {
-       while ((*table++).val) {
-               if ((*table).div == div)
-                       return div;
+       for (;;) {
+               if (!(*table).div)
+                       return 0xff;
+
+               if ((*table).val == val)
+                       return (*table).div;
+
+               table++;
        }
-       return 0xff;
 }
 
 static int gen2_clk_enable(struct clk *clk)
@@ -117,7 +121,7 @@ static ulong gen2_clk_get_rate(struct clk *clk)
 
        case CLK_TYPE_FF:
                rate = (gen2_clk_get_rate(&parent) * core->mult) / core->div;
-               debug("%s[%i] FIXED clk: parent=%i div=%i mul=%i => rate=%u\n",
+               debug("%s[%i] FIXED clk: parent=%i mul=%i div=%i => rate=%u\n",
                      __func__, __LINE__,
                      core->parent, core->mult, core->div, rate);
                return rate;
@@ -202,8 +206,50 @@ static ulong gen2_clk_get_rate(struct clk *clk)
        return -ENOENT;
 }
 
+static int gen2_clk_setup_mmcif_div(struct clk *clk, ulong rate)
+{
+       struct gen2_clk_priv *priv = dev_get_priv(clk->dev);
+       struct cpg_mssr_info *info = priv->info;
+       const struct cpg_core_clk *core;
+       struct clk parent, pparent;
+       u32 val;
+       int ret;
+
+       ret = renesas_clk_get_parent(clk, info, &parent);
+       if (ret) {
+               debug("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret);
+               return ret;
+       }
+
+       if (renesas_clk_is_mod(&parent))
+               return 0;
+
+       ret = renesas_clk_get_core(&parent, info, &core);
+       if (ret)
+               return ret;
+
+       if (strcmp(core->name, "mmc0") && strcmp(core->name, "mmc1"))
+               return 0;
+
+       ret = renesas_clk_get_parent(&parent, info, &pparent);
+       if (ret) {
+               debug("%s[%i] parent fail, ret=%i\n", __func__, __LINE__, ret);
+               return ret;
+       }
+
+       val = (gen2_clk_get_rate(&pparent) / rate) - 1;
+
+       debug("%s[%i] MMCIF offset=%x\n", __func__, __LINE__, core->offset);
+
+       writel(val, priv->base + core->offset);
+
+       return 0;
+}
+
 static ulong gen2_clk_set_rate(struct clk *clk, ulong rate)
 {
+       /* Force correct MMC-IF divider configuration if applicable */
+       gen2_clk_setup_mmcif_div(clk, rate);
        return gen2_clk_get_rate(clk);
 }
 
index 111a858..b2f11a8 100644 (file)
@@ -420,13 +420,13 @@ unsigned int mv_ddr_speed_bin_timing_get(enum mv_ddr_speed_bin index, enum mv_dd
                result = speed_bin_table_t_rcd_t_rp[index];
                break;
        case SPEED_BIN_TRAS:
-               if (index < SPEED_BIN_DDR_1066G)
+               if (index <= SPEED_BIN_DDR_1066G)
                        result = 37500;
-               else if (index < SPEED_BIN_DDR_1333J)
+               else if (index <= SPEED_BIN_DDR_1333J)
                        result = 36000;
-               else if (index < SPEED_BIN_DDR_1600K)
+               else if (index <= SPEED_BIN_DDR_1600K)
                        result = 35000;
-               else if (index < SPEED_BIN_DDR_1866M)
+               else if (index <= SPEED_BIN_DDR_1866M)
                        result = 34000;
                else
                        result = 33000;
index db0f8ad..df832ac 100644 (file)
@@ -50,6 +50,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)
        int max_phase = MIN_VALUE, current_phase;
        enum hws_access_type access_type = ACCESS_TYPE_UNICAST;
        u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE);
+       unsigned int max_cs = mv_ddr_cs_num_get();
 
        CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
                                       DUNIT_ODT_CTRL_REG,
@@ -59,7 +60,7 @@ int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)
                                      data_read, MASK_ALL_BITS));
        val = data_read[if_id];
 
-       for (cs_num = 0; cs_num < MAX_CS_NUM; cs_num++) {
+       for (cs_num = 0; cs_num < max_cs; cs_num++) {
                read_sample[cs_num] = GET_RD_SAMPLE_DELAY(val, cs_num);
 
                /* find maximum of read_samples */
index c6e06aa..17eca73 100644 (file)
@@ -119,7 +119,7 @@ void fastboot_boot(void)
        if (s) {
                run_command(s, CMD_FLAG_ENV);
        } else {
-               static char boot_addr_start[12];
+               static char boot_addr_start[20];
                static char *const bootm_args[] = {
                        "bootm", boot_addr_start, NULL
                };
index 1af94d1..2c0301a 100644 (file)
@@ -308,14 +308,10 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,
 {
        u8 *cur_data = data;
        struct cdns_i2c_regs *regs = i2c_bus->regs;
-       int curr_recv_count;
+       u32 curr_recv_count;
        int updatetx, hold_quirk;
        u32 ret;
 
-       /* Check the hardware can handle the requested bytes */
-       if ((recv_count < 0))
-               return -EINVAL;
-
        curr_recv_count = recv_count;
 
        /* Check for the message size against the FIFO depth */
index 1c1527c..456c1b4 100644 (file)
@@ -67,7 +67,7 @@ __weak int board_mmc_getcd(struct mmc *mmc)
 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
 {
        printf("CMD_SEND:%d\n", cmd->cmdidx);
-       printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
+       printf("\t\tARG\t\t\t 0x%08x\n", cmd->cmdarg);
 }
 
 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
@@ -83,21 +83,21 @@ void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
                        printf("\t\tMMC_RSP_NONE\n");
                        break;
                case MMC_RSP_R1:
-                       printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
+                       printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x \n",
                                cmd->response[0]);
                        break;
                case MMC_RSP_R1b:
-                       printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
+                       printf("\t\tMMC_RSP_R1b\t\t 0x%08x \n",
                                cmd->response[0]);
                        break;
                case MMC_RSP_R2:
-                       printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
+                       printf("\t\tMMC_RSP_R2\t\t 0x%08x \n",
                                cmd->response[0]);
-                       printf("\t\t          \t\t 0x%08X \n",
+                       printf("\t\t          \t\t 0x%08x \n",
                                cmd->response[1]);
-                       printf("\t\t          \t\t 0x%08X \n",
+                       printf("\t\t          \t\t 0x%08x \n",
                                cmd->response[2]);
-                       printf("\t\t          \t\t 0x%08X \n",
+                       printf("\t\t          \t\t 0x%08x \n",
                                cmd->response[3]);
                        printf("\n");
                        printf("\t\t\t\t\tDUMPING DATA\n");
@@ -107,12 +107,12 @@ void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
                                ptr = (u8 *)&cmd->response[i];
                                ptr += 3;
                                for (j = 0; j < 4; j++)
-                                       printf("%02X ", *ptr--);
+                                       printf("%02x ", *ptr--);
                                printf("\n");
                        }
                        break;
                case MMC_RSP_R3:
-                       printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
+                       printf("\t\tMMC_RSP_R3,4\t\t 0x%08x \n",
                                cmd->response[0]);
                        break;
                default:
@@ -226,7 +226,7 @@ int mmc_send_status(struct mmc *mmc, int timeout)
 
                        if (cmd.response[0] & MMC_STATUS_MASK) {
 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
-                               pr_err("Status Error: 0x%08X\n",
+                               pr_err("Status Error: 0x%08x\n",
                                       cmd.response[0]);
 #endif
                                return -ECOMM;
@@ -1892,8 +1892,7 @@ static int mmc_select_hs400(struct mmc *mmc)
        }
 
        /* Set back to HS */
-       mmc_set_card_speed(mmc, MMC_HS, false);
-       mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false);
+       mmc_set_card_speed(mmc, MMC_HS, true);
 
        err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
                         EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG);
index 306daf1..c8875ce 100644 (file)
@@ -696,7 +696,7 @@ static int sh_mmcif_dm_probe(struct udevice *dev)
                return ret;
        }
 
-       host->clk = clk_get_rate(&sh_mmcif_clk);
+       host->clk = clk_set_rate(&sh_mmcif_clk, 97500000);
 
        plat->cfg.name = dev->name;
        plat->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
index 01d8c2b..812205a 100644 (file)
@@ -783,7 +783,10 @@ int tmio_sd_probe(struct udevice *dev, u32 quirks)
        plat->cfg.f_min = mclk /
                        (priv->caps & TMIO_SD_CAP_DIV1024 ? 1024 : 512);
        plat->cfg.f_max = mclk;
-       plat->cfg.b_max = U32_MAX; /* max value of TMIO_SD_SECCNT */
+       if (quirks & TMIO_SD_CAP_16BIT)
+               plat->cfg.b_max = U16_MAX; /* max value of TMIO_SD_SECCNT */
+       else
+               plat->cfg.b_max = U32_MAX; /* max value of TMIO_SD_SECCNT */
 
        upriv->mmc = &plat->mmc;
 
index e3b40fc..5671bca 100644 (file)
@@ -36,6 +36,42 @@ config SPI_FLASH
 
          If unsure, say N
 
+config SF_DEFAULT_BUS
+       int "SPI Flash default bus identifier"
+       depends on SPI_FLASH || DM_SPI_FLASH
+       default 0
+       help
+         The default bus may be provided by the platform
+         to handle the common case when only a single serial
+         flash is present on the system.
+
+config SF_DEFAULT_CS
+       int "SPI Flash default Chip-select"
+       depends on SPI_FLASH || DM_SPI_FLASH
+       default 0
+       help
+         The default chip select may be provided by the platform
+         to handle the common case when only a single serial
+         flash is present on the system.
+
+config SF_DEFAULT_MODE
+       hex "SPI Flash default mode (see include/spi.h)"
+       depends on SPI_FLASH || DM_SPI_FLASH
+       default 3
+       help
+         The default mode may be provided by the platform
+         to handle the common case when only a single serial
+         flash is present on the system.
+
+config SF_DEFAULT_SPEED
+       int "SPI Flash default speed in Hz"
+       depends on SPI_FLASH || DM_SPI_FLASH
+       default 1000000
+       help
+         The default speed may be provided by the platform
+         to handle the common case when only a single serial
+         flash is present on the system.
+
 if SPI_FLASH
 
 config SPI_FLASH_SFDP_SUPPORT
index a51b8a4..cc59b21 100644 (file)
@@ -28,6 +28,7 @@
 #define MC_MEM_SIZE_ENV_VAR    "mcmemsize"
 #define MC_BOOT_TIMEOUT_ENV_VAR        "mcboottimeout"
 #define MC_BOOT_ENV_VAR                "mcinitcmd"
+#define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
 
 DECLARE_GLOBAL_DATA_PTR;
 static int mc_memset_resv_ram;
@@ -421,9 +422,11 @@ static int mc_fixup_dpc(u64 dpc_addr)
        /* fixup MAC addresses for dpmac ports */
        nodeoffset = fdt_path_offset(blob, "/board_info/ports");
        if (nodeoffset < 0)
-               return 0;
+               goto out;
 
        err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPC);
+
+out:
        flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
 
        return err;
@@ -680,7 +683,8 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
        size_t mc_ram_size = mc_get_dram_block_size();
 
        mc_ram_num_256mb_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
-       if (mc_ram_num_256mb_blocks < 1 || mc_ram_num_256mb_blocks > 0xff) {
+
+       if (mc_ram_num_256mb_blocks >= 0xff) {
                error = -EINVAL;
                printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
                       mc_ram_size);
@@ -688,6 +692,12 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
        }
 
        /*
+        * To support 128 MB DDR Size for MC
+        */
+       if (mc_ram_num_256mb_blocks == 0)
+               mc_ram_num_256mb_blocks = 0xFF;
+
+       /*
         * Management Complex cores should be held at reset out of POR.
         * U-Boot should be the first software to touch MC. To be safe,
         * we reset all cores again by setting GCR1 to 0. It doesn't do
@@ -727,8 +737,14 @@ int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
        /*
         * Tell MC what is the address range of the DRAM block assigned to it:
         */
-       reg_mcfbalr = (u32)mc_ram_addr |
-                     (mc_ram_num_256mb_blocks - 1);
+       if (mc_ram_num_256mb_blocks < 0xFF) {
+               reg_mcfbalr = (u32)mc_ram_addr |
+                               (mc_ram_num_256mb_blocks - 1);
+       } else {
+               reg_mcfbalr = (u32)mc_ram_addr |
+                               (mc_ram_num_256mb_blocks);
+       }
+
        out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
        out_le32(&mc_ccsr_regs->reg_mcfbahr,
                 (u32)(mc_ram_addr >> 32));
@@ -878,7 +894,7 @@ unsigned long mc_get_dram_block_size(void)
                               "\' environment variable: %lu\n",
                               dram_block_size);
 
-                       dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
+                       dram_block_size = MC_DRAM_BLOCK_DEFAULT_SIZE;
                }
        }
 
index 4321053..c3260d3 100644 (file)
@@ -93,7 +93,7 @@ void fsl_rgmii_init(void)
        u32 ec;
 
 #ifdef CONFIG_SYS_FSL_EC1
-       ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR - 1])
+       ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR])
                & FSL_CHASSIS3_RCWSR25_EC1_PRTCL_MASK;
        ec >>= FSL_CHASSIS3_RCWSR25_EC1_PRTCL_SHIFT;
 
@@ -102,7 +102,7 @@ void fsl_rgmii_init(void)
 #endif
 
 #ifdef CONFIG_SYS_FSL_EC2
-       ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR - 1])
+       ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR])
                & FSL_CHASSIS3_RCWSR25_EC2_PRTCL_MASK;
        ec >>= FSL_CHASSIS3_RCWSR25_EC2_PRTCL_SHIFT;
 
index 7dd46c0..1fbeb0d 100644 (file)
@@ -91,7 +91,7 @@ void fsl_rgmii_init(void)
                & FSL_CHASSIS3_EC1_REGSR_PRTCL_MASK;
        ec >>= FSL_CHASSIS3_EC1_REGSR_PRTCL_SHIFT;
 
-       if (!ec)
+       if (!ec && (wriop_is_enabled_dpmac(17) == -ENODEV))
                wriop_init_dpmac_enet_if(17, PHY_INTERFACE_MODE_RGMII_ID);
 #endif
 
@@ -100,7 +100,7 @@ void fsl_rgmii_init(void)
                & FSL_CHASSIS3_EC2_REGSR_PRTCL_MASK;
        ec >>= FSL_CHASSIS3_EC2_REGSR_PRTCL_SHIFT;
 
-       if (!ec)
+       if (!ec && (wriop_is_enabled_dpmac(18) == -ENODEV))
                wriop_init_dpmac_enet_if(18, PHY_INTERFACE_MODE_RGMII_ID);
 #endif
 }
index 6026fa6..e21dc10 100644 (file)
@@ -369,6 +369,12 @@ static int mvebu_get_tgt_attr(ofnode node, int devfn,
        if (!range)
                return -EINVAL;
 
+       /*
+        * Linux uses of_n_addr_cells() to get the number of address cells
+        * here. Currently this function is only available in U-Boot when
+        * CONFIG_OF_LIVE is enabled. Until this is enabled for MVEBU in
+        * general, lets't hardcode the "pna" value in the U-Boot code.
+        */
        pna = 2; /* hardcoded for now because of lack of of_n_addr_cells() */
        rangesz = pna + na + ns;
        nranges = rlen / sizeof(__be32) / rangesz;
index 6f355b9..9118b8e 100644 (file)
@@ -35,10 +35,22 @@ int regulator_get_value(struct udevice *dev)
        return ops->get_value(dev);
 }
 
+static void regulator_set_value_ramp_delay(struct udevice *dev, int old_uV,
+                                          int new_uV, unsigned int ramp_delay)
+{
+       int delay = DIV_ROUND_UP(abs(new_uV - old_uV), ramp_delay);
+
+       debug("regulator %s: delay %u us (%d uV -> %d uV)\n", dev->name, delay,
+             old_uV, new_uV);
+
+       udelay(delay);
+}
+
 int regulator_set_value(struct udevice *dev, int uV)
 {
        const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
        struct dm_regulator_uclass_platdata *uc_pdata;
+       int ret, old_uV = uV, is_enabled = 0;
 
        uc_pdata = dev_get_uclass_platdata(dev);
        if (uc_pdata->min_uV != -ENODATA && uV < uc_pdata->min_uV)
@@ -49,7 +61,20 @@ int regulator_set_value(struct udevice *dev, int uV)
        if (!ops || !ops->set_value)
                return -ENOSYS;
 
-       return ops->set_value(dev, uV);
+       if (uc_pdata->ramp_delay) {
+               is_enabled = regulator_get_enable(dev);
+               old_uV = regulator_get_value(dev);
+       }
+
+       ret = ops->set_value(dev, uV);
+
+       if (!ret) {
+               if (uc_pdata->ramp_delay && old_uV > 0 && is_enabled)
+                       regulator_set_value_ramp_delay(dev, old_uV, uV,
+                                                      uc_pdata->ramp_delay);
+       }
+
+       return ret;
 }
 
 /*
@@ -107,6 +132,7 @@ int regulator_set_enable(struct udevice *dev, bool enable)
 {
        const struct dm_regulator_ops *ops = dev_get_driver_ops(dev);
        struct dm_regulator_uclass_platdata *uc_pdata;
+       int ret, old_enable = 0;
 
        if (!ops || !ops->set_enable)
                return -ENOSYS;
@@ -115,7 +141,22 @@ int regulator_set_enable(struct udevice *dev, bool enable)
        if (!enable && uc_pdata->always_on)
                return -EACCES;
 
-       return ops->set_enable(dev, enable);
+       if (uc_pdata->ramp_delay)
+               old_enable = regulator_get_enable(dev);
+
+       ret = ops->set_enable(dev, enable);
+       if (!ret) {
+               if (uc_pdata->ramp_delay && !old_enable && enable) {
+                       int uV = regulator_get_value(dev);
+
+                       if (uV > 0) {
+                               regulator_set_value_ramp_delay(dev, 0, uV,
+                                                              uc_pdata->ramp_delay);
+                       }
+               }
+       }
+
+       return ret;
 }
 
 int regulator_set_enable_if_allowed(struct udevice *dev, bool enable)
@@ -335,6 +376,8 @@ static int regulator_pre_probe(struct udevice *dev)
                                                -ENODATA);
        uc_pdata->always_on = dev_read_bool(dev, "regulator-always-on");
        uc_pdata->boot_on = dev_read_bool(dev, "regulator-boot-on");
+       uc_pdata->ramp_delay = dev_read_u32_default(dev, "regulator-ramp-delay",
+                                                   0);
 
        /* Those values are optional (-ENODATA if unset) */
        if ((uc_pdata->min_uV != -ENODATA) &&
index ced504e..67d1f96 100644 (file)
@@ -346,6 +346,8 @@ static int s2mps11_ldo_hex2volt(int ldo, int hex)
        case 11:
        case 22:
        case 23:
+       case 27:
+       case 35:
                uV = hex * S2MPS11_LDO_STEP + S2MPS11_LDO_UV_MIN;
                break;
        default:
@@ -366,6 +368,8 @@ static int s2mps11_ldo_volt2hex(int ldo, int uV)
        case 11:
        case 22:
        case 23:
+       case 27:
+       case 35:
                hex = (uV - S2MPS11_LDO_UV_MIN) / S2MPS11_LDO_STEP;
                break;
        default:
@@ -547,7 +551,16 @@ static int ldo_get_enable(struct udevice *dev)
 
 static int ldo_set_enable(struct udevice *dev, bool enable)
 {
-       return s2mps11_ldo_enable(dev, PMIC_OP_SET, &enable);
+       int ret;
+
+       ret = s2mps11_ldo_enable(dev, PMIC_OP_SET, &enable);
+       if (ret)
+               return ret;
+
+       /* Wait the "enable delay" for voltage to start to rise */
+       udelay(15);
+
+       return 0;
 }
 
 static int ldo_get_mode(struct udevice *dev)
index 8d78647..3053ccf 100644 (file)
@@ -23,8 +23,11 @@ int usb_gadget_initialize(int index)
                return 0;
        ret = uclass_get_device_by_seq(UCLASS_USB_GADGET_GENERIC, index, &dev);
        if (!dev || ret) {
-               pr_err("No USB device found\n");
-               return -ENODEV;
+               ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, index, &dev);
+               if (!dev || ret) {
+                       pr_err("No USB device found\n");
+                       return -ENODEV;
+               }
        }
        dev_array[index] = dev;
        return 0;
index 4970223..1f83e61 100644 (file)
@@ -10,14 +10,10 @@ ifeq ($(DEVICE_TREE),)
 DEVICE_TREE := unset
 endif
 
-ARCH_PATH := arch/$(ARCH)/dts
-dtb_depends := arch-dtbs
-
 ifneq ($(EXT_DTB),)
 DTB := $(EXT_DTB)
 else
-DTB := $(ARCH_PATH)/$(DEVICE_TREE).dtb
-dtb_depends += $(DTB:.dtb=.dts)
+DTB := arch/$(ARCH)/dts/$(DEVICE_TREE).dtb
 endif
 
 $(obj)/dt-spl.dtb: $(DTB) $(objtree)/tools/fdtgrep FORCE
@@ -28,10 +24,7 @@ $(obj)/dt.dtb: $(DTB) FORCE
 
 targets += dt.dtb dt-spl.dtb
 
-$(DTB): $(dtb_depends)
-ifeq ($(EXT_DTB),)
-       $(Q)$(MAKE) $(build)=$(ARCH_PATH) $@
-endif
+$(DTB): arch-dtbs
        $(Q)test -e $@ || (                                             \
        echo >&2;                                                       \
        echo >&2 "Device Tree Source is not correctly specified.";      \
@@ -42,7 +35,7 @@ endif
 
 PHONY += arch-dtbs
 arch-dtbs:
-       $(Q)$(MAKE) $(build)=$(ARCH_PATH) dtbs
+       $(Q)$(MAKE) $(build)=arch/$(ARCH)/dts dtbs
 
 ifeq ($(CONFIG_SPL_BUILD),y)
 obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o
index c22cbbd..7830066 100644 (file)
@@ -324,18 +324,57 @@ config ENV_IS_IN_SPI_FLASH
          during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
          aligned to an erase sector boundary.
 
-         - CONFIG_ENV_SPI_BUS (optional):
-         - CONFIG_ENV_SPI_CS (optional):
+config USE_ENV_SPI_BUS
+       bool "SPI flash bus for environment"
+       depends on ENV_IS_IN_SPI_FLASH
+       help
+         Force the SPI bus for environment.
+         If not defined, use CONFIG_SF_DEFAULT_BUS.
+
+config ENV_SPI_BUS
+       int "Value of SPI flash bus for environment"
+       depends on USE_ENV_SPI_BUS
+       help
+         Value the SPI bus and chip select for environment.
+
+config USE_ENV_SPI_CS
+       bool "SPI flash chip select for environment"
+       depends on ENV_IS_IN_SPI_FLASH
+       help
+         Force the SPI chip select for environment.
+         If not defined, use CONFIG_SF_DEFAULT_CS.
 
-         Define the SPI bus and chip select. If not defined they will be 0.
+config ENV_SPI_CS
+       int "Value of SPI flash chip select for environment"
+       depends on USE_ENV_SPI_CS
+       help
+         Value of the SPI chip select for environment.
 
-         - CONFIG_ENV_SPI_MAX_HZ (optional):
+config USE_ENV_SPI_MAX_HZ
+       bool "SPI flash bus for environment"
+       depends on ENV_IS_IN_SPI_FLASH
+       help
+         Force the SPI max work clock for environment.
+         If not defined, use CONFIG_SF_DEFAULT_SPEED.
 
-         Define the SPI max work clock. If not defined then use 1MHz.
+config ENV_SPI_MAX_HZ
+       int "Value of SPI flash max work for environment"
+       depends on USE_ENV_SPI_MAX_HZ
+       help
+         Value of the SPI max work clock for environment.
 
-         - CONFIG_ENV_SPI_MODE (optional):
+config USE_ENV_SPI_MODE
+       bool "SPI flash mode for environment"
+       depends on ENV_IS_IN_SPI_FLASH
+       help
+         Force the SPI work mode for environment.
 
-         Define the SPI work mode. If not defined then use SPI_MODE_3.
+config ENV_SPI_MODE
+       hex "Value of SPI flash work mode for environment"
+       depends on USE_ENV_SPI_MODE
+       help
+         Value of the SPI work mode for environment.
+         See include/spi.h for value.
 
 config ENV_IS_IN_UBI
        bool "Environment in a UBI volume"
index 23cbad5..4f92ae0 100644 (file)
--- a/env/sf.c
+++ b/env/sf.c
 #include <errno.h>
 #include <dm/device-internal.h>
 
-#ifndef CONFIG_ENV_SPI_BUS
-# define CONFIG_ENV_SPI_BUS    CONFIG_SF_DEFAULT_BUS
-#endif
-#ifndef CONFIG_ENV_SPI_CS
-# define CONFIG_ENV_SPI_CS     CONFIG_SF_DEFAULT_CS
-#endif
-#ifndef CONFIG_ENV_SPI_MAX_HZ
-# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
-#endif
-#ifndef CONFIG_ENV_SPI_MODE
-# define CONFIG_ENV_SPI_MODE   CONFIG_SF_DEFAULT_MODE
-#endif
-
 #ifndef CONFIG_SPL_BUILD
 #define CMD_SAVEENV
 #define INITENV
index a7f543f..4eb77c3 100644 (file)
@@ -864,6 +864,12 @@ int ext4fs_write(const char *fname, unsigned char *buffer,
                printf("error in File System init\n");
                return -1;
        }
+
+       if (le32_to_cpu(fs->sb->feature_ro_compat) & EXT4_FEATURE_RO_COMPAT_METADATA_CSUM) {
+               printf("Unsupported feature metadata_csum found, not writing.\n");
+               return -1;
+       }
+
        inodes_per_block = fs->blksz / fs->inodesz;
        parent_inodeno = ext4fs_get_parent_inode_num(fname, filename, F_FILE);
        if (parent_inodeno == -1)
index 2e24e8a..be74f6a 100644 (file)
@@ -18,7 +18,7 @@
 
 /* Default to a width of 8 characters for help message command width */
 #ifndef CONFIG_SYS_HELP_CMD_WIDTH
-#define CONFIG_SYS_HELP_CMD_WIDTH      8
+#define CONFIG_SYS_HELP_CMD_WIDTH      10
 #endif
 
 #ifndef        __ASSEMBLY__
index 42b3337..e8c9cdd 100644 (file)
 #define CONFIG_ENV_OVERWRITE
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -506,8 +502,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE          0
 
 /*
  * MAPLE
index 71e840a..c01071e 100644 (file)
@@ -226,10 +226,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
 /* eSPI - Enhanced SPI */
-#ifdef CONFIG_FSL_ESPI
-#define CONFIG_SF_DEFAULT_SPEED                10000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
 
 #if defined(CONFIG_TSEC_ENET)
 
@@ -257,10 +253,6 @@ extern unsigned long get_sdram_size(void);
  * Environment
  */
 #if defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
 #define CONFIG_ENV_SIZE                0x2000
index f385509..68100f1 100644 (file)
@@ -406,10 +406,6 @@ combinations. this should be removed later
  * used for SLIC
  */
 /* eSPI - Enhanced SPI */
-#ifdef CONFIG_FSL_ESPI
-#define CONFIG_SF_DEFAULT_SPEED                10000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
 
 #if defined(CONFIG_TSEC_ENET)
 
@@ -458,10 +454,6 @@ combinations. this should be removed later
 #define CONFIG_SYS_MMC_ENV_DEV         0
 #define CONFIG_ENV_SIZE                        0x2000
 #elif defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
 #define CONFIG_ENV_SIZE                0x2000
index ebf44b5..9b83a50 100644 (file)
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
 /* eSPI - Enhanced SPI */
-#define CONFIG_SF_DEFAULT_SPEED                10000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 
 #ifdef CONFIG_TSEC_ENET
 #define CONFIG_MII_DEFAULT_TSEC        1       /* Allow unregistered phys */
  */
 #if defined(CONFIG_SYS_RAMBOOT)
 #if defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
 #define CONFIG_ENV_SIZE                0x2000
index 83d7745..514733e 100644 (file)
  * Environment is not embedded in u-boot. First time runing may have env
  * crc error warning if there is no correct environment on the flash.
  */
-#ifdef CONFIG_CF_SBF
-#      define CONFIG_ENV_SPI_CS        2
-#endif
 #define CONFIG_ENV_OVERWRITE           1
 
 /*-----------------------------------------------------------------------
index 4b8ef38..f7b0669 100644 (file)
 #endif
 
 #if defined(CONFIG_CF_SBF)
-#define CONFIG_ENV_SPI_CS              1
 #define CONFIG_ENV_OFFSET              0x40000
 #define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_ENV_SECT_SIZE           0x10000
index 87cdbae..57c8572 100644 (file)
  * crc error warning if there is no correct environment on the flash.
  */
 #if defined(CONFIG_SYS_STMICRO_BOOT)
-#      define CONFIG_ENV_SPI_CS                1
 #      define CONFIG_ENV_OFFSET                0x20000
 #      define CONFIG_ENV_SIZE          0x2000
 #      define CONFIG_ENV_SECT_SIZE     0x10000
index d41b7c4..448dfc9 100644 (file)
  * Environment is not embedded in u-boot. First time runing may have env
  * crc error warning if there is no correct environment on the flash.
  */
-#ifdef CONFIG_CF_SBF
-#      define CONFIG_ENV_SPI_CS                1
-#endif
 #undef CONFIG_ENV_OVERWRITE
 
 /*-----------------------------------------------------------------------
index 1413b3d..8191290 100644 (file)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_BUS_NUM      1
 
-#if defined(CONFIG_SPI_FLASH)
-#define CONFIG_SF_DEFAULT_SPEED        10000000
-#define CONFIG_SF_DEFAULT_MODE 0
-#endif
-
 /*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
 
 #if defined(CONFIG_SYS_RAMBOOT)
 #if defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_SIZE                0x2000  /* 8KB */
 #define CONFIG_ENV_OFFSET      0xF0000
 #define CONFIG_ENV_SECT_SIZE   0x10000
index 134ffe5..4be40d0 100644 (file)
@@ -573,8 +573,6 @@ extern unsigned long get_sdram_size(void);
  */
 #if !defined(CONFIG_NAND) || !defined(CONFIG_NAND_SECBOOT)
 /* eSPI - Enhanced SPI */
-#define CONFIG_SF_DEFAULT_SPEED                10000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #endif
 
 #if defined(CONFIG_TSEC_ENET)
@@ -646,10 +644,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_MMC_ENV_DEV         0
 #define CONFIG_ENV_SIZE                        0x2000
 #elif defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
 #define CONFIG_ENV_SIZE                0x2000
index 3ccfeca..bdbf119 100644 (file)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_BUS_NUM      1
 
-#define CONFIG_SF_DEFAULT_SPEED                10000000
-#define CONFIG_SF_DEFAULT_MODE         0
-
 /*
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
  * Environment
  */
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_SIZE                0x2000  /* 8KB */
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
index bd2913e..b433308 100644 (file)
 #define CONFIG_ENV_OVERWRITE
 
 #if defined(CONFIG_SPIFLASH)
-       #define CONFIG_ENV_SPI_BUS              0
-       #define CONFIG_ENV_SPI_CS               0
-       #define CONFIG_ENV_SPI_MAX_HZ           10000000
-       #define CONFIG_ENV_SPI_MODE             0
        #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
        #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
        #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -350,8 +346,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE          0
 
 /*
  * General PCI
index d62fd35..1539e8f 100644 (file)
 /*
  *  Environment variables configurations
  */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          20000000        /* 20Mhz */
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 #define CONFIG_ENV_SECT_SIZE           0x40000         /* 256K */
 #define CONFIG_ENV_SIZE                        0x02000
 #define CONFIG_ENV_OFFSET              0xc0000         /* env starts here - 768K */
index 3c8c216..af19193 100644 (file)
 /*
  *  Environment variables configurations
  */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          20000000        /* 20Mhz */
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 #define CONFIG_ENV_SECT_SIZE           0x40000         /* 256K */
 #define CONFIG_ENV_SIZE                        0x02000
 #define CONFIG_ENV_OFFSET              0xc0000         /* env starts here - 768K */
index c63dfd3..ef94097 100644 (file)
 #endif
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          10000000
-#define CONFIG_ENV_SPI_MODE            0
 #define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET              0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE           0x10000
@@ -501,8 +497,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE   0
 
 /*
  * General PCIe
index b0f93ab..551ba6d 100644 (file)
 #endif
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          10000000
-#define CONFIG_ENV_SPI_MODE            0
 #define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET              0x100000        /* 1MB */
 #if defined(CONFIG_TARGET_T1024RDB)
@@ -497,8 +493,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED        10000000
-#define CONFIG_SF_DEFAULT_MODE 0
 
 /*
  * General PCIe
index 147ef71..417383c 100644 (file)
 
 #ifdef CONFIG_MTD_NOR_FLASH
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -415,8 +411,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE          0
 
 /*
  * General PCI
index 4cecab3..a7e0f8f 100644 (file)
@@ -521,12 +521,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE          0
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 
 /*
  * General PCI
index 9ca384c..0d53ad5 100644 (file)
 #endif
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_SIZE                0x2000     /* 8KB */
 #define CONFIG_ENV_OFFSET      0x100000   /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
@@ -493,11 +489,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#ifdef CONFIG_SPI_FLASH
-
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE   0
-#endif
 
 /*
  * General PCI
index 446e426..a78dd81 100644 (file)
 #define CONFIG_SYS_MEMTEST_END         0x00400000
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_SIZE                0x2000     /* 8KB */
 #define CONFIG_ENV_OFFSET      0x100000   /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
@@ -435,10 +431,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#ifdef CONFIG_SPI_FLASH
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE   0
-#endif
 
 /*
  * General PCI
index 0693901..9e70412 100644 (file)
 #include "t4qds.h"
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -362,8 +358,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE          0
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
index f42a4f4..71258c8 100644 (file)
        "bootm 0x01000000 - 0x00f00000"
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
@@ -507,8 +503,6 @@ unsigned long get_board_ddr_clk(void);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE          0
 
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
index 6a0254a..b518c22 100644 (file)
 #define CONFIG_SYS_I2C_NCT72_ADDR      0x4C
 #define CONFIG_SYS_I2C_IDT6V49205B     0x69
 
-#define CONFIG_SF_DEFAULT_SPEED                10000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-
 #if defined(CONFIG_PCI)
 /*
  * General PCI
 
 #else
 
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 
 #ifdef CONFIG_RAMBOOT_SPIFLASH
 
index 915f416..1fe3391 100644 (file)
 #define CONFIG_SYS_MAX_FLASH_SECT      512
 
 /* environments */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          50000000
-#define CONFIG_ENV_SPI_MODE            0
 #define CONFIG_ENV_SECT_SIZE           0x1000
 #define CONFIG_ENV_OFFSET              0x140000
 #define CONFIG_ENV_SIZE                        8192
 
 
 /* SPI FLASH */
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         0
 
 /*
  * For booting Linux, the board info and command line data
index 0c9de61..e2c7060 100644 (file)
 #define CONFIG_PHY_ATHEROS
 
 /* Serial Flash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED        20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_ENV_SIZE                 (8 * 1024)
 #define CONFIG_ENV_OFFSET               (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
-#define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 
 #define CONFIG_SYS_FSL_USDHC_NUM        3
 
index 3bd96b9..0834ff5 100644 (file)
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
 
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_ENV_SECT_SIZE           (4 << 10) /* 4 KB sectors */
 #define CONFIG_ENV_OFFSET              (768 << 10) /* 768 KiB in */
 #define CONFIG_ENV_OFFSET_REDUND       (896 << 10) /* 896 KiB in */
 #endif
 
 /* SPI flash. */
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 
 /* Network. */
 #define CONFIG_PHY_SMSC
index ed71f4c..5a60806 100644 (file)
 
 #ifdef CONFIG_QSPI_BOOT
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64 KB sectors */
 #define CONFIG_ENV_OFFSET              0x110000
 #define CONFIG_ENV_OFFSET_REDUND       0x120000
 /* SPI */
 #define CONFIG_TI_SPI_MMAP
 #define CONFIG_QSPI_SEL_GPIO                   48
-#define CONFIG_SF_DEFAULT_SPEED                48000000
-#define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_3
 #define CONFIG_QSPI_QUAD_SUPPORT
 #define CONFIG_TI_EDMA3
 
index 70aa425..4899984 100644 (file)
@@ -97,8 +97,6 @@
 
 /* SPI */
 #define CONFIG_TI_SPI_MMAP
-#define CONFIG_SF_DEFAULT_SPEED                76800000
-#define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_0
 #define CONFIG_QSPI_QUAD_SUPPORT
 
 #endif /* __CONFIG_AM57XX_EVM_H */
index 96850b5..0e8c3f7 100644 (file)
@@ -30,7 +30,6 @@
                                        "mtdparts default;" \
                                        "bootm 0x9f650000"
 
-#define CONFIG_ENV_SPI_MAX_HZ           25000000
 #define CONFIG_ENV_OFFSET               0x40000
 #define CONFIG_ENV_SECT_SIZE            0x10000
 #define CONFIG_ENV_SIZE                 0x10000
index 4dbca91..fa69210 100644 (file)
@@ -34,7 +34,6 @@
                                        "mtdparts default;" \
                                        "bootm 0x9f680000"
 
-#define CONFIG_ENV_SPI_MAX_HZ           25000000
 #define CONFIG_ENV_OFFSET               0x40000
 #define CONFIG_ENV_SECT_SIZE            0x10000
 #define CONFIG_ENV_SIZE                 0x10000
index ca974c0..4f28f52 100644 (file)
@@ -31,8 +31,6 @@
 #define CONFIG_FEC_MXC_PHYADDR         0
 
 #define CONFIG_SPI_FLASH_MTD
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 /* Environment organization */
 #define CONFIG_ENV_SIZE                        (12 * 1024)
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 #define CONFIG_ENV_SECT_SIZE           (0x010000)
 #define CONFIG_ENV_OFFSET              (0x0d0000)
 #define CONFIG_ENV_OFFSET_REDUND       (0x0e0000)
index c53ba89..03e2a2b 100644 (file)
@@ -21,9 +21,6 @@
 
 #define CONFIG_FEC_XCV_TYPE            RMII
 
-#define CONFIG_SF_DEFAULT_BUS          3
-#define CONFIG_SF_DEFAULT_CS           0
-
 #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
        "board_type=aristainetos7@1\0" \
        "mtdids=nand0=gpmi-nand,nor0=spi3.0\0" \
index 67b2e58..00e5667 100644 (file)
@@ -20,9 +20,6 @@
 
 #define CONFIG_FEC_XCV_TYPE            RGMII
 
-#define CONFIG_SF_DEFAULT_BUS          3
-#define CONFIG_SF_DEFAULT_CS           1
-
 #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
        "board_type=aristainetos2_7@1\0" \
        "nor_bootdelay=-2\0" \
index 91069a2..cfe0e05 100644 (file)
@@ -20,9 +20,6 @@
 
 #define CONFIG_FEC_XCV_TYPE            RGMII
 
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-
 #define CONFIG_EXTRA_ENV_BOARD_SETTINGS \
        "board_type=aristainetos2_7@1\0" \
        "nor_bootdelay=-2\0" \
index 2177512..95710fb 100644 (file)
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0:0; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0:1; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
index 1c7fbe1..599e262 100644 (file)
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0:3; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
index 856e032..6b1db9f 100644 (file)
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
index 777a99b..d83546d 100644 (file)
@@ -45,9 +45,6 @@
        (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#endif
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
index b052071..3e18716 100644 (file)
@@ -76,7 +76,6 @@
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
index 6adb965..1abca55 100644 (file)
@@ -38,9 +38,6 @@
        (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
 
 /* DataFlash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#endif
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
@@ -87,7 +84,6 @@
 #define CONFIG_ENV_OFFSET      0x5000
 #define CONFIG_ENV_SIZE                0x3000
 #define CONFIG_ENV_SECT_SIZE   0x1000
-#define CONFIG_ENV_SPI_MAX_HZ  30000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0; " \
                                "sf read 0x22000000 0x100000 0x300000; " \
                                "bootm 0x22000000"
@@ -96,7 +92,6 @@
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  30000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
index e3eb928..395f3a4 100644 (file)
 #define CONFIG_SYS_MAX_FLASH_SECT      512
 
 /* environments */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          50000000
-#define CONFIG_ENV_SPI_MODE            0
 #define CONFIG_ENV_SECT_SIZE           0x1000
 #define CONFIG_ENV_OVERWRITE
 
 /* SPI FLASH */
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         0
 
 /*
  * For booting Linux, the board info and command line data
index 0f4d78a..0c5a3af 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR           0x82000000
 
 /*
- * NAND Flash configuration
- */
-#define CONFIG_SYS_NAND_BASE           (ARC_FPGA_PERIPHERAL_BASE + 0x16000)
-#define CONFIG_SYS_MAX_NAND_DEVICE     1
-
-/*
  * UART configuration
  */
 #define CONFIG_SYS_NS16550_SERIAL
index df5d5bd..fb9c2a6 100644 (file)
@@ -453,7 +453,6 @@ DEFAULT_LINUX_BOOT_ENV \
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
 
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_ENV_SECT_SIZE           (4 << 10) /* 4 KB sectors */
 #define CONFIG_ENV_OFFSET              (768 << 10) /* 768 KiB in */
 #define CONFIG_ENV_OFFSET_REDUND       (896 << 10) /* 896 KiB in */
@@ -466,7 +465,6 @@ DEFAULT_LINUX_BOOT_ENV \
 #endif
 
 /* SPI flash. */
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 
 /* Network. */
 #define CONFIG_PHY_SMSC
index 8c675f7..6984edd 100644 (file)
 #define CONFIG_ENV_OFFSET      0x1e0000
 #define CONFIG_ENV_SECT_SIZE   CONFIG_ENV_SIZE
 
-#define CONFIG_DM_SPI                  1
 #define CONFIG_SYS_MAX_FLASH_BANKS     1
-#define CONFIG_CMD_SF
-#define CONFIG_CMD_SPI
-#define CONFIG_CMD_SF_TEST
 
 #endif /* __CONFIG_H */
index a11a800..4c5826c 100644 (file)
@@ -29,8 +29,6 @@
 
 /* SPI */
 #define CONFIG_TEGRA_SLINK_CTRLS       6
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED        24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index ec6b01f..832dbba 100644 (file)
 #define CONFIG_FEC_MXC
 #endif
 
-/* SPI */
-#ifdef CONFIG_CMD_SPI
-#define CONFIG_DEFAULT_SPI_BUS         2
-#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_0
-
 /* SPI FLASH */
 #ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          2
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                40000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-
-#define CONFIG_ENV_SPI_BUS             2
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          40000000
-#define CONFIG_ENV_SPI_MODE            SPI_MODE_0
-#endif
-
 #endif
 
 /* Boot Linux */
index 5badd2d..ae9b75b 100644 (file)
@@ -187,11 +187,9 @@ NANDTGTS \
 
 #if defined(CONFIG_SPI)
 /* SPI Flash */
-#define CONFIG_SF_DEFAULT_SPEED                        24000000
 #define CONFIG_SYS_SPI_U_BOOT_OFFS             0x40000
 /* Environment */
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SPI_MAX_HZ                  CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_ENV_SECT_SIZE                   CONFIG_ENV_SIZE
 #define CONFIG_ENV_OFFSET                      0x20000
 #define CONFIG_ENV_OFFSET_REDUND               (CONFIG_ENV_OFFSET + \
index 6b2553c..8d541a1 100644 (file)
@@ -33,8 +33,6 @@
 
 /* SPI */
 #define CONFIG_TEGRA_SLINK_CTRLS       6
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED        24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-post.h"
index 74305f1..e6abfe2 100644 (file)
@@ -28,8 +28,6 @@
 #define CONFIG_SYS_MMC_ENV_PART                2
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index e01bf5b..ad0a64a 100644 (file)
@@ -33,9 +33,6 @@
 /* SPI NOR */
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SPI_FLASH_SST
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_0)
 
 /* Thermal support */
 #define CONFIG_IMX_THERMAL
 #if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 #define CONFIG_ENV_OFFSET              (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #endif
 
 #endif                        /* __CONFIG_CGTQMX6EVAL_H */
index 80f0b4f..bf2bb44 100644 (file)
@@ -27,8 +27,6 @@
 
 /* SPI Flash support */
 #define CONFIG_TI_SPI_MMAP
-#define CONFIG_SF_DEFAULT_SPEED                48000000
-#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
 
 /* SPI SPL defines */
 /* Offsets: 0K - SPL1, 64K - SPL2, 128K - SPL3, 192K - SPL4, 256K - U-Boot */
@@ -44,7 +42,6 @@
 
 #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 #define CONFIG_ENV_OFFSET              (768 * 1024)
-#define CONFIG_ENV_SPI_MAX_HZ          48000000
 
 /* EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
index f84a112..26d1a97 100644 (file)
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* SPI Flash support */
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_0)
 
 /* FLASH and environment organization */
 #define CONFIG_ENV_SIZE                        SZ_8K
 #define CONFIG_ENV_OFFSET              (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 
 /* MMC Config*/
 #define CONFIG_FSL_USDHC
index f951082..c51cf28 100644 (file)
@@ -22,7 +22,6 @@
  */
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_BUS          1
 
 /*
  * SDIO/MMC Card Configuration
index f7e82df..dfd96ff 100644 (file)
 #define CONFIG_SYS_BAUDRATE_TABLE      {9600, 19200, 38400, 57600, 115200}
 
 /* SPI flash */
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                25000000
-#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_0)
 
 /* MTD support */
 #ifndef CONFIG_SPL_BUILD
 #endif
 
 /* Environment */
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
 #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 #define CONFIG_ENV_SIZE                        (8 * 1024)
 #define CONFIG_ENV_OFFSET              (768 * 1024)
index 79eb865..ffe4a44 100644 (file)
@@ -55,8 +55,6 @@
 
 /* SPI Flash support */
 #define CONFIG_TI_SPI_MMAP
-#define CONFIG_SF_DEFAULT_SPEED                48000000
-#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
 
 /* Power */
 #define CONFIG_POWER
@@ -87,7 +85,6 @@
 
 #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
 #define CONFIG_ENV_OFFSET              (768 * 1024)
-#define CONFIG_ENV_SPI_MAX_HZ           48000000
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x80200000\0" \
index 1908d35..f1c3522 100644 (file)
 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 
-#ifndef CONFIG_TRAILBLAZER
-
-#define CONFIG_SF_DEFAULT_SPEED                10000000
-#define CONFIG_SF_DEFAULT_MODE         0
-#endif
-
 /*
  * MMC
  */
 #if defined(CONFIG_TRAILBLAZER)
 #define CONFIG_ENV_SIZE                0x2000          /* 8KB */
 #elif defined(CONFIG_RAMBOOT_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_SIZE                0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
index 06c93c3..9130837 100644 (file)
 #define CONFIG_LOADADDR                1000000
 
 /*
- * Commands configuration
- */
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_SPI
-
-/* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
-
-/*
  * SDIO/MMC Card Configuration
  */
 #define CONFIG_SYS_MMC_BASE            MVEBU_SDIO_BASE
@@ -54,7 +43,6 @@
 #define CONFIG_EHCI_IS_TDI
 
 /* Environment in SPI NOR flash */
-#define CONFIG_ENV_SPI_BUS             1
 #define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
 #define CONFIG_ENV_SIZE                        (64 << 10) /* 64KiB */
 #define CONFIG_ENV_SECT_SIZE           (256 << 10) /* 256KiB sectors */
index cd79150..f974291 100644 (file)
 #define CONFIG_ENV_OVERWRITE
 
 #if defined(CONFIG_SPIFLASH)
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           10000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_SIZE                 0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET               0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE            0x10000
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         10000000
-#define CONFIG_SF_DEFAULT_MODE          0
 
 /*
  * General PCI
index 14a3046..583f994 100644 (file)
 #define CONFIG_SYS_SPI_CLK             clk_get(DAVINCI_SPI1_CLKID)
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_SPI_BASE            DAVINCI_SPI1_BASE
-#define CONFIG_SF_DEFAULT_SPEED                30000000
 #endif
-#define CONFIG_ENV_SPI_MAX_HZ  0
-#define CONFIG_ENV_SPI_MODE    0
 
 #ifdef CONFIG_USE_SPIFLASH
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x8000
index 9b25a9d..e8a4e3c 100644 (file)
@@ -25,8 +25,6 @@
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED        24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index 4c30077..55968c2 100644 (file)
@@ -33,8 +33,6 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /* Environment in SPI NOR flash */
 #define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
index 626a406..f1bdc2d 100644 (file)
  */
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /* USB/EHCI configuration */
 #define CONFIG_EHCI_IS_TDI
 
 /* Environment in SPI NOR flash */
-#define CONFIG_ENV_SPI_BUS             1
 #define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
 #define CONFIG_ENV_SIZE                        (64 << 10) /* 64KiB */
 #define CONFIG_ENV_SECT_SIZE           (256 << 10) /* 256KiB sectors */
index 1f328e9..d378052 100644 (file)
 /*
  * SPI Flash configuration for the environemnt access
  */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /*
  * SDIO/MMC Card Configuration
index 6cba326..b78dbcb 100644 (file)
@@ -30,8 +30,6 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /* Environment in SPI NOR flash */
 #define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
index 9231bd8..48514ff 100644 (file)
 #endif
 
 /* SPI Flash Configs */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                25000000
-#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_0)
-#endif
 
 /* UART */
 #define CONFIG_MXC_UART
 #define CONFIG_ENV_OFFSET_REDUND       \
        (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #endif
 
 #endif /* __DH_IMX6_CONFIG_H */
index 1fb7469..8ab47ab 100644 (file)
 #define CONFIG_MXC_UART_BASE           UART5_BASE
 
 /* SPI NOR Flash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_CS           (0 | (IMX_GPIO_NR(5, 29) << 8))
-#define CONFIG_SF_DEFAULT_SPEED                50000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
 
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
                                                CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
-
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #endif
 
 #define CONFIG_MXC_USB_PORTSC           (PORT_PTS_UTMI | PORT_PTS_PTW)
index f36a9c3..10eac20 100644 (file)
@@ -74,8 +74,6 @@
 
 /* SPI */
 #define CONFIG_TI_SPI_MMAP
-#define CONFIG_SF_DEFAULT_SPEED                76800000
-#define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_0
 #define CONFIG_QSPI_QUAD_SUPPORT
 
 /*
@@ -93,7 +91,6 @@
 #define CONFIG_SYS_SPI_ARGS_SIZE       0x80000
 #if defined(CONFIG_QSPI_BOOT)
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
-#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_ENV_SIZE                        (64 << 10)
 #define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64 KB sectors */
 #define CONFIG_ENV_OFFSET              0x1C0000
index f4d7172..28bda14 100644 (file)
@@ -35,9 +35,6 @@
 #endif
 
 #ifdef CONFIG_CMD_SF
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          50000000 /* 50 MHz */
 #endif
 
 /*
index 2c7928e..07367cf 100644 (file)
@@ -38,9 +38,6 @@
 #endif
 
 #ifdef CONFIG_CMD_SF
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          50000000 /* 50 MHz */
 #endif
 
 /*
index 4ba0505..275a2b4 100644 (file)
@@ -29,8 +29,6 @@
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /* Environment in SPI NOR flash */
 #define CONFIG_ENV_OFFSET              0x7E0000   /* RedBoot config partition in DTS */
index 30c0c7f..c636bf9 100644 (file)
@@ -23,8 +23,6 @@
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index a644e67..88f2e17 100644 (file)
@@ -52,8 +52,6 @@
 
 #define CONFIG_SYS_SPI_BASE            DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK             clk_get(DAVINCI_SPI1_CLKID)
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
 
 /*
  * I2C Configuration
index b472a6c..bf70ea0 100644 (file)
 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
 
 /* Commands */
-#define CONFIG_SF_DEFAULT_BUS          3
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
index 7e7de4d..5142680 100644 (file)
 
 #define CONFIG_PHY_ATHEROS
 
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
-
 #define CONFIG_ARP_TIMEOUT     200UL
 
 #define CONFIG_SYS_MEMTEST_START       0x10000000
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_ENV_OFFSET              (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE           (8 * 1024)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #endif
 
 /* Framebuffer */
index 4e3b26c..5aeb009 100644 (file)
@@ -21,8 +21,6 @@
 /* select serial console configuration */
 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
 
-#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
-
 /* DRAM Memory Banks */
 #define SDRAM_BANK_SIZE                (256UL << 20UL) /* 256 MB */
 
index 0d84c97..b86b542 100644 (file)
@@ -54,7 +54,6 @@
 #define CONFIG_ENV_OFFSET      0x3DE000
 #define CONFIG_ENV_SIZE                (132 << 10)
 #define CONFIG_ENV_SECT_SIZE   CONFIG_ENV_SIZE
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
index cd2a904..db1fc93 100644 (file)
 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0x0
 
 /* SPI */
-#ifdef CONFIG_SPI_FLASH
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                50000000
-#endif
 
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
-#define CONFIG_ENV_SPI_MODE    SPI_MODE_0
 #define CONFIG_ENV_SECT_SIZE   CONFIG_ENV_SIZE
-#define CONFIG_ENV_SPI_BUS     1
-#define CONFIG_ENV_SPI_MAX_HZ  50000000
 #endif
 
 /* Ethernet Controllor Driver */
index 696f009..a87182a 100644 (file)
@@ -17,7 +17,7 @@
 
 #define CONFIG_EXYNOS5_DT
 
-#define CONFIG_ENV_SPI_BASE    0x12D30000
+#define CONFIG_SYS_SPI_BASE    0x12D30000
 #define FLASH_SIZE             (4 << 20)
 #define CONFIG_ENV_OFFSET      (FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_SPI_BOOTING
index e0e1f71..3336578 100644 (file)
 #endif
 
 /* Serial Flash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED        20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_ENV_SIZE                (8 * 1024)
 #define CONFIG_ENV_OFFSET              (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE           (64 * 1024)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 
index 6e23fa2..84ee44e 100644 (file)
 /* SPI */
 #ifdef CONFIG_CMD_SF
   #define CONFIG_SPI_FLASH_MTD
-  #define CONFIG_SF_DEFAULT_BUS              0
-  #define CONFIG_SF_DEFAULT_CS               0
                                             /* GPIO 3-19 (21248) */
-  #define CONFIG_SF_DEFAULT_SPEED            30000000
-  #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
 #endif
 
 #elif defined(CONFIG_SPL_NAND_SUPPORT)
   #define CONFIG_ENV_OFFSET            (512 * SZ_1K)
   #define CONFIG_ENV_SECT_SIZE         (64 * SZ_1K)
   #define CONFIG_ENV_SIZE              (8 * SZ_1K)
-  #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-  #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-  #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-  #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #endif
 
 /* Environment */
index 4e98f19..df4d8bc 100644 (file)
  */
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                104000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /*
  * SDIO/MMC Card Configuration
                                        CONFIG_SYS_SCSI_MAX_LUN)
 
 #ifdef CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI
-/*
- * SPI Flash configuration for the environment access
- */
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
-
 /* Environment in SPI NOR flash */
 #define CONFIG_ENV_SECT_SIZE           SZ_64K
 #define CONFIG_ENV_SIZE                        CONFIG_ENV_SECT_SIZE
index 7b2c794..6504469 100644 (file)
@@ -24,8 +24,6 @@
 #define CONFIG_SYS_MMC_ENV_PART                2
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index 90f9a99..b1aec98 100644 (file)
@@ -86,9 +86,6 @@
 
 #define CONFIG_ENV_SIZE                        (256 << 10)  /* 256 KiB */
 
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_CS           0
-
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_CADENCE_QSPI
 #define CONFIG_CQSPI_REF_CLK 384000000
index 0de83f6..a2e9cf1 100644 (file)
 #include "keymile-common.h"
 
 /* SPI NOR Flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                8100000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          8100000
-#define CONFIG_ENV_SPI_MODE            SPI_MODE_3
 #endif
 
 /* Reserve 4 MB for malloc */
index d4da9dd..a52d1df 100644 (file)
 #define CONFIG_SYS_DPAA_RMAN           /* RMan */
 
 /* Environment in SPI Flash */
-#define CONFIG_ENV_SPI_BUS              0
-#define CONFIG_ENV_SPI_CS               0
-#define CONFIG_ENV_SPI_MAX_HZ           20000000
-#define CONFIG_ENV_SPI_MODE             0
 #define CONFIG_ENV_OFFSET               0x100000       /* 1MB for u-boot */
 #define CONFIG_ENV_SIZE                        0x004000        /* 16K env */
 #define CONFIG_ENV_SECT_SIZE            0x010000
@@ -252,8 +248,6 @@ int get_scl(void);
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SF_DEFAULT_SPEED         20000000
-#define CONFIG_SF_DEFAULT_MODE          0
 
 /*
  * General PCI
index 1f619a0..1ba28b5 100644 (file)
 #include "mv-common.h"
 
 /* Remove or override few declarations from mv-common.h */
-#undef CONFIG_ENV_SPI_MAX_HZ
 #undef CONFIG_SYS_IDE_MAXBUS
 #undef CONFIG_SYS_IDE_MAXDEVICE
-#define CONFIG_ENV_SPI_MAX_HZ           20000000 /* 20Mhz */
 
 /*
  * Enable platform initialisation via misc_init_r() function
index c631e26..1e239ec 100644 (file)
@@ -47,8 +47,6 @@
 
 #define CONFIG_SYS_SPI_BASE            DAVINCI_SPI0_BASE
 #define CONFIG_SYS_SPI_CLK             clk_get(DAVINCI_SPI0_CLKID)
-#define CONFIG_SF_DEFAULT_SPEED                50000000
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 
 /*
  * I2C Configuration
index 04639c1..3a42210 100644 (file)
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR                0x400d0000
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          1000000
-#define CONFIG_ENV_SPI_MODE            0x03
 #define CONFIG_SPI_FLASH_SPANSION
 #define CONFIG_FSL_SPI_INTERFACE
 #define CONFIG_SF_DATAFLASH
index c76bfdc..fb0d1ba 100644 (file)
@@ -74,9 +74,7 @@
 
 /* DSPI */
 #define CONFIG_FSL_DSPI1
-#define CONFIG_DEFAULT_SPI_BUS 1
 
-#define CONFIG_CMD_SPI
 #define MMAP_DSPI          DSPI1_BASE_ADDR
 
 #define CONFIG_SYS_DSPI_CTAR0   1
                                DSPI_CTAR_DT(0))
 #define CONFIG_SPI_FLASH_EON /* cs3 */
 
-#define CONFIG_SF_DEFAULT_SPEED      10000000
-#define CONFIG_SF_DEFAULT_MODE       SPI_MODE_0
-#define CONFIG_SF_DEFAULT_BUS        1
-#define CONFIG_SF_DEFAULT_CS         0
-
 /*  MMC  */
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
index 6be8df1..4af3988 100644 (file)
@@ -85,6 +85,8 @@
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
+#define CONFIG_CHIP_SELECTS_PER_CTRL   4
+
 /*
  * Serial Port
  */
index 4b6760b..da55bf2 100644 (file)
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
+#define CONFIG_CHIP_SELECTS_PER_CTRL   4
+
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
        !defined(CONFIG_QSPI_BOOT)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
index f7e7877..2e9d476 100644 (file)
 #define CONFIG_SPI_FLASH_STMICRO       /* cs0 */
 #define CONFIG_SPI_FLASH_SST           /* cs1 */
 #define CONFIG_SPI_FLASH_EON           /* cs2 */
-#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_CS           0
-#endif
 #endif
 #endif
 
 #define CONFIG_SYS_FMAN_FW_ADDR                0x900000
 #define CONFIG_SYS_QE_FW_ADDR          0x940000
 
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          1000000
-#define CONFIG_ENV_SPI_MODE            0x03
 
 #else
 #ifdef CONFIG_NAND_BOOT
 #elif defined(CONFIG_QSPI_BOOT)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR                0x40900000
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          1000000
-#define CONFIG_ENV_SPI_MODE            0x03
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
 /* FMan fireware Pre-load address */
index d9fcd3a..24ff2d1 100644 (file)
 
 #ifdef CONFIG_TFABOOT
 #define CONFIG_SYS_FMAN_FW_ADDR                0x900000
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          1000000
-#define CONFIG_ENV_SPI_MODE            0x03
 #else
 #ifdef CONFIG_SD_BOOT
 /*
 #elif defined(CONFIG_QSPI_BOOT)
 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
 #define CONFIG_SYS_FMAN_FW_ADDR                0x40900000
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_MAX_HZ          1000000
-#define CONFIG_ENV_SPI_MODE            0x03
 #elif defined(CONFIG_NAND_BOOT)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #define CONFIG_SYS_FMAN_FW_ADDR                (36 * CONFIG_SYS_NAND_BLOCK_SIZE)
index 6e36baf..58dd9fb 100644 (file)
@@ -39,10 +39,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SPI_FLASH_STMICRO       /* cs0 */
 #define CONFIG_SPI_FLASH_SST           /* cs1 */
 #define CONFIG_SPI_FLASH_EON           /* cs2 */
-#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_CS           0
-#endif
 #endif
 
 /* QSPI */
index a80ce92..50c18f1 100644 (file)
@@ -147,7 +147,7 @@ unsigned long long get_qixis_addr(void);
  */
 
 #if defined(CONFIG_FSL_MC_ENET)
-#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE           (512UL * 1024 * 1024)
+#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE           (128UL * 1024 * 1024)
 #endif
 /* Command line configuration */
 #define CONFIG_CMD_CACHE
index 17d543d..4387862 100644 (file)
@@ -384,8 +384,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SPI_FLASH_EON
 #if !defined(CONFIG_TFABOOT) && \
        !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_CS           0
 #endif
 #endif
 
index 60a0b42..454c9e9 100644 (file)
@@ -152,7 +152,7 @@ unsigned long long get_qixis_addr(void);
  * 512MB aligned, so the min size to hide is 512MB.
  */
 #ifdef CONFIG_FSL_MC_ENET
-#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE           (512UL * 1024 * 1024)
+#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE           (128UL * 1024 * 1024)
 #endif
 
 /* Command line configuration */
index 9d4be18..72e6265 100644 (file)
 
 /* loading initramfs images without uimage header */
 
-/* ST M25P40 */
-#undef CONFIG_ENV_SPI_MAX_HZ
-#define CONFIG_ENV_SPI_MAX_HZ          25000000
-#undef CONFIG_SF_DEFAULT_SPEED
-#define CONFIG_SF_DEFAULT_SPEED                25000000
-
 /*
  *  Environment variables configurations
  */
index 4b5608b..637619c 100644 (file)
  * 512MB aligned, so the min size to hide is 512MB.
  */
 #ifdef CONFIG_FSL_MC_ENET
-#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE   (512UL * 1024 * 1024)
+#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE   (256UL * 1024 * 1024)
 #endif
 
 /* I2C bus multiplexer */
index d378333..fada0ca 100644 (file)
@@ -29,8 +29,6 @@
 #define CONFIG_SYS_I2C_SPEED           100000
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /* Environment in SPI NOR flash */
 #define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
index 644f339..a1774c0 100644 (file)
 #define CONFIG_SYS_MEMTEST_START       0x10000000
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
 
-#define CONFIG_SF_DEFAULT_BUS  2
-#define CONFIG_SF_DEFAULT_CS   0
-#define CONFIG_SF_DEFAULT_SPEED 25000000
-#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
-
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
index 0a03a2f..a1fd5f6 100644 (file)
@@ -99,7 +99,6 @@
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 
 #elif CONFIG_SYS_USE_NANDFLASH
 
index ba0952c..d1ab40e 100644 (file)
 #else /* !FLASH */
 
 #ifdef SPIFLASH
-# define CONFIG_SF_DEFAULT_MODE                SPI_MODE_3
-# define CONFIG_SF_DEFAULT_SPEED       XILINX_SPI_FLASH_MAX_FREQ
-# define CONFIG_SF_DEFAULT_CS          XILINX_SPI_FLASH_CS
-
 # ifdef        RAMENV
 #  define CONFIG_ENV_SIZE      0x1000
 #  define CONFIG_ENV_ADDR      (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 
 # else /* SPIFLASH && !RAMENV */
-#  define CONFIG_ENV_SPI_MODE          SPI_MODE_3
-#  define CONFIG_ENV_SPI_MAX_HZ                CONFIG_SF_DEFAULT_SPEED
-#  define CONFIG_ENV_SPI_CS            CONFIG_SF_DEFAULT_CS
 /* 128K(two sectors) for env */
 #  define CONFIG_ENV_SECT_SIZE 0x10000
 #  define CONFIG_ENV_SIZE      (2 * CONFIG_ENV_SECT_SIZE)
index cf9440f..10b94f4 100644 (file)
 /*
  * SPI Flash configuration
  */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
 
-/* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 #define CONFIG_MTD_DEVICE              /* needed for mtdparts commands */
 #define CONFIG_MTD_PARTITIONS          /* required for UBI partition support */
 
index a6636e1..f4972b6 100644 (file)
 /*
  * SPI Flash configuration
  */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-
-/* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 
 #define CONFIG_ENV_OFFSET              0x180000 /* as Marvell U-Boot version */
 #define CONFIG_ENV_SIZE                        (64 << 10) /* 64KiB */
index 1117139..dd04580 100644 (file)
 #define CONFIG_ENV_OFFSET              0x40000         /* 256K */
 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 #define CONFIG_ENV_SECT_SIZE           0x1000
-#define CONFIG_ENV_SPI_CS              0
-#define CONFIG_ENV_SPI_BUS             2
-#define CONFIG_ENV_SPI_MAX_HZ          24000000
-#define CONFIG_ENV_SPI_MODE            SPI_MODE_0
 #endif
 
 /* UBI and NAND partitioning */
 #define CONFIG_USB_MAX_CONTROLLER_COUNT        1
 #endif
 
-/* SPI */
-#ifdef CONFIG_CMD_SPI
-#define CONFIG_DEFAULT_SPI_BUS         2
-#define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_0
-
-/* SPI Flash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          2
-#define CONFIG_SF_DEFAULT_CS           0
-/* this may vary and depends on the installed chip */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                24000000
-#endif
-
-#endif
-
 /* Framebuffer support */
 #ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_LOGO
index 4765764..993d131 100644 (file)
@@ -43,9 +43,6 @@
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE   UART1_BASE
 
-#define CONFIG_DEFAULT_SPI_BUS 1
-#define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_0 | SPI_CS_HIGH)
-
 /* PMIC Controller */
 #define CONFIG_POWER
 #define CONFIG_POWER_SPI
index 711aa82..6fe0467 100644 (file)
 
 #define CONFIG_PHY_ATHEROS
 
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
-
 #ifdef CONFIG_SUPPORT_EMMC_BOOT
 #define EMMC_ENV \
        "emmcdev=2\0" \
index a80a656..5d649f6 100644 (file)
 #if defined CONFIG_SPI_BOOT
 #define CONFIG_ENV_OFFSET               (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
-#define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 #else
 #define CONFIG_ENV_OFFSET              (8 * SZ_64K)
 #endif
 
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#endif
-
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
index 058856a..c4d8a89 100644 (file)
 
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_SYS_FSL_QSPI_AHB
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED        40000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #define FSL_QSPI_FLASH_SIZE            SZ_32M
 #define FSL_QSPI_FLASH_NUM             2
 #endif
index 2a7eb22..dc4181d 100644 (file)
 #define FSL_QSPI_FLASH_SIZE            SZ_32M
 #endif
 #define FSL_QSPI_FLASH_NUM             2
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED        40000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #endif
 
 #ifndef CONFIG_SPL_BUILD
index c8c088e..42e5115 100644 (file)
 
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_SYS_FSL_QSPI_AHB
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED        40000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #define FSL_QSPI_FLASH_NUM             1
 #define FSL_QSPI_FLASH_SIZE            SZ_32M
 #endif
index c64d092..1fc5c24 100644 (file)
 
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_SYS_FSL_QSPI_AHB
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED        40000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #define FSL_QSPI_FLASH_NUM             1
 #define FSL_QSPI_FLASH_SIZE            SZ_32M
 #endif
index ad919a6..39d29de 100644 (file)
 
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_SYS_FSL_QSPI_AHB
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                40000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 #define FSL_QSPI_FLASH_NUM             1
 #define FSL_QSPI_FLASH_SIZE            SZ_64M
 #define QSPI0_BASE_ADDR                        QSPI1_IPS_BASE_ADDR
index c364442..d941caa 100644 (file)
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE          UART2_BASE
 
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS  0
-#define CONFIG_SF_DEFAULT_CS   0
-#define CONFIG_SF_DEFAULT_SPEED 25000000
-#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
-#endif
-
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 #define CONFIG_ENV_OFFSET              (768 * 1024)
 #define CONFIG_ENV_SECT_SIZE           (8 * 1024)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #endif
 
 /*
index 933f840..fca4eb5 100644 (file)
@@ -27,8 +27,6 @@
 #define CONFIG_LCD_ALIGNMENT   MMU_SECTION_SIZE
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED        24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #undef CONFIG_LOADADDR
index b8809c8..9f2d43e 100644 (file)
                "setenv kernelname Image.itb;" \
                "run loadkernel;" \
                "run kernel_args;" \
-               "bootm ${kernel_addr_r}#${boardname}\0" \
+               "bootm ${kernel_addr_r}#${board_name}\0" \
        "boot_uimg=" \
                "setenv kernelname uImage;" \
                "run check_dtb;" \
index f178549..af6004e 100644 (file)
@@ -7,7 +7,7 @@
 #ifndef __CONFIG_ODROID_XU3_H
 #define __CONFIG_ODROID_XU3_H
 
-#include "exynos5420-common.h"
+#include <configs/exynos5420-common.h>
 #include <configs/exynos5-common.h>
 
 #define CONFIG_BOARD_COMMON
@@ -18,7 +18,7 @@
 
 #define TZPC_BASE_OFFSET               0x10000
 
-#define SDRAM_BANK_SIZE                (256UL << 20UL) /* 256 MB */
+#define SDRAM_BANK_SIZE                        (256UL << 20UL) /* 256 MB */
 /* Reserve the last 22 MiB for the secure firmware */
 #define CONFIG_SYS_MEM_TOP_HIDE                (22UL << 20UL)
 #define CONFIG_TZSW_RESERVED_DRAM_SIZE CONFIG_SYS_MEM_TOP_HIDE
@@ -28,7 +28,7 @@
 #define CONFIG_ENV_SIZE                        (SZ_1K * 16)
 #define CONFIG_ENV_OFFSET              (SZ_1K * 3136) /* ~3 MiB offset */
 
-#define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_LOAD_ADDR - 0x1000000)
+#define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_LOAD_ADDR - 0x1000000)
 
 #define CONFIG_DEFAULT_CONSOLE         "console=ttySAC2,115200n8\0"
 
@@ -38,7 +38,7 @@
 /* DFU */
 #define CONFIG_SYS_DFU_DATA_BUF_SIZE   SZ_32M
 #define DFU_DEFAULT_POLL_TIMEOUT       300
-#define DFU_MANIFEST_POLL_TIMEOUT       25000
+#define DFU_MANIFEST_POLL_TIMEOUT      25000
 
 /* THOR */
 #define CONFIG_G_DNL_THOR_VENDOR_NUM   CONFIG_USB_GADGET_VENDOR_NUM
 #define CONFIG_SET_DFU_ALT_INFO
 #define CONFIG_SET_DFU_ALT_BUF_LEN     (SZ_1K)
 
-/* Set soc_rev, soc_id, board_rev, boardname, fdtfile */
-#define CONFIG_ODROID_REV_AIN                  9
+/* Set soc_rev, soc_id, board_rev, board_name, fdtfile */
+#define CONFIG_ODROID_REV_AIN          9
 #define CONFIG_REVISION_TAG
 
+/*
+ * Need to override existing one (smdk5420) with odroid so set_board_info will
+ * use proper prefix when creating full board_name (SYS_BOARD + type)
+ */
 #undef CONFIG_SYS_BOARD
-#define CONFIG_SYS_BOARD       "odroid"
+#define CONFIG_SYS_BOARD               "odroid"
 
 /* Define new extra env settings, including DFU settings */
 #undef CONFIG_EXTRA_ENV_SETTINGS
        "rootfstype=ext4\0" \
        "console=" CONFIG_DEFAULT_CONSOLE \
        "fdtfile=exynos5422-odroidxu3.dtb\0" \
-       "boardname=odroidxu3\0" \
+       "board_name=odroidxu3\0" \
        "mmcbootdev=0\0" \
        "mmcrootdev=0\0" \
        "mmcbootpart=1\0" \
index 2002444..1786e09 100644 (file)
 
 #define CONFIG_SYS_SPI_BASE            DAVINCI_SPI1_BASE
 #define CONFIG_SYS_SPI_CLK             clk_get(DAVINCI_SPI1_CLKID)
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
 
 #ifdef CONFIG_USE_SPIFLASH
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x8000
index 776835a..925e7ae 100644 (file)
 #define CONFIG_MXC_UART_BASE           UART1_BASE
 
 /* SF Configs */
-#define CONFIG_SF_DEFAULT_BUS  2
-#define CONFIG_SF_DEFAULT_CS   0
-#define CONFIG_SF_DEFAULT_SPEED 25000000
-#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
 
 /* IO expander */
 #define CONFIG_PCA953X
 #define CONFIG_ENV_OFFSET               (1024 * 1024)
 /* M25P16 has an erase size of 64 KiB */
 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
-#define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 
 #define CONFIG_BOOTP_SERVERIP
 #define CONFIG_BOOTP_BOOTFILE
index 8fda0c1..8fa91fb 100644 (file)
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
-#if defined(CONFIG_SPI_FLASH)
-#define CONFIG_SF_DEFAULT_SPEED        10000000
-#define CONFIG_SF_DEFAULT_MODE 0
-#endif
-
 #if defined(CONFIG_PCI)
 /*
  * General PCI
  * Environment
  */
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MAX_HZ  10000000
-#define CONFIG_ENV_SPI_MODE    0
 #define CONFIG_ENV_SIZE                0x2000  /* 8KB */
 #define CONFIG_ENV_OFFSET      0x100000        /* 1MB */
 #define CONFIG_ENV_SECT_SIZE   0x10000
index 5986699..177e8d8 100644 (file)
@@ -23,8 +23,6 @@
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index c97b226..7205a17 100644 (file)
@@ -23,8 +23,6 @@
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index 4920896..02db6bb 100644 (file)
@@ -24,8 +24,6 @@
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED                24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index 5381ed1..8cde12e 100644 (file)
@@ -99,8 +99,6 @@
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START \
                                        + (8 * 1024 * 1024))
 
-#define CONFIG_SF_DEFAULT_SPEED                24000000
-
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550_COM1                0x44e09000      /* Base EVM has UART0 */
 #define CONFIG_SYS_NS16550_COM2                0x48022000      /* UART1 */
index b9bc08b..b0415b2 100644 (file)
 #define CONFIG_FEC_MXC_PHYADDR         3
 
 /* SPI Flash */
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_ENV_SIZE                (16 * 1024)
 #define CONFIG_ENV_OFFSET              (1024 * SZ_1K)
 #define CONFIG_ENV_SECT_SIZE           (64 * SZ_1K)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
                                                CONFIG_ENV_SECT_SIZE)
index e2aae19..3a9b85a 100644 (file)
 #define CONFIG_FEC_MXC_PHYADDR         3
 
 /* SPI Flash */
-#define CONFIG_SF_DEFAULT_BUS          2
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_ENV_SIZE                (16 * 1024)
 #define CONFIG_ENV_OFFSET              (1024 * SZ_1K)
 #define CONFIG_ENV_SECT_SIZE           (64 * SZ_1K)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
                                                CONFIG_ENV_SECT_SIZE)
index e88948c..c1ce122 100644 (file)
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0; " \
                                "sf read 0x22000000 0x84000 0x210000; " \
                                "bootm 0x22000000"
index f11879b..b09d851 100644 (file)
 #define CONFIG_ENV_OFFSET      0x4200
 #define CONFIG_ENV_SIZE                0x4200
 #define CONFIG_ENV_SECT_SIZE   0x210
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "sf probe 0; " \
                                "sf read 0x22000000 0x84000 0x294000; " \
                                "bootm 0x22000000"
index 45a4ccc..4d6085d 100644 (file)
 #define CONFIG_SYS_MMC_ENV_DEV 1
 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 #define CONFIG_ENV_SECT_SIZE           (8 * 1024)
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ  CONFIG_SF_DEFAULT_SPEED
 #endif
 
 #define SDRAM_BANK_SIZE                        (2UL << 30)
index 4fc9226..50c6b56 100644 (file)
@@ -29,7 +29,6 @@
 #define SDRAM_MAX_SIZE                  (CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE)
 
 #define CONFIG_SPI_FLASH_GIGADEVICE
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 
 #ifndef CONFIG_SPL_BUILD
 /* usb otg */
index 9451715..0c08d7a 100644 (file)
@@ -30,7 +30,6 @@
 #define CONFIG_SYS_SDRAM_BASE          0x60000000
 #define SDRAM_MAX_SIZE                 0x80000000
 
-#define CONFIG_SF_DEFAULT_SPEED 20000000
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     1
 
index 36e494e..208ca5a 100644 (file)
@@ -37,8 +37,6 @@
 #define SDRAM_BANK_SIZE                        (2UL << 30)
 #define SDRAM_MAX_SIZE                 0x80000000
 
-#define CONFIG_SF_DEFAULT_SPEED 20000000
-
 #ifndef CONFIG_SPL_BUILD
 /* usb otg */
 
index c59f5ef..72a54bc 100644 (file)
@@ -40,8 +40,6 @@
 #define SDRAM_BANK_SIZE                        (2UL << 30)
 #define SDRAM_MAX_SIZE                 0xfe000000
 
-#define CONFIG_SF_DEFAULT_SPEED 20000000
-
 #ifndef CONFIG_SPL_BUILD
 /* usb otg */
 
index 02233d6..71aad70 100644 (file)
@@ -26,8 +26,6 @@
 #define CONFIG_SYS_SDRAM_BASE          0
 #define SDRAM_MAX_SIZE                 0xff000000
 
-#define CONFIG_SF_DEFAULT_SPEED 20000000
-
 #ifndef CONFIG_SPL_BUILD
 
 #define ENV_MEM_LAYOUT_SETTINGS \
index b977b1f..b412012 100644 (file)
@@ -38,8 +38,6 @@
 #define CONFIG_SYS_SDRAM_BASE          0
 #define SDRAM_MAX_SIZE                 0xf8000000
 
-#define CONFIG_SF_DEFAULT_SPEED 20000000
-
 #ifndef CONFIG_SPL_BUILD
 
 #define ENV_MEM_LAYOUT_SETTINGS \
index 7c7479b..ae51aea 100644 (file)
@@ -31,7 +31,6 @@
 #undef CONFIG_CMD_NAND
 
 /* SPI flash */
-#define CONFIG_SF_DEFAULT_SPEED                66000000
 
 #undef CONFIG_BOOTCOMMAND
 #ifdef CONFIG_SD_BOOT
index 2cec1c7..a3df404 100644 (file)
 #define CONFIG_SYS_LOAD_ADDR           0x22000000 /* load address */
 
 /* SerialFlash */
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#endif
 
 #ifdef CONFIG_SD_BOOT
 
index ca1c2b0..3870671 100644 (file)
 
 /* SerialFlash */
 
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#endif
-
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
index bbb1699..d8b61a6 100644 (file)
 
 #define CONFIG_SYS_LOAD_ADDR           0x22000000 /* load address */
 
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#endif
-
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
index d580416..8bfda3f 100644 (file)
 
 #define CONFIG_SYS_LOAD_ADDR           0x22000000 /* load address */
 
-#ifdef CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#endif
-
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
index d8ed02b..f44a428 100644 (file)
@@ -61,8 +61,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR           0x81000000 /* Default load address */
 
-#define CONFIG_SF_DEFAULT_SPEED                (75000000)
-
  /* Physical Memory Map */
 #define PHYS_DRAM_1                    0x80000000      /* DRAM Bank #1 */
 
  * 0x442000 - 0x800000 : Userland
  */
 #if defined(CONFIG_SPI_BOOT)
-# define CONFIG_ENV_SPI_MAX_HZ         CONFIG_SF_DEFAULT_SPEED
 # define CONFIG_ENV_OFFSET             (892 << 10) /* 892 KiB in */
 # define CONFIG_ENV_SECT_SIZE          (4 << 10) /* 4 KB sectors */
 #endif /* SPI support */
index 181af9b..09c9b7c 100644 (file)
@@ -69,7 +69,6 @@
  * EPCS/EPCQx1 Serial Flash Controller
  */
 #ifdef CONFIG_ALTERA_SPI
-#define CONFIG_SF_DEFAULT_SPEED                30000000
 /*
  * The base address is configurable in QSys, each board must specify the
  * base address based on it's particular FPGA configuration. Please note
@@ -248,8 +247,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  * 0xFFEz_zzzz ...... Malloc area (grows up to top)
  * 0xFFE3_FFFF ...... End of SRAM (top)
  */
+#ifndef CONFIG_SPL_TEXT_BASE
 #define CONFIG_SPL_TEXT_BASE           CONFIG_SYS_INIT_RAM_ADDR
 #define CONFIG_SPL_MAX_SIZE            CONFIG_SYS_INIT_RAM_SIZE
+#endif
 
 #if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
 /* SPL memory allocation configuration, this is for FAT implementation */
index 984f118..b6a9861 100644 (file)
 #define CONFIG_ENV_SIZE                (16 * 1024)
 #define CONFIG_ENV_OFFSET      0x000e0000
 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SPI_BUS     0
-#define CONFIG_ENV_SPI_CS      0
-#define CONFIG_ENV_SPI_MODE    SPI_MODE_3
-#define CONFIG_ENV_SPI_MAX_HZ  100000000       /* Use max of 100MHz */
-#define CONFIG_SF_DEFAULT_SPEED        100000000
 
 /*
  * The QSPI NOR flash layout on SR1500:
index 0e73239..31c267f 100644 (file)
 /*#define CONFIG_QSPI_RBF_ADDR         0x720000*/
 
 /* Flash device info */
-#define CONFIG_SF_DEFAULT_SPEED                (50000000)
-#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_3 | SPI_RX_QUAD)
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
 
 /*#define CONFIG_ENV_IS_IN_SPI_FLASH*/
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
index 33ddc67..17f92d8 100644 (file)
 
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
-#define CONFIG_SF_DEFAULT_SPEED                50000000
 #define CONFIG_SERIAL_FLASH
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              1
 
 #define CONFIG_SYS_SBFHDR_SIZE         0x7
 
 
 #if defined(CONFIG_CF_SBF)
 #define CONFIG_ENV_IS_IN_SPI_FLASH     1
-#define CONFIG_ENV_SPI_CS              1
 #define CONFIG_ENV_OFFSET              0x40000
 #define CONFIG_ENV_SIZE                        0x2000
 #define CONFIG_ENV_SECT_SIZE           0x10000
index f283ab7..1d24577 100644 (file)
 #if defined(CONFIG_SPL_BUILD)
 /* SPL related */
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
-
-#define CONFIG_SF_DEFAULT_BUS 0
-#define CONFIG_SF_DEFAULT_SPEED 1000000
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
 #endif
 
 /* load address */
index 85914ec..b637832 100644 (file)
@@ -23,8 +23,6 @@
 
 /* SPI */
 #define CONFIG_TEGRA_SLINK_CTRLS       6
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED        24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 /* Tag support */
index 886456e..59b2546 100644 (file)
@@ -40,8 +40,6 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                27777777 /* for fast SPL booting */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 /* Environment in SPI NOR flash */
 #define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
index 1e2a62d..828fb1b 100644 (file)
@@ -52,7 +52,7 @@
 
 #define DEFAULT_FIT_TI_ARGS \
        "boot_fit=0\0" \
-       "fit_loadaddr=0x87000000\0" \
+       "fit_loadaddr=0x90000000\0" \
        "fit_bootfile=fitImage\0" \
        "update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile ${fit_bootfile}\0" \
        "loadfit=run args_mmc; bootm ${loadaddr}#${fdtfile};\0" \
index 0c7d664..fb8c082 100644 (file)
@@ -71,8 +71,6 @@
 
 /* SPI Configuration */
 #define CONFIG_SYS_SPI_CLK             ks_clk_get_rate(KS2_CLK1_6)
-#define CONFIG_SF_DEFAULT_SPEED                30000000
-#define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
 #define CONFIG_SYS_SPI0
 #define CONFIG_SYS_SPI_BASE            KS2_SPI0_BASE
 #define CONFIG_SYS_SPI0_NUM_CS         4
index f14c4ee..69aa79b 100644 (file)
 #define CONFIG_SYS_MEMTEST_END 0x18000000
 
 /* Faster flash, ours may run at 108 MHz */
-#undef CONFIG_SF_DEFAULT_SPEED
-#define CONFIG_SF_DEFAULT_SPEED        108000000
-#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
-#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
 #undef CONFIG_SPI_FLASH_WINBOND
 
 /* Setup proper boot sequences for Miami boards */
index 65cc12f..13e3d60 100644 (file)
 
 #define TQMA6_SPI_FLASH_SECTOR_SIZE    SZ_64K
 
-#define CONFIG_SF_DEFAULT_BUS  0
-#define CONFIG_SF_DEFAULT_CS   0
-#define CONFIG_SF_DEFAULT_SPEED        50000000
-#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
-
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
                                         CONFIG_ENV_SECT_SIZE)
 
-#define CONFIG_ENV_SPI_BUS             (CONFIG_SF_DEFAULT_BUS)
-#define CONFIG_ENV_SPI_CS              (CONFIG_SF_DEFAULT_CS)
-#define CONFIG_ENV_SPI_MAX_HZ          (CONFIG_SF_DEFAULT_SPEED)
-#define CONFIG_ENV_SPI_MODE            (CONFIG_SF_DEFAULT_MODE)
-
 #define TQMA6_FDT_OFFSET               (CONFIG_ENV_OFFSET_REDUND + \
                                         CONFIG_ENV_SECT_SIZE)
 #define TQMA6_FDT_SECT_SIZE            (TQMA6_SPI_FLASH_SECTOR_SIZE)
index 4b1eb7b..93db175 100644 (file)
 #define CONFIG_MACH_TYPE               MACH_TYPE_TRIMSLICE
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 
 /* Environment in SPI */
-#define CONFIG_ENV_SPI_MAX_HZ          48000000
-#define CONFIG_ENV_SPI_MODE            SPI_MODE_0
 #define CONFIG_ENV_SECT_SIZE           CONFIG_ENV_SIZE
 /* 1MiB flash, environment located as high as possible */
 #define CONFIG_ENV_OFFSET              (SZ_1M - CONFIG_ENV_SIZE)
index 82cdcce..5d5394e 100644 (file)
 /*
  * SPI Flash configuration
  */
-#define CONFIG_ENV_SPI_BUS             0
-#define CONFIG_ENV_SPI_CS              0
-
-/* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                20000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 
 /* Environment in SPI NOR flash */
 #define CONFIG_ENV_OFFSET              0x180000 /* as Marvell U-Boot version */
index b90be65..038f639 100644 (file)
@@ -35,8 +35,6 @@
 #endif
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_SPEED                1000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 #define CONFIG_SPI_FLASH_SPANSION
 
 /*
index aa8738f..fa38274 100644 (file)
@@ -82,7 +82,6 @@
 #define CONFIG_ENV_OFFSET      0x2000
 #define CONFIG_ENV_SIZE                0x2000
 #define CONFIG_ENV_SECT_SIZE   CONFIG_ENV_SIZE
-#define CONFIG_ENV_SPI_MAX_HZ  15000000
 #define CONFIG_BOOTCOMMAND     "nboot 21000000 0"
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
index 8c30c6f..2840c7b 100644 (file)
@@ -34,8 +34,6 @@
 #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
 #define CONFIG_ENV_OFFSET_REDUND      (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
 
-#define CONFIG_ENV_SPI_MAX_HZ          0 /* This force to read from DT */
-#define CONFIG_ENV_SPI_MODE            0 /* This force to read from DT */
 #endif
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
index a86ae21..8ad872d 100644 (file)
@@ -24,8 +24,6 @@
 #define CONFIG_ENV_OFFSET              (-CONFIG_ENV_SIZE)
 
 /* SPI */
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
-#define CONFIG_SF_DEFAULT_SPEED        24000000
 #define CONFIG_SPI_FLASH_SIZE          (4 << 20)
 
 #include "tegra-common-usb-gadget.h"
index 9d6001f..ec22a30 100644 (file)
 #ifdef CONFIG_CMD_SF
 #define CONFIG_ATMEL_SPI0
 #define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_SF_DEFAULT_BUS          0
-#define CONFIG_SF_DEFAULT_CS           0
-#define CONFIG_SF_DEFAULT_SPEED                50000000
-#define CONFIG_ENV_SPI_MAX_HZ          50000000
-#define CONFIG_SF_DEFAULT_MODE         (SPI_MODE_0)
-#define CONFIG_ENV_SPI_MODE            (SPI_MODE_0)
 #endif
 
 /* MMC */
@@ -69,8 +63,6 @@
 
 #ifdef CONFIG_SPI_BOOT
 /* bootstrap + u-boot + env + linux in serial flash */
-#define CONFIG_ENV_SPI_BUS     CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS      CONFIG_SF_DEFAULT_CS
 /* Use our own mapping for the VInCo platform */
 #undef CONFIG_ENV_OFFSET
 #undef CONFIG_ENV_SIZE
index a83d49b..80c898e 100644 (file)
@@ -47,9 +47,6 @@
 #define BBT_CUSTOM_SCAN_POSITION 2048
 
 /* SPI NOR flash default params, used by sf commands */
-#define CONFIG_SF_DEFAULT_BUS          1
-#define CONFIG_SF_DEFAULT_SPEED                50000000
-#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 
 #define MTDIDS_DEFAULT                 "nand0=nand"
 #define MTDPARTS_DEFAULT               "mtdparts=nand:240M(user),8M(errlog),8M(nand-bbt)"
@@ -63,8 +60,6 @@
 #define CONFIG_EHCI_IS_TDI
 
 /* Environment in SPI NOR flash */
-#define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
 #define CONFIG_ENV_OFFSET              (1 << 20) /* 1MiB in */
 #define CONFIG_ENV_SIZE                        (64 << 10) /* 64KiB */
 #define CONFIG_ENV_SECT_SIZE           (256 << 10) /* 256KiB sectors */
index a285fcd..94177c6 100644 (file)
@@ -42,9 +42,6 @@
 #endif
 
 /* QSPI */
-#ifdef CONFIG_ZYNQ_QSPI
-# define CONFIG_SF_DEFAULT_SPEED       30000000
-#endif
 
 /* NOR */
 #ifdef CONFIG_MTD_NOR_FLASH
index ccf6086..8647bfa 100644 (file)
@@ -1322,7 +1322,9 @@ struct efi_pxe {
 #define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID \
        EFI_GUID(0x964e5b22, 0x6459, 0x11d2, \
                 0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b)
-#define EFI_FILE_PROTOCOL_REVISION 0x00010000
+#define EFI_FILE_PROTOCOL_REVISION     0x00010000
+#define EFI_FILE_PROTOCOL_REVISION2    0x00020000
+#define EFI_FILE_PROTOCOL_LATEST_REVISION EFI_FILE_PROTOCOL_REVISION2
 
 struct efi_file_handle {
        u64 rev;
@@ -1346,6 +1348,10 @@ struct efi_file_handle {
                        const efi_guid_t *info_type, efi_uintn_t buffer_size,
                        void *buffer);
        efi_status_t (EFIAPI *flush)(struct efi_file_handle *file);
+       /*
+        * TODO: We currently only support EFI file protocol revision 0x00010000
+        *       while UEFI specs 2.4 - 2.7 prescribe revision 0x00020000.
+        */
 };
 
 #define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION 0x00010000
index bb55639..2421011 100644 (file)
@@ -32,6 +32,7 @@
 #define EXT4_EXTENTS_FL                0x00080000 /* Inode uses extents */
 #define EXT4_EXT_MAGIC                 0xf30a
 #define EXT4_FEATURE_RO_COMPAT_GDT_CSUM        0x0010
+#define EXT4_FEATURE_RO_COMPAT_METADATA_CSUM 0x0400
 #define EXT4_FEATURE_INCOMPAT_EXTENTS  0x0040
 #define EXT4_FEATURE_INCOMPAT_64BIT    0x0080
 #define EXT4_INDIRECT_BLOCKS           12
index 936cfe9..5fb212c 100644 (file)
@@ -499,9 +499,20 @@ static inline void pci_set_region(struct pci_region *reg,
 typedef int pci_dev_t;
 
 #define PCI_BUS(d)             (((d) >> 16) & 0xff)
+
+/*
+ * Please note the difference in DEVFN usage in U-Boot vs Linux. U-Boot
+ * uses DEVFN in bits 15-8 but Linux instead expects DEVFN in bits 7-0.
+ * Please see the Linux header include/uapi/linux/pci.h for more details.
+ * This is relevant for the following macros:
+ * PCI_DEV, PCI_FUNC, PCI_DEVFN
+ * The U-Boot macro PCI_DEV is equivalent to the Linux PCI_SLOT version with
+ * the remark from above (input d in bits 15-8 instead of 7-0.
+ */
 #define PCI_DEV(d)             (((d) >> 11) & 0x1f)
 #define PCI_FUNC(d)            (((d) >> 8) & 0x7)
 #define PCI_DEVFN(d, f)                ((d) << 11 | (f) << 8)
+
 #define PCI_MASK_BUS(bdf)      ((bdf) & 0xffff)
 #define PCI_ADD_BUS(bus, devfn)        (((bus) << 16) | (devfn))
 #define PCI_BDF(b, d, f)       ((b) << 16 | PCI_DEVFN(d, f))
index 314160a..6c6e2cd 100644 (file)
@@ -150,6 +150,7 @@ enum regulator_flag {
  * @always_on* - bool type, true or false
  * @boot_on*   - bool type, true or false
  * TODO(sjg@chromium.org): Consider putting the above two into @flags
+ * @ramp_delay - Time to settle down after voltage change (unit: uV/us)
  * @flags:     - flags value (see REGULATOR_FLAG_...)
  * @name**     - fdt regulator name - should be taken from the device tree
  * ctrl_reg:   - Control register offset used to enable/disable regulator
@@ -169,6 +170,7 @@ struct dm_regulator_uclass_platdata {
        int max_uV;
        int min_uA;
        int max_uA;
+       unsigned int ramp_delay;
        bool always_on;
        bool boot_on;
        const char *name;
index 017560c..4ff28a1 100644 (file)
@@ -33,6 +33,7 @@ char *get_dfu_alt_system(char *interface, char *devstr);
 char *get_dfu_alt_boot(char *interface, char *devstr);
 #endif
 void set_board_type(void);
+void set_board_revision(void);
 const char *get_board_type(void);
 
 #endif /* __SAMSUNG_MISC_COMMON_H__ */
index 7f691e8..55b4721 100644 (file)
 #include <linux/types.h>
 #include <linux/mtd/spi-nor.h>
 
-#ifndef CONFIG_SF_DEFAULT_SPEED
-# define CONFIG_SF_DEFAULT_SPEED       1000000
+/* by default ENV use the same parameters than SF command */
+#ifndef CONFIG_ENV_SPI_BUS
+# define CONFIG_ENV_SPI_BUS    CONFIG_SF_DEFAULT_BUS
 #endif
-#ifndef CONFIG_SF_DEFAULT_MODE
-# define CONFIG_SF_DEFAULT_MODE                SPI_MODE_3
+#ifndef CONFIG_ENV_SPI_CS
+# define CONFIG_ENV_SPI_CS     CONFIG_SF_DEFAULT_CS
 #endif
-#ifndef CONFIG_SF_DEFAULT_CS
-# define CONFIG_SF_DEFAULT_CS          0
+#ifndef CONFIG_ENV_SPI_MAX_HZ
+# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
 #endif
-#ifndef CONFIG_SF_DEFAULT_BUS
-# define CONFIG_SF_DEFAULT_BUS         0
+#ifndef CONFIG_ENV_SPI_MODE
+# define CONFIG_ENV_SPI_MODE   CONFIG_SF_DEFAULT_MODE
 #endif
 
 struct spi_slave;
index bd8b8a1..4fc550d 100644 (file)
@@ -1581,10 +1581,8 @@ efi_status_t efi_setup_loaded_image(struct efi_device_path *device_path,
                goto failure;
 #endif
 
-       if (info_ptr)
-               *info_ptr = info;
-       if (handle_ptr)
-               *handle_ptr = obj;
+       *info_ptr = info;
+       *handle_ptr = obj;
 
        return ret;
 failure:
index 3a73237..0483403 100644 (file)
@@ -226,7 +226,7 @@ static efi_status_t EFIAPI efi_file_open(struct efi_file_handle *file,
        efi_status_t ret;
 
        EFI_ENTRY("%p, %p, \"%ls\", %llx, %llu", file, new_handle,
-                 (wchar_t *)file_name, open_mode, attributes);
+                 file_name, open_mode, attributes);
 
        /* Check parameters */
        if (!file || !new_handle || !file_name) {
@@ -628,6 +628,10 @@ static efi_status_t EFIAPI efi_file_flush(struct efi_file_handle *file)
 }
 
 static const struct efi_file_handle efi_file_handle_protocol = {
+       /*
+        * TODO: We currently only support EFI file protocol revision 0x00010000
+        *       while UEFI specs 2.4 - 2.7 prescribe revision 0x00020000.
+        */
        .rev = EFI_FILE_PROTOCOL_REVISION,
        .open = efi_file_open,
        .close = efi_file_close,
index 3a966fa..61b71de 100644 (file)
@@ -227,9 +227,8 @@ out:
 error:
        if (stbl) {
                free(stbl->language);
-               if (idx > 0)
-                       while (--idx >= 0)
-                               free(stbl->strings[idx].string);
+               while (idx > 0)
+                       free(stbl->strings[--idx].string);
                free(stbl->strings);
        }
        free(stbl);
index ebd2b36..55622d2 100644 (file)
@@ -440,6 +440,7 @@ efi_status_t efi_free_pages(uint64_t memory, efi_uintn_t pages)
 efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer)
 {
        efi_status_t r;
+       u64 addr;
        struct efi_pool_allocation *alloc;
        u64 num_pages = efi_size_in_pages(size +
                                          sizeof(struct efi_pool_allocation));
@@ -453,9 +454,9 @@ efi_status_t efi_allocate_pool(int pool_type, efi_uintn_t size, void **buffer)
        }
 
        r = efi_allocate_pages(EFI_ALLOCATE_ANY_PAGES, pool_type, num_pages,
-                              (uint64_t *)&alloc);
-
+                              &addr);
        if (r == EFI_SUCCESS) {
+               alloc = (struct efi_pool_allocation *)(uintptr_t)addr;
                alloc->num_pages = num_pages;
                *buffer = alloc->data;
        }
index e0d7f57..699f418 100644 (file)
@@ -335,7 +335,7 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size,
        EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, vendor);
 
        if (!variable_name_size || !variable_name || !vendor)
-               EFI_EXIT(EFI_INVALID_PARAMETER);
+               return EFI_EXIT(EFI_INVALID_PARAMETER);
 
        if (variable_name[0]) {
                /* check null-terminated string */
diff --git a/lib/efi_selftest/efi_freestanding.c b/lib/efi_selftest/efi_freestanding.c
new file mode 100644 (file)
index 0000000..4b6c27e
--- /dev/null
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Library for freestanding binary
+ *
+ * Copyright 2019, Heinrich Schuchardt <xypron.glpk@gmx.de>
+ *
+ * GCC requires that freestanding programs provide memcpy(), memmove(),
+ * memset(), and memcmp().
+ */
+
+#include "../efi_loader/efi_freestanding.c"
index 5fef5cf..c846e05 100644 (file)
@@ -256,11 +256,6 @@ static int execute(void)
                efi_st_error("GetNextDevicePathInstance did not signal end\n");
                return EFI_ST_FAILURE;
        }
-       ret = boottime->free_pool(dp2);
-       if (ret != EFI_ST_SUCCESS) {
-               efi_st_error("FreePool failed\n");
-               return EFI_ST_FAILURE;
-       }
 
        /* Clean up */
        ret = boottime->free_pool(dp2);
index 8a0b3bc..f4b70f7 100644 (file)
@@ -783,19 +783,10 @@ static int test_hii_string_get_string(void)
                goto out;
        }
 
-#if 1
-       u16 *c1, *c2;
-
-       for (c1 = string, c2 = L"Japanese"; *c1 == *c2; c1++, c2++)
-               ;
-       if (!*c1 && !*c2)
-               result = EFI_ST_SUCCESS;
-       else
-               result = EFI_ST_FAILURE;
-#else
-       /* TODO: %ls */
-       efi_st_printf("got string is %s (can be wrong)\n", string);
-#endif
+       if (efi_st_strcmp_16_8(string, "Japanese")) {
+               efi_st_error("get_string returned incorrect string\n");
+               goto out;
+       }
 
        result = EFI_ST_SUCCESS;
 
index 9734f6d..287fcc4 100644 (file)
@@ -295,7 +295,7 @@ static int rsa_verify_key(struct image_sign_info *info,
 #endif
        struct checksum_algo *checksum = info->checksum;
        struct padding_algo *padding = info->padding;
-       int hash_len = checksum->checksum_len;
+       int hash_len;
 
        if (!prop || !sig || !hash || !checksum)
                return -EIO;
@@ -315,6 +315,7 @@ static int rsa_verify_key(struct image_sign_info *info,
        }
 
        uint8_t buf[sig_len];
+       hash_len = checksum->checksum_len;
 
 #if !defined(USE_HOSTCC)
        ret = uclass_get_device(UCLASS_MOD_EXP, 0, &mod_exp_dev);
index 3bf678a..9c55da6 100644 (file)
@@ -56,7 +56,7 @@ ulong timer_get_boot_us(void)
 extern unsigned long __weak timer_read_counter(void);
 #endif
 
-#ifdef CONFIG_TIMER
+#if CONFIG_IS_ENABLED(TIMER)
 ulong notrace get_tbclk(void)
 {
        if (!gd->timer) {
index 7ed520f..1105c76 100644 (file)
@@ -74,5 +74,7 @@ DTC_FLAGS += -Wno-unit_address_format
 DTC_FLAGS += -Wno-pci_bridge
 DTC_FLAGS += -Wno-pci_device_bus_num
 DTC_FLAGS += -Wno-pci_device_reg
+DTC_FLAGS += -Wno-avoid_unnecessary_addr_size
+DTC_FLAGS += -Wno-alias_paths
 
 endif
index ec5c41e..70de9bb 100644 (file)
@@ -390,7 +390,7 @@ $(obj)/efi_reloc.o: $(srctree)/arch/$(ARCH)/lib/$(EFI_RELOC:.o=.c) $(recordmcoun
        $(call cmd,force_checksrc)
        $(call if_changed_rule,cc_o_c)
 
-$(obj)/%_efi.so: $(obj)/%.o $(obj)/efi_crt0.o $(obj)/efi_reloc.o $(obj)/../efi_loader/efi_freestanding.o
+$(obj)/%_efi.so: $(obj)/%.o $(obj)/efi_crt0.o $(obj)/efi_reloc.o $(obj)/efi_freestanding.o
        $(call cmd,efi_ld)
 
 # ACPI
index 9d59216..54b160d 100644 (file)
@@ -212,7 +212,7 @@ ifdef CONFIG_SAMSUNG
 ALL-y  += $(obj)/$(BOARD)-spl.bin
 endif
 
-ifdef CONFIG_ARCH_SOCFPGA
+ifneq ($(CONFIG_TARGET_SOCFPGA_GEN5)$(CONFIG_TARGET_SOCFPGA_ARRIA10),)
 ALL-y  += $(obj)/$(SPL_BIN).sfp
 endif
 
index db00376..8c7c159 100644 (file)
@@ -340,8 +340,6 @@ CONFIG_DEEP_SLEEP
 CONFIG_DEFAULT
 CONFIG_DEFAULT_CONSOLE
 CONFIG_DEFAULT_IMMR
-CONFIG_DEFAULT_SPI_BUS
-CONFIG_DEFAULT_SPI_MODE
 CONFIG_DEF_HWCONFIG
 CONFIG_DELAY_ENVIRONMENT
 CONFIG_DESIGNWARE_ETH
@@ -498,7 +496,6 @@ CONFIG_ENV_SETTINGS_V1
 CONFIG_ENV_SETTINGS_V2
 CONFIG_ENV_SIZE_FLEX
 CONFIG_ENV_SIZE_REDUND
-CONFIG_ENV_SPI_BASE
 CONFIG_ENV_SPI_BUS
 CONFIG_ENV_SPI_CS
 CONFIG_ENV_SPI_MAX_HZ
@@ -1701,10 +1698,6 @@ CONFIG_SET_DFU_ALT_BUF_LEN
 CONFIG_SET_DFU_ALT_INFO
 CONFIG_SFIO
 CONFIG_SF_DATAFLASH
-CONFIG_SF_DEFAULT_BUS
-CONFIG_SF_DEFAULT_CS
-CONFIG_SF_DEFAULT_MODE
-CONFIG_SF_DEFAULT_SPEED
 CONFIG_SGI_IP28
 CONFIG_SH4_PCI
 CONFIG_SH73A0
index 4b62635..3b867e0 100644 (file)
@@ -298,6 +298,7 @@ static void fit_write_configs(struct image_tool_params *params, char *fdt)
                typename = genimg_get_type_short_name(params->fit_image_type);
                snprintf(str, sizeof(str), "%s-1", typename);
                fdt_property_string(fdt, typename, str);
+               fdt_property_string(fdt, FIT_LOADABLE_PROP, str);
 
                if (params->fit_ramdisk)
                        fdt_property_string(fdt, FIT_RAMDISK_PROP,