Merge tag 'tpm-030822' of https://source.denx.de/u-boot/custodians/u-boot-tpm

EFI_RNG_PROTOCOL with a TPM

diff --git a/README b/README
index 623f359..6b6f722 100644 (file)
--- a/README
+++ b/README
@@ -396,12 +396,6 @@ The following options need to be configured:
                Board config to use DDR3L. It can be enabled for SoCs with
                DDR3L controllers.
 
-               CONFIG_SYS_FSL_IFC_BE
-               Defines the IFC controller register space as Big Endian
-
-               CONFIG_SYS_FSL_IFC_LE
-               Defines the IFC controller register space as Little Endian
-
                CONFIG_SYS_FSL_IFC_CLK_DIV
                Defines divider of platform clock(clock input to IFC controller).
 
@@ -419,11 +413,6 @@ The following options need to be configured:
                same as CONFIG_SYS_DDR_SDRAM_BASE for  all Power SoCs. But
                it could be different for ARM SoCs.
 
-               CONFIG_SYS_FSL_DDR_INTLV_256B
-               DDR controller interleaving on 256-byte. This is a special
-               interleaving mode, handled by Dickens for Freescale layerscape
-               SoCs with ARM core.
-
                CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
                Number of controllers used as main memory.
 
@@ -1728,38 +1717,10 @@ Configuration Settings:
                Enables allocating and saving a kernel copy of the bd_info in
                space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
 
-- CONFIG_SYS_MAX_FLASH_SECT:
-               Max number of sectors on a Flash chip
-
-- CONFIG_SYS_FLASH_ERASE_TOUT:
-               Timeout for Flash erase operations (in ms)
-
-- CONFIG_SYS_FLASH_WRITE_TOUT:
-               Timeout for Flash write operations (in ms)
-
-- CONFIG_SYS_FLASH_LOCK_TOUT
-               Timeout for Flash set sector lock bit operation (in ms)
-
-- CONFIG_SYS_FLASH_UNLOCK_TOUT
-               Timeout for Flash clear lock bits operation (in ms)
-
 - CONFIG_SYS_FLASH_PROTECTION
                If defined, hardware flash sectors protection is used
                instead of U-Boot software protection.
 
-- CONFIG_SYS_DIRECT_FLASH_TFTP:
-
-               Enable TFTP transfers directly to flash memory;
-               without this option such a download has to be
-               performed in two steps: (1) download to RAM, and (2)
-               copy from RAM to flash.
-
-               The two-step approach is usually more reliable, since
-               you can check if the download worked before you erase
-               the flash, but in some situations (when system RAM is
-               too limited to allow for a temporary copy of the
-               downloaded image) this option may be very useful.
-
 - CONFIG_SYS_FLASH_CFI:
                Define if the flash driver uses extra elements in the
                common flash structure for storing flash geometry.
@@ -1780,12 +1741,6 @@ Configuration Settings:
                s29ws-n MirrorBit flash has non-standard addresses for buffered
                write commands.
 
-- CONFIG_SYS_FLASH_QUIET_TEST
-               If this option is defined, the common CFI flash doesn't
-               print it's warning upon not recognized FLASH banks. This
-               is useful, if some of the configured banks are only
-               optionally available.
-
 - CONFIG_FLASH_SHOW_PROGRESS
                If defined (must be an integer), print out countdown
                digits and dots.  Recommended value: 45 (9..1) for 80

diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp
index d3ebbff..a96245c 100644 (file)
--- a/arch/Kconfig.nxp
+++ b/arch/Kconfig.nxp
@@ -227,6 +227,12 @@ config VOL_MONITOR_ISL68233_SET
 
 endif
 
+config SYS_FSL_ESDHC_BE
+       bool
+
+config SYS_FSL_IFC_BE
+       bool
+
 config FSL_QIXIS
        bool "Enable QIXIS support"
        depends on PPC || ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3

diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index a901360..e75a895 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -3,6 +3,7 @@ config ARCH_LS1021A
        select FSL_IFC if !QSPI_BOOT && !SD_BOOT_QSPI
        select SYS_FSL_DDR_BE if SYS_FSL_DDR
        select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR
+       select SYS_FSL_IFC_BE
        select SYS_FSL_ERRATUM_A008378
        select SYS_FSL_ERRATUM_A008407
        select SYS_FSL_ERRATUM_A008850 if SYS_FSL_DDR
@@ -12,6 +13,7 @@ config ARCH_LS1021A
        select SYS_FSL_ERRATUM_A009798 if USB
        select SYS_FSL_ERRATUM_A009942
        select SYS_FSL_ERRATUM_A010315
+       select SYS_FSL_ESDHC_BE
        select SYS_FSL_HAS_CCI400
        select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR
        select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 602b624..1f86070 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -323,6 +323,11 @@ config ARCH_LX2160A
 config FSL_LSCH2
        bool
        select SKIP_LOWLEVEL_INIT
+       select SYS_FSL_CCSR_GUR_BE
+       select SYS_FSL_CCSR_SCFG_BE
+       select SYS_FSL_ESDHC_BE
+       select SYS_FSL_IFC_BE
+       select SYS_FSL_PEX_LUT_BE
        select SYS_FSL_HAS_CCI400
        select SYS_FSL_HAS_SEC
        select SYS_FSL_SEC_COMPAT_5
@@ -330,11 +335,40 @@ config FSL_LSCH2
 
 config FSL_LSCH3
        select ARCH_MISC_INIT
+       select SYS_FSL_CCSR_GUR_LE
+       select SYS_FSL_CCSR_SCFG_LE
+       select SYS_FSL_ESDHC_LE
+       select SYS_FSL_IFC_LE
+       select SYS_FSL_PEX_LUT_LE
        bool
 
 config NXP_LSCH3_2
        bool
 
+config SYS_FSL_CCSR_GUR_BE
+       bool
+
+config SYS_FSL_CCSR_SCFG_BE
+       bool
+
+config SYS_FSL_PEX_LUT_BE
+       bool
+
+config SYS_FSL_CCSR_GUR_LE
+       bool
+
+config SYS_FSL_CCSR_SCFG_LE
+       bool
+
+config SYS_FSL_ESDHC_LE
+       bool
+
+config SYS_FSL_IFC_LE
+       bool
+
+config SYS_FSL_PEX_LUT_LE
+       bool
+
 menu "Layerscape architecture"
        depends on FSL_LSCH2 || FSL_LSCH3
 

diff --git a/arch/arm/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/dts/nuvoton-common-npcm7xx.dtsi
index 02ee4d7..feb8887 100644 (file)
--- a/arch/arm/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/dts/nuvoton-common-npcm7xx.dtsi
@@ -559,6 +559,9 @@
                #size-cells = <1>;
                compatible = "nuvoton,npcm750-pinctrl", "syscon", "simple-mfd";
                ranges = <0 0xf0010000 0x8000>;
+               reg = <0xf0010000 0x8000>;
+               syscon-gcr = <&gcr>;
+               syscon-rst = <&rst>;
                gpio0: gpio@f0010000 {
                        gpio-controller;
                        #gpio-cells = <2>;

diff --git a/arch/arm/dts/nuvoton-npcm750-evb.dts b/arch/arm/dts/nuvoton-npcm750-evb.dts
index 3e4abe6..d4667a1 100644 (file)
--- a/arch/arm/dts/nuvoton-npcm750-evb.dts
+++ b/arch/arm/dts/nuvoton-npcm750-evb.dts
@@ -12,8 +12,8 @@
        compatible = "nuvoton,npcm750-evb", "nuvoton,npcm750";
 
        aliases {
-               ethernet2 = &gmac0;
-               ethernet3 = &gmac1;
+               eth0 = &emc0;
+               eth1 = &gmac0;
                serial0 = &serial0;
                serial1 = &serial1;
                serial2 = &serial2;
@@ -34,11 +34,11 @@
                i2c13 = &i2c13;
                i2c14 = &i2c14;
                i2c15 = &i2c15;
-               spi0 = &spi0;
-               spi1 = &spi1;
-               fiu0 = &fiu0;
-               fiu1 = &fiu3;
-               fiu2 = &fiux;
+               spi0 = &fiu0;
+               spi1 = &fiu3;
+               spi2 = &fiux;
+               spi3 = &spi0;
+               spi4 = &spi1;
        };
 
        chosen {
@@ -51,18 +51,20 @@
        };
 };
 
-&gmac0 {
-       phy-mode = "rgmii-id";
+&udc0 {
        status = "okay";
+       phys = <&usbphy1 0>;
 };
 
-&gmac1 {
+&gmac0 {
        phy-mode = "rgmii-id";
+       snps,eee-force-disable;
        status = "okay";
 };
 
 &ehci1 {
        status = "okay";
+       phys = <&usbphy2 3>;
 };
 
 &fiu0 {
@@ -151,7 +153,7 @@
        spix-mode;
 };
 
-&watchdog1 {
+&watchdog0 {
        status = "okay";
 };
 
@@ -159,6 +161,14 @@
        status = "okay";
 };
 
+&sha {
+       status = "okay";
+};
+
+&aes {
+       status = "okay";
+};
+
 &serial0 {
        status = "okay";
        clock-frequency = <24000000>;
@@ -403,3 +413,34 @@
                        &pin255_input>;
 };
 
+&ehci1 {
+       status = "okay";
+       phys = <&usbphy2 3>;
+};
+
+&otp {
+       status = "okay";
+};
+
+&usbphy1 {
+       status = "okay";
+};
+
+&usbphy2 {
+       status = "okay";
+};
+
+&emc0 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&r1_pins
+                               &r1err_pins>;
+       fixed-link {
+                       speed = <100>;
+                       full-dulpex;
+       };
+};
+
+&sdhci0 {
+       status = "okay";
+};

diff --git a/arch/arm/dts/nuvoton-npcm750.dtsi b/arch/arm/dts/nuvoton-npcm750.dtsi
index 13eee0f..c286353 100644 (file)
--- a/arch/arm/dts/nuvoton-npcm750.dtsi
+++ b/arch/arm/dts/nuvoton-npcm750.dtsi
@@ -3,6 +3,7 @@
 // Copyright 2018 Google, Inc.
 
 #include "nuvoton-common-npcm7xx.dtsi"
+#include "nuvoton-npcm7xx-u-boot.dtsi"
 
 / {
        #address-cells = <1>;

diff --git a/arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi b/arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi
new file mode 100644 (file)
index 0000000..c547e43
--- /dev/null
+++ b/arch/arm/dts/nuvoton-npcm7xx-u-boot.dtsi
@@ -0,0 +1,287 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       interrupt-parent = <&gic>;
+
+       wdt-reboot {
+                compatible = "wdt-reboot";
+                wdt = <&watchdog0>;
+        };
+
+       ahb {
+               udc0:udc@f0830100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0830100 0x200
+                              0xfffd0000 0x800>;
+                       interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_UDC0>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc1:udc@f0831100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0831100 0x200
+                              0xfffd0800 0x800>;
+                       interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc2: udc@f0832100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0832100 0x200
+                              0xfffd1000 0x800>;
+                       interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc3: udc@f0833100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0833100 0x200
+                              0xfffd1800 0x800>;
+                       interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc4: udc@f0834100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0834100 0x200
+                              0xfffd2000 0x800>;
+                       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc5: udc@f0835100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0835100 0x200
+                              0xfffd2800 0x800>;
+                       interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc6: udc@f0836100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0836100 0x200
+                              0xfffd3000 0x800>;
+                       interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc7: udc@f0837100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0837100 0x200
+                              0xfffd3800 0x800>;
+                       interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc8: udc@f0838100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0838100 0x200
+                              0xfffd4000 0x800>;
+                       interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               udc9: udc@f0839100 {
+                       compatible = "nuvoton,npcm750-udc";
+                       reg = <0xf0839100 0x200
+                              0xfffd4800 0x800>;
+                       interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+                       status = "disabled";
+                       clocks = <&clk NPCM7XX_CLK_SU>;
+                       clock-names = "clk_usb_bridge";
+               };
+
+               emc0: eth@f0825000 {
+                       device_type = "network";
+                       compatible = "nuvoton,npcm750-emc";
+                       reg = <0xf0825000 0x1000>;
+                       phy-mode = "rmii";
+                       id = <0>;
+                       syscon-gcr = <&gcr>;
+                       interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk NPCM7XX_CLK_AHB>;
+                       clock-names = "clk_emc";
+                       resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_EMC1>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&r1_pins
+                                       &r1md_pins>;
+                       status = "disabled";
+               };
+
+               ohci1: ohci@f0807000 {
+                       compatible = "nuvoton,npcm750-ohci";
+                       reg = <0xf0807000 0x1000>;
+                       interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_USB_HOST>;
+                       status = "disabled";
+               };
+
+               usbphy {
+                       compatible = "simple-bus", "nuvoton,npcm750-usb-phy";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       syscon = <&gcr>;
+                       usbphy1: usbphy1 {
+                               compatible = "nuvoton,npcm750-usb-phy";
+                               #phy-cells = <1>;
+                               reg = <1>;
+                               resets = <&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_USB_PHY_1>;
+                               status = "disabled";
+                       };
+                       usbphy2: usbphy2 {
+                               compatible = "nuvoton,npcm750-usb-phy";
+                               #phy-cells = <1>;
+                               reg = <2>;
+                               resets =<&rstc NPCM7XX_RESET_IPSRST3 NPCM7XX_RESET_USB_PHY_2>;
+                               status = "disabled";
+                       };
+               };
+
+               sdhci0: sdhci0@f0842000 {
+                       compatible = "nuvoton,npcm750-sdhci";
+                       reg = <0xf0842000 0x200>;
+                       index = <0x0>;
+                       bus-width = <0x8>;
+                       cap-mmc-highspeed;
+                       interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk NPCM7XX_CLK_SDHC>;
+                       clock-frequency = <50000000>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc_pins
+                               &mmc8_pins>;
+                       status = "disabled";
+               };
+
+               sdhci1: sdhci1@f0840000 {
+                       compatible = "nuvoton,npcm750-sdhci";
+                       reg = <0xf0840000 0x2000>;
+                       index = <0x1>;
+                       bus-width = <0x4>;
+                       cap-mmc-highspeed;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&sd1_pins>;
+                       status = "disabled";
+               };
+
+               aes: aes@f0858000 {
+                       compatible = "nuvoton,npcm750-aes";
+                       reg = <0xf0858000 0x1000>;
+                       clocks = <&clk NPCM7XX_CLK_AHB>;
+                       clock-names = "clk_ahb";
+                       status = "disabled";
+               };
+
+               sha: sha@f085a000 {
+                       compatible = "nuvoton,npcm750-sha";
+                       reg = <0xf085a000 0x1000>;
+                       clocks = <&clk NPCM7XX_CLK_AHB>;
+                       clock-names = "clk_ahb";
+                       status = "disabled";
+               };
+
+               //ehci1
+               usb@f0806000 {
+                       resets = <&rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_USB_HOST>;
+               };
+
+               apb {
+                       otp:otp@189000 {
+                               compatible = "nuvoton,npcm750-otp";
+                               reg = <0x189000 0x1000
+                                          0x18a000 0x1000>;
+                               status = "disabled";
+                               clocks = <&clk NPCM7XX_CLK_APB4>;
+                               clock-names = "clk_apb4";
+                       };
+
+                       rng@b000 {
+                               clocks = <&clk NPCM7XX_CLK_APB1>;
+                       };
+                       gpio_0: gpio0@10000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x10000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio0";
+                        };
+
+                        gpio_1: gpio1@11000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x11000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio1";
+                        };
+
+                        gpio_2: gpio2@12000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x12000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio2";
+                        };
+                       gpio_3: gpio3@13000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x13000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio3";
+                        };
+
+                        gpio_4: gpio4@14000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x14000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio4";
+                        };
+
+                        gpio_5: gpio5@15000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x15000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio5";
+                        };
+
+                        gpio_6: gpio6@16000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x16000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio6";
+                        };
+                       gpio_7: gpio7@17000 {
+                                compatible = "nuvoton,npcm-gpio";
+                                reg = <0x17000 0xB0>;
+                                #gpio-cells = <2>;
+                                gpio-controller;
+                                gpio-bank-name = "gpio7";
+                        };
+
+               };
+       };
+};
+

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index cd795d6..1791b97 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -40,14 +40,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_IFC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE                      0x06000000
 #define GICR_BASE                      0x06100000
@@ -55,9 +47,6 @@
 /* SMMU Defintions */
 #define SMMU_BASE                      0x05000000 /* GR0 Base */
 
-/* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-
 /* Cache Coherent Interconnect */
 #define CCI_MN_BASE                    0x04000000
 #define CCI_MN_RNF_NODEID_LIST         0x180
@@ -141,16 +130,7 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_IFC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
 /* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC  1
 #define CONFIG_SYS_FSL_OCRAM_BASE      0x18000000 /* initial RAM */
 #define SYS_FSL_OCRAM_SPACE_SIZE       0x00200000 /* 2M space */
@@ -165,7 +145,6 @@
 #define L1_CACHE_SHIFT         6
 #define L1_CACHE_BYTES         BIT(L1_CACHE_SHIFT)
 #endif
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER       2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS          { 1, 1, 1, 1, 4, 4, 4, 4 }
 #define CONFIG_SYS_FSL_NUM_CC_PLLS             4
 
@@ -179,13 +158,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE             ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED                  CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
 /* Generic Interrupt Controller Definitions */
 #define GICD_BASE                              0x06000000
 #define GICR_BASE                              0x06200000
@@ -194,7 +166,6 @@
 #define SMMU_BASE                              0x05000000 /* GR0 Base */
 
 /* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
 
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 
@@ -234,18 +205,10 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE     ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
-#define CONFIG_SYS_FSL_CCSR_SCFG_LE
-#define CONFIG_SYS_FSL_ESDHC_LE
-#define CONFIG_SYS_FSL_PEX_LUT_LE
-
-#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
-
 /* SEC */
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 
 /* DCFG - GUR */
-#define CONFIG_SYS_FSL_CCSR_GUR_LE
 
 #elif defined(CONFIG_FSL_LSCH2)
 #define CONFIG_SYS_FSL_OCRAM_BASE              0x10000000 /* initial RAM */
@@ -255,16 +218,11 @@
 #define DCSR_DCFG_SBEESR2                      0x20140534
 #define DCSR_DCFG_MBEESR2                      0x20140544
 
-#define CONFIG_SYS_FSL_CCSR_SCFG_BE
-#define CONFIG_SYS_FSL_ESDHC_BE
 #define CONFIG_SYS_FSL_WDOG_BE
 #define CONFIG_SYS_FSL_DSPI_BE
-#define CONFIG_SYS_FSL_CCSR_GUR_BE
-#define CONFIG_SYS_FSL_PEX_LUT_BE
 
 /* SoC related */
 #ifdef CONFIG_ARCH_LS1043A
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FSL_QMAN_V3
 #define CONFIG_SYS_NUM_FMAN                    1
 #define CONFIG_SYS_NUM_FM1_DTSEC               7
@@ -276,8 +234,6 @@
 #define MAX_QE_RISC            1
 #define QE_NUM_OF_SNUM         28
 
-#define CONFIG_SYS_FSL_IFC_BE
-
 /* SMMU Defintions */
 #define SMMU_BASE              0x09000000
 
@@ -317,7 +273,6 @@
 #define CONFIG_MAX_MEM_MAPPED          CONFIG_SYS_DDR_BLOCK1_SIZE
 
 #elif defined(CONFIG_ARCH_LS1046A)
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FSL_QMAN_V3
 #define CONFIG_SYS_NUM_FMAN                    1
 #define CONFIG_SYS_NUM_FM1_DTSEC               8
@@ -325,8 +280,6 @@
 #define CONFIG_SYS_DDR_BLOCK1_SIZE  ((phys_size_t)2 << 30)
 #define CONFIG_MAX_MEM_MAPPED           CONFIG_SYS_DDR_BLOCK1_SIZE
 
-#define CONFIG_SYS_FSL_IFC_BE
-
 /* SMMU Defintions */
 #define SMMU_BASE              0x09000000
 

diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index e5f61ea..868456f 100644 (file)
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -79,8 +79,6 @@
 #define CONFIG_MAX_MEM_MAPPED                  ((phys_size_t)2 << 30)
 #endif
 
-#define CONFIG_SYS_FSL_IFC_BE
-#define CONFIG_SYS_FSL_ESDHC_BE
 #define CONFIG_SYS_FSL_WDOG_BE
 #define CONFIG_SYS_FSL_DSPI_BE
 

diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-imx/mx7ulp/Kconfig
index 615d75b..632c4bf 100644 (file)
--- a/arch/arm/mach-imx/mx7ulp/Kconfig
+++ b/arch/arm/mach-imx/mx7ulp/Kconfig
@@ -24,16 +24,16 @@ config TARGET_MX7ULP_COM
        select MX7ULP
        select SYS_ARCH_TIMER
        select SPL_DM if SPL
-       select SPL_GPIO_SUPPORT if SPL
+       select SPL_GPIO if SPL
        select SPL_LIBCOMMON_SUPPORT if SPL
        select SPL_LIBDISK_SUPPORT if SPL
        select SPL_LIBGENERIC_SUPPORT if SPL
-       select SPL_MMC_SUPPORT if SPL
+       select SPL_MMC if SPL
        select SPL_OF_CONTROL if SPL
        select SPL_OF_LIBFDT if SPL
        select SPL_PINCTRL if SPL
        select SPL_SEPARATE_BSS if SPL
-       select SPL_SERIAL_SUPPORT if SPL
+       select SPL_SERIAL if SPL
        select SUPPORT_SPL
 
 config TARGET_MX7ULP_EVK

diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 0dce880..6ac2b61 100644 (file)
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -8,7 +8,6 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
 obj-$(CONFIG_SOC_K3_AM625) += am62x/
 obj-$(CONFIG_ARM64) += arm64-mmu.o
 obj-$(CONFIG_CPU_V7R) += r5_mpu.o lowlevel_init.o
-obj-$(CONFIG_TI_SECURE_DEVICE) += security.o
 obj-$(CONFIG_ARM64) += cache.o
 ifeq ($(CONFIG_SPL_BUILD),y)
 obj-$(CONFIG_SOC_K3_AM654) += am654_init.o
@@ -18,4 +17,4 @@ obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
 obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
 obj-$(CONFIG_K3_LOAD_SYSFW) += sysfw-loader.o
 endif
-obj-y += common.o
+obj-y += common.o security.o

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 70f6444..3962f28 100644 (file)
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -290,9 +290,7 @@ void board_fit_image_post_process(const void *fit, int node, void **p_image,
        }
 #endif
 
-#if IS_ENABLED(CONFIG_TI_SECURE_DEVICE)
        ti_secure_image_post_process(p_image, p_size);
-#endif
 }
 #endif
 
@@ -396,7 +394,54 @@ void reset_cpu(void)
 }
 #endif
 
+enum k3_device_type get_device_type(void)
+{
+       u32 sys_status = readl(K3_SEC_MGR_SYS_STATUS);
+
+       u32 sys_dev_type = (sys_status & SYS_STATUS_DEV_TYPE_MASK) >>
+                       SYS_STATUS_DEV_TYPE_SHIFT;
+
+       u32 sys_sub_type = (sys_status & SYS_STATUS_SUB_TYPE_MASK) >>
+                       SYS_STATUS_SUB_TYPE_SHIFT;
+
+       switch (sys_dev_type) {
+       case SYS_STATUS_DEV_TYPE_GP:
+               return K3_DEVICE_TYPE_GP;
+       case SYS_STATUS_DEV_TYPE_TEST:
+               return K3_DEVICE_TYPE_TEST;
+       case SYS_STATUS_DEV_TYPE_EMU:
+               return K3_DEVICE_TYPE_EMU;
+       case SYS_STATUS_DEV_TYPE_HS:
+               if (sys_sub_type == SYS_STATUS_SUB_TYPE_VAL_FS)
+                       return K3_DEVICE_TYPE_HS_FS;
+               else
+                       return K3_DEVICE_TYPE_HS_SE;
+       default:
+               return K3_DEVICE_TYPE_BAD;
+       }
+}
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
+static const char *get_device_type_name(void)
+{
+       enum k3_device_type type = get_device_type();
+
+       switch (type) {
+       case K3_DEVICE_TYPE_GP:
+               return "GP";
+       case K3_DEVICE_TYPE_TEST:
+               return "TEST";
+       case K3_DEVICE_TYPE_EMU:
+               return "EMU";
+       case K3_DEVICE_TYPE_HS_FS:
+               return "HS-FS";
+       case K3_DEVICE_TYPE_HS_SE:
+               return "HS-SE";
+       default:
+               return "BAD";
+       }
+}
+
 int print_cpuinfo(void)
 {
        struct udevice *soc;
@@ -418,9 +463,11 @@ int print_cpuinfo(void)
 
        ret = soc_get_revision(soc, name, 64);
        if (!ret) {
-               printf("%s\n", name);
+               printf("%s ", name);
        }
 
+       printf("%s\n", get_device_type_name());
+
        return 0;
 }
 #endif

diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index e81b70d..8f38fce 100644 (file)
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -18,6 +18,15 @@ struct fwl_data {
        u16 regions;
 };
 
+enum k3_device_type {
+       K3_DEVICE_TYPE_BAD,
+       K3_DEVICE_TYPE_GP,
+       K3_DEVICE_TYPE_TEST,
+       K3_DEVICE_TYPE_EMU,
+       K3_DEVICE_TYPE_HS_FS,
+       K3_DEVICE_TYPE_HS_SE,
+};
+
 void setup_k3_mpu_regions(void);
 int early_console_init(void);
 void disable_linefill_optimization(void);
@@ -27,4 +36,5 @@ void k3_sysfw_print_ver(void);
 void spl_enable_dcache(void);
 void mmr_unlock(phys_addr_t base, u32 partition);
 bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
+enum k3_device_type get_device_type(void);
 void ti_secure_image_post_process(void **p_image, size_t *p_size);

diff --git a/arch/arm/mach-k3/include/mach/hardware.h b/arch/arm/mach-k3/include/mach/hardware.h
index 7bbd5c2..028482b 100644 (file)
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -32,6 +32,16 @@
 #define JTAG_ID_VARIANT_MASK   (0xf << 28)
 #define JTAG_ID_PARTNO_SHIFT   12
 #define JTAG_ID_PARTNO_MASK    (0xffff << 12)
+#define K3_SEC_MGR_SYS_STATUS          0x44234100
+#define SYS_STATUS_DEV_TYPE_SHIFT      0
+#define SYS_STATUS_DEV_TYPE_MASK       (0xf)
+#define SYS_STATUS_DEV_TYPE_GP         0x3
+#define SYS_STATUS_DEV_TYPE_TEST       0x5
+#define SYS_STATUS_DEV_TYPE_EMU                0x9
+#define SYS_STATUS_DEV_TYPE_HS         0xa
+#define SYS_STATUS_SUB_TYPE_SHIFT      8
+#define SYS_STATUS_SUB_TYPE_MASK       (0xf << 8)
+#define SYS_STATUS_SUB_TYPE_VAL_FS     0xa
 
 #define K3_ROM_BOOT_HEADER_MAGIC       "EXTBOOT"
 

diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c
index 8de9739..d8d41ec 100644 (file)
--- a/arch/arm/mach-k3/security.c
+++ b/arch/arm/mach-k3/security.c
@@ -2,10 +2,11 @@
 /*
  * K3: Security functions
  *
- * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2018-2022 Texas Instruments Incorporated - http://www.ti.com/
  *     Andrew F. Davis <afd@ti.com>
  */
 
+#include <asm/io.h>
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
@@ -18,10 +19,30 @@
 #include <spl.h>
 #include <asm/arch/sys_proto.h>
 
+#include "common.h"
+
+static bool ti_secure_cert_detected(void *p_image)
+{
+       /* Primitive certificate detection, check for DER starting with
+        * two 4-Octet SEQUENCE tags
+        */
+       return (((u8 *)p_image)[0] == 0x30 && ((u8 *)p_image)[1] == 0x82 &&
+               ((u8 *)p_image)[4] == 0x30 && ((u8 *)p_image)[5] == 0x82);
+}
+
+/* Primitive certificate length, assumes one 2-Octet sized SEQUENCE */
+static size_t ti_secure_cert_length(void *p_image)
+{
+       size_t seq_length = be16_to_cpu(readw_relaxed(p_image + 2));
+       /* Add 4 for the SEQUENCE tag length */
+       return seq_length + 4;
+}
+
 void ti_secure_image_post_process(void **p_image, size_t *p_size)
 {
        struct ti_sci_handle *ti_sci = get_ti_sci_handle();
        struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
+       size_t cert_length;
        u64 image_addr;
        u32 image_size;
        int ret;
@@ -29,6 +50,36 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size)
        image_addr = (uintptr_t)*p_image;
        image_size = *p_size;
 
+       if (!image_size)
+               return;
+
+       if (get_device_type() == K3_DEVICE_TYPE_GP) {
+               if (ti_secure_cert_detected(*p_image)) {
+                       printf("Warning: Detected image signing certificate on GP device. "
+                              "Skipping certificate to prevent boot failure. "
+                              "This will fail if the image was also encrypted\n");
+
+                       cert_length = ti_secure_cert_length(*p_image);
+                       if (cert_length > *p_size) {
+                               printf("Invalid signing certificate size\n");
+                               return;
+                       }
+
+                       *p_image += cert_length;
+                       *p_size -= cert_length;
+               }
+
+               return;
+       }
+
+       if (get_device_type() != K3_DEVICE_TYPE_HS_SE &&
+           !ti_secure_cert_detected(*p_image)) {
+               printf("Warning: Did not detect image signing certificate. "
+                      "Skipping authentication to prevent boot failure. "
+                      "This will fail on Security Enforcing(HS-SE) devices\n");
+               return;
+       }
+
        debug("Authenticating image at address 0x%016llx\n", image_addr);
        debug("Authenticating image of size %d bytes\n", image_size);
 

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 737bdd8..2cb5dae 100644 (file)
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -20,6 +20,7 @@ config MPC85xx
        select CREATE_ARCH_SYMLINK
        select SYS_FSL_DDR
        select SYS_FSL_DDR_BE
+       select SYS_FSL_IFC_BE
        select BINMAN if OF_SEPARATE
        imply CMD_HASH
        imply CMD_IRQ

diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 12dc03c..18ef718 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -154,6 +154,7 @@ config TARGET_P2041RDB
        bool "Support P2041RDB"
        select ARCH_P2041
        select BOARD_LATE_INIT if CHAIN_OF_TRUST
+       select FSL_CORENET
        select PHYS_64BIT
        imply CMD_SATA
        imply FSL_SATA
@@ -233,6 +234,7 @@ config TARGET_KMP204X
 config TARGET_KMCENT2
        bool "Support kmcent2"
        select VENDOR_KM
+       select FSL_CORENET
 
 endchoice
 
@@ -240,6 +242,7 @@ config ARCH_B4420
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select HETROGENOUS_CLUSTERS
        select SYS_FSL_DDR_VER_47
@@ -268,6 +271,7 @@ config ARCH_B4860
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select HETROGENOUS_CLUSTERS
        select SYS_FSL_DDR_VER_47
@@ -607,6 +611,7 @@ config ARCH_P3041
        bool
        select BACKSIDE_L2_CACHE
        select E500MC
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_44
@@ -638,6 +643,7 @@ config ARCH_P4080
        bool
        select BACKSIDE_L2_CACHE
        select E500MC
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_44
@@ -678,6 +684,7 @@ config ARCH_P5040
        bool
        select BACKSIDE_L2_CACHE
        select E500MC
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_44
@@ -710,6 +717,7 @@ config ARCH_T1024
        select BACKSIDE_L2_CACHE
        select E500MC
        select E5500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_50
@@ -735,6 +743,7 @@ config ARCH_T1040
        select BACKSIDE_L2_CACHE
        select E500MC
        select E5500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_50
@@ -760,6 +769,7 @@ config ARCH_T1042
        select BACKSIDE_L2_CACHE
        select E500MC
        select E5500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_50
@@ -784,6 +794,7 @@ config ARCH_T2080
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_47
@@ -814,6 +825,7 @@ config ARCH_T4240
        bool
        select E500MC
        select E6500
+       select FSL_CORENET
        select FSL_LAW
        select SYS_CACHE_SHIFT_6
        select SYS_FSL_DDR_VER_47
@@ -1161,8 +1173,16 @@ config SYS_FSL_NUM_LAWS
                Number of local access windows. This is fixed per SoC.
                If not sure, do not change.
 
+config SYS_FSL_CORES_PER_CLUSTER
+       int
+       depends on SYS_FSL_QORIQ_CHASSIS2
+       default 4 if ARCH_B4860 || ARCH_T2080 || ARCH_T4240
+       default 2 if ARCH_B4420
+       default 1 if ARCH_T1024 || ARCH_T1040 || ARCH_T1042
+
 config SYS_FSL_THREADS_PER_CORE
        int
+       depends on SYS_FSL_QORIQ_CHASSIS2
        default 2 if E6500
        default 1
 
@@ -1274,6 +1294,10 @@ config SYS_BOOK3E_HV
        bool "Category E.HV is supported"
        depends on BOOKE
 
+config FSL_CORENET
+       bool
+       select SYS_FSL_CPC
+
 config SYS_CPC_REINIT_F
        bool
        help
@@ -1281,7 +1305,7 @@ config SYS_CPC_REINIT_F
          required to be re-initialized.
 
 config SYS_FSL_CPC
-       bool "Corenet Platform Cache support"
+       bool
 
 config SYS_CACHE_STASHING
        bool "Enable cache stashing"

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index a43e6e5..458c0a8 100644 (file)
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -16,9 +16,6 @@
 
 #include <fsl_ddrc_version.h>
 
-/* IP endianness */
-#define CONFIG_SYS_FSL_IFC_BE
-
 #if defined(CONFIG_ARCH_MPC8548)
 #define CONFIG_SYS_FSL_SRIO_MAX_PORTS  1
 #define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
@@ -74,7 +71,6 @@
 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM       2
 
 #elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_NUM_FMAN            1
 #define CONFIG_SYS_NUM_FM1_DTSEC       5
@@ -91,7 +87,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P3041)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_NUM_FMAN            1
 #define CONFIG_SYS_NUM_FM1_DTSEC       5
@@ -108,7 +103,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
 
 #elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     4
 #define CONFIG_SYS_NUM_FMAN            2
 #define CONFIG_SYS_NUM_FM1_DTSEC       4
@@ -126,7 +120,6 @@
 #define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
 
 #elif defined(CONFIG_ARCH_P5040)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     3
 #define CONFIG_SYS_NUM_FMAN            2
 #define CONFIG_SYS_NUM_FM1_DTSEC       5
@@ -160,8 +153,6 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.2"
 
 #elif defined(CONFIG_ARCH_T4240)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_QMAN_V3         /* QMAN version 3 */
 #ifdef CONFIG_ARCH_T4240
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS   { 1, 1, 4 }
@@ -183,7 +174,6 @@
 #define CONFIG_SYS_NUM_FMAN            2
 #define CONFIG_SYS_PME_CLK             0
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FM1_CLK             3
 #define CONFIG_SYS_FM2_CLK             3
 #define CONFIG_SYS_FM_MURAM_SIZE       0x60000
@@ -197,7 +187,6 @@
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 #define CONFIG_SYS_FSL_QMAN_V3         /* QMAN version 3 */
 #define CONFIG_SYS_FSL_SRDS_1
 #define CONFIG_SYS_FSL_SRDS_2
@@ -205,14 +194,12 @@
 #define CONFIG_SYS_NUM_FMAN            1
 #define CONFIG_SYS_FM1_CLK             0
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  4
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FM_MURAM_SIZE       0x60000
 #define CONFIG_SYS_FSL_TBCLK_DIV       16
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v2.4"
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
 
 #ifdef CONFIG_ARCH_B4860
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_MAX_DSP_CPUS            12
 #define CONFIG_NUM_DSP_CPUS            6
 #define CONFIG_SYS_FSL_SRDS_NUM_PLLS   2
@@ -226,15 +213,12 @@
 #else
 #define CONFIG_MAX_DSP_CPUS            2
 #define CONFIG_SYS_FSL_SRDS_NUM_PLLS   1
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS  { 1, 4 }
 #define CONFIG_SYS_NUM_FM1_DTSEC       4
 #define CONFIG_SYS_NUM_FM1_10GEC       0
 #endif
 
 #elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3         /* QMAN version 3 */
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS   { 1, 1, 1, 1 }
@@ -244,7 +228,6 @@
 #define CONFIG_PME_PLAT_CLK_DIV                2
 #define CONFIG_SYS_PME_CLK             CONFIG_PME_PLAT_CLK_DIV
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_FM_PLAT_CLK_DIV 1
 #define CONFIG_SYS_FM1_CLK             CONFIG_FM_PLAT_CLK_DIV
 #define CONFIG_SYS_FM_MURAM_SIZE       0x30000
@@ -259,10 +242,7 @@
 #define QE_NUM_OF_SNUM                 28
 
 #elif defined(CONFIG_ARCH_T1024)
-#define CONFIG_FSL_CORENET          /* Freescale CoreNet platform */
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
 #define CONFIG_SYS_FSL_QMAN_V3  /* QMAN version 3 */
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FSL_NUM_CC_PLL      2
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS  { 1, 1, 1, 1 }
 #define CONFIG_SYS_FSL_SRDS_1
@@ -285,8 +265,6 @@
 #define QE_NUM_OF_SNUM                 28
 
 #elif defined(CONFIG_ARCH_T2080)
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
-#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
 #define CONFIG_SYS_FSL_NUM_CC_PLLS     2
 #define CONFIG_SYS_FSL_QMAN_V3
 #define CONFIG_SYS_NUM_FMAN            1
@@ -305,7 +283,6 @@
 #define CONFIG_SYS_PME_CLK             CONFIG_PME_PLAT_CLK_DIV
 #define CONFIG_SYS_FM1_CLK             0
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  8
-#define CONFIG_SYS_FMAN_V3
 #define CONFIG_SYS_FM_MURAM_SIZE       0x28000
 #define CONFIG_SYS_FSL_TBCLK_DIV       16
 #define CONFIG_SYS_FSL_PCIE_COMPAT     "fsl,qoriq-pcie-v3.0"

diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c
index 9b71424..7ea0444 100644 (file)
--- a/arch/sh/lib/bootm.c
+++ b/arch/sh/lib/bootm.c
@@ -17,21 +17,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_SYS_DEBUG
-static void hexdump(unsigned char *buf, int len)
-{
-       int i;
-
-       for (i = 0; i < len; i++) {
-               if ((i % 16) == 0)
-                       printf("%s%08x: ", i ? "\n" : "",
-                                                       (unsigned int)&buf[i]);
-               printf("%02x ", buf[i]);
-       }
-       printf("\n");
-}
-#endif
-
 #ifdef CONFIG_SH_SDRAM_OFFSET
 #define GET_INITRD_START(initrd, linux) (initrd - linux + CONFIG_SH_SDRAM_OFFSET)
 #else

diff --git a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
index 0a1b2c9..aa9687f 100644 (file)
--- a/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
+++ b/board/advantech/imx8mp_rsb3720a1/imx8mp_rsb3720a1.c
@@ -206,7 +206,7 @@ int board_late_init(void)
        return 0;
 }
 
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_MMC
 #define UBOOT_RAW_SECTOR_OFFSET 0x40
 unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
 {
@@ -219,4 +219,4 @@ unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc)
                return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR;
        }
 }
-#endif /* CONFIG_SPL_MMC_SUPPORT */
+#endif /* CONFIG_SPL_MMC */

diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index c3e1734..86b4050 100644 (file)
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -7,7 +7,6 @@
 
 #include <common.h>
 #include <debug_uart.h>
-#include <flash.h>
 #include <init.h>
 #include <net.h>
 #include <vsprintf.h>
@@ -140,7 +139,7 @@ static void at91sam9263ek_lcd_hw_init(void)
 #include <version.h>
 
 #ifdef CONFIG_MTD_NOR_FLASH
-extern flash_info_t flash_info[];
+#include <flash.h>
 #endif
 
 void lcd_show_board_info(void)

diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index 738b6bc..31d532b 100644 (file)
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -12,7 +12,6 @@
 #include <command.h>
 #include <env.h>
 #include <env_internal.h>
-#include <flash.h>
 #include <init.h>
 #include <net.h>
 #include <malloc.h>

diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c
index 4337f48..5d15ed4 100644 (file)
--- a/board/cobra5272/flash.c
+++ b/board/cobra5272/flash.c
@@ -200,8 +200,8 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
                        do {
                                result = *addr;
 
-                               /* check timeout */
-                               if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+                               /* check timeout, 1000ms */
+                               if (get_timer(start) > 1000) {
                                        MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
                                        chip1 = TMO;
                                        break;
@@ -289,8 +289,8 @@ static int write_word(flash_info_t *info, ulong dest, ulong data)
        do {
                result = *addr;
 
-               /* check timeout */
-               if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+               /* check timeout, 1000ms */
+               if (get_timer(start) > 1000) {
                        chip1 = ERR | TMO;
                        break;
                }

diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index f1a0b0c..f56e4e8 100644 (file)
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -6,7 +6,6 @@
 
 #include <common.h>
 #include <dm.h>
-#include <flash.h>
 #include <fsl_validate.h>
 #include <fsl_secboot_err.h>
 #include <fsl_sfp.h>
@@ -79,6 +78,8 @@ static u32 check_ie(struct fsl_secboot_img_priv *img)
  * address
  */
 #if defined(CONFIG_MPC85xx)
+#include <flash.h>
+
 int get_csf_base_addr(u32 *csf_addr, u32 *flash_base_addr)
 {
        struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);

diff --git a/board/freescale/m5253demo/Kconfig b/board/freescale/m5253demo/Kconfig
index 303d29b..0ecce87 100644 (file)
--- a/board/freescale/m5253demo/Kconfig
+++ b/board/freescale/m5253demo/Kconfig
@@ -1,5 +1,9 @@
 if TARGET_M5253DEMO
 
+config FLASH_CFI_LEGACY
+       depends on SYS_FLASH_CFI
+       def_bool y
+
 config SYS_CPU
        default "mcf52x2"
 

diff --git a/board/freescale/m5253demo/flash.c b/board/freescale/m5253demo/flash.c
index 3197421..bff1ac5 100644 (file)
--- a/board/freescale/m5253demo/flash.c
+++ b/board/freescale/m5253demo/flash.c
@@ -242,7 +242,8 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
                                        count = 0;
                                }
 
-                               if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
+                               /* check timeout, 1000ms */
+                               if (get_timer(start) > 1000) {
                                        printf("Timeout\n");
                                        *addr = 0x00F0; /* reset to read mode */
 
@@ -294,8 +295,8 @@ int flash_erase(flash_info_t * info, int s_first, int s_last)
                                                enable_interrupts();
 
                                        while ((*addr & 0x0080) != 0x0080) {
-                                               if (get_timer(start) >
-                                                   CONFIG_SYS_FLASH_ERASE_TOUT) {
+                                               /* check timeout, 1000ms */
+                                               if (get_timer(start) > 1000) {
                                                        printf("Timeout\n");
                                                        *addr = 0x00F0; /* reset to read mode */
 
@@ -430,7 +431,8 @@ int write_word(flash_info_t * info, FPWV * dest, u16 data)
        /* data polling for D7 */
        while (res == 0
               && (*dest & (u8) 0x00800080) != (data & (u8) 0x00800080)) {
-               if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+               /* check timeout, 500ms */
+               if (get_timer(start) > 500) {
                        *dest = (u8) 0x00F000F0;        /* reset bank */
                        res = 1;
                }

diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 84671f6..2650d30 100644 (file)
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -97,7 +97,7 @@ int dram_init(void)
 int fixed_sdram(void)
 {
        immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
-       u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
+       u32 msize = CONFIG_SYS_SDRAM_SIZE;
        u32 msize_log2 = __ilog2(msize);
 
        im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000;
@@ -127,7 +127,7 @@ int fixed_sdram(void)
 
        im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
        udelay(2000);
-       return CONFIG_SYS_DDR_SIZE;
+       return CONFIG_SYS_SDRAM_SIZE >> 20;
 }
 #endif /*!CONFIG_SYS_SPD_EEPROM */
 

diff --git a/board/freescale/p1010rdb/ddr.c b/board/freescale/p1010rdb/ddr.c
index 2625195..b423ec8 100644 (file)
--- a/board/freescale/p1010rdb/ddr.c
+++ b/board/freescale/p1010rdb/ddr.c
@@ -16,142 +16,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifndef CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_SYS_DRAM_SIZE   1024
-
-fsl_ddr_cfg_regs_t ddr_cfg_regs_800 = {
-       .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
-       .cs[0].config = CONFIG_SYS_DDR_CS0_CONFIG,
-       .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
-       .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
-       .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_800,
-       .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_800,
-       .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_800,
-       .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
-       .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2,
-       .ddr_sdram_mode = CONFIG_SYS_DDR_MODE_1_800,
-       .ddr_sdram_mode_2 = CONFIG_SYS_DDR_MODE_2_800,
-       .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
-       .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_800,
-       .ddr_data_init = CONFIG_MEM_INIT_VALUE,
-       .ddr_sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL_800,
-       .ddr_init_addr = CONFIG_SYS_DDR_INIT_ADDR,
-       .ddr_init_ext_addr = CONFIG_SYS_DDR_INIT_EXT_ADDR,
-       .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
-       .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
-       .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
-       .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_800,
-       .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
-       .ddr_sdram_rcw_1 = CONFIG_SYS_DDR_RCW_1,
-       .ddr_sdram_rcw_2 = CONFIG_SYS_DDR_RCW_2
-};
-
-fsl_ddr_cfg_regs_t ddr_cfg_regs_667 = {
-       .cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS,
-       .cs[0].config = CONFIG_SYS_DDR_CS0_CONFIG,
-       .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
-       .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_667,
-       .timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0_667,
-       .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_667,
-       .timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2_667,
-       .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
-       .ddr_sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL_2,
-       .ddr_sdram_mode = CONFIG_SYS_DDR_MODE_1_667,
-       .ddr_sdram_mode_2 = CONFIG_SYS_DDR_MODE_2_667,
-       .ddr_sdram_md_cntl = CONFIG_SYS_DDR_MODE_CONTROL,
-       .ddr_sdram_interval = CONFIG_SYS_DDR_INTERVAL_667,
-       .ddr_data_init = CONFIG_MEM_INIT_VALUE,
-       .ddr_sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CTRL_667,
-       .ddr_init_addr = CONFIG_SYS_DDR_INIT_ADDR,
-       .ddr_init_ext_addr = CONFIG_SYS_DDR_INIT_EXT_ADDR,
-       .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
-       .timing_cfg_5 = CONFIG_SYS_DDR_TIMING_5,
-       .ddr_zq_cntl = CONFIG_SYS_DDR_ZQ_CONTROL,
-       .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_667,
-       .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
-       .ddr_sdram_rcw_1 = CONFIG_SYS_DDR_RCW_1,
-       .ddr_sdram_rcw_2 = CONFIG_SYS_DDR_RCW_2
-};
-
-fixed_ddr_parm_t fixed_ddr_parm_0[] = {
-       {750, 850, &ddr_cfg_regs_800},
-       {607, 749, &ddr_cfg_regs_667},
-       {0, 0, NULL}
-};
-
-unsigned long get_sdram_size(void)
-{
-       struct cpu_type *cpu;
-       phys_size_t ddr_size;
-
-       cpu = gd->arch.cpu;
-       /* P1014 and it's derivatives support max 16it DDR width */
-       if (cpu->soc_ver == SVR_P1014)
-               ddr_size = (CONFIG_SYS_DRAM_SIZE / 2);
-       else
-               ddr_size = CONFIG_SYS_DRAM_SIZE;
-
-       return ddr_size;
-}
-
-/*
- * Fixed sdram init -- doesn't use serial presence detect.
- */
-phys_size_t fixed_sdram(void)
-{
-       int i;
-       char buf[32];
-       fsl_ddr_cfg_regs_t ddr_cfg_regs;
-       phys_size_t ddr_size;
-       ulong ddr_freq, ddr_freq_mhz;
-       struct cpu_type *cpu;
-
-#if defined(CONFIG_SYS_RAMBOOT)
-       return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
-#endif
-
-       ddr_freq = get_ddr_freq(0);
-       ddr_freq_mhz = ddr_freq / 1000000;
-
-       printf("Configuring DDR for %s MT/s data rate\n",
-                               strmhz(buf, ddr_freq));
-
-       for (i = 0; fixed_ddr_parm_0[i].max_freq > 0; i++) {
-               if ((ddr_freq_mhz > fixed_ddr_parm_0[i].min_freq) &&
-                  (ddr_freq_mhz <= fixed_ddr_parm_0[i].max_freq)) {
-                       memcpy(&ddr_cfg_regs, fixed_ddr_parm_0[i].ddr_settings,
-                                                       sizeof(ddr_cfg_regs));
-                       break;
-               }
-       }
-
-       if (fixed_ddr_parm_0[i].max_freq == 0)
-               panic("Unsupported DDR data rate %s MT/s data rate\n",
-                                       strmhz(buf, ddr_freq));
-
-       cpu = gd->arch.cpu;
-       /* P1014 and it's derivatives support max 16bit DDR width */
-       if (cpu->soc_ver == SVR_P1014) {
-               ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK;
-               ddr_cfg_regs.ddr_sdram_cfg |= SDRAM_CFG_16_BE;
-               /* divide SA and EA by two and then mask the rest so we don't
-                * write to reserved fields */
-               ddr_cfg_regs.cs[0].bnds = (CONFIG_SYS_DDR_CS0_BNDS >> 1) & 0x0fff0fff;
-       }
-
-       ddr_size = (phys_size_t) CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
-       fsl_ddr_set_memctl_regs(&ddr_cfg_regs, 0, 0);
-
-       if (set_ddr_laws(CONFIG_SYS_DDR_SDRAM_BASE, ddr_size,
-                                       LAW_TRGT_IF_DDR_1) < 0) {
-               printf("ERROR setting Local Access Windows for DDR\n");
-               return 0;
-       }
-
-       return ddr_size;
-}
-
-#else /* CONFIG_SYS_DDR_RAW_TIMING */
 /*
  * Samsung K4B2G0846C-HCF8
  * The following timing are for "downshift"
@@ -232,5 +96,3 @@ void fsl_ddr_board_options(memctl_options_t *popts,
                popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS;
        }
 }
-
-#endif /* CONFIG_SYS_DDR_RAW_TIMING */

diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c
index aa833a0..0cfde91 100644 (file)
--- a/board/gardena/smart-gateway-mt7688/board.c
+++ b/board/gardena/smart-gateway-mt7688/board.c
@@ -7,7 +7,6 @@
 #include <command.h>
 #include <env.h>
 #include <env_internal.h>
-#include <flash.h>
 #include <init.h>
 #include <led.h>
 #include <log.h>

diff --git a/board/gdsys/mpc8308/sdram.c b/board/gdsys/mpc8308/sdram.c
index bfd55f5..47b8804 100644 (file)
--- a/board/gdsys/mpc8308/sdram.c
+++ b/board/gdsys/mpc8308/sdram.c
@@ -34,7 +34,7 @@ DECLARE_GLOBAL_DATA_PTR;
 static long fixed_sdram(void)
 {
        immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-       u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
+       u32 msize = CONFIG_SYS_SDRAM_SIZE;
        u32 msize_log2 = __ilog2(msize);
 
        out_be32(&im->sysconf.ddrlaw[0].bar,

diff --git a/board/ids/ids8313/ids8313.c b/board/ids/ids8313/ids8313.c
index 45c77a2..48aea71 100644 (file)
--- a/board/ids/ids8313/ids8313.c
+++ b/board/ids/ids8313/ids8313.c
@@ -56,7 +56,7 @@ int checkboard(void)
 int fixed_sdram(unsigned long config)
 {
        immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-       u32 msize = CONFIG_SYS_DDR_SIZE << 20;
+       u32 msize = CONFIG_SYS_SDRAM_SIZE;
 
 #ifndef CONFIG_SYS_RAMBOOT
        u32 msize_log2 = __ilog2(msize);
@@ -109,7 +109,7 @@ int fixed_sdram(unsigned long config)
 
 static int setup_sdram(void)
 {
-       u32 msize = CONFIG_SYS_DDR_SIZE << 20;
+       u32 msize = CONFIG_SYS_SDRAM_SIZE;
        long int size_01, size_02;
 
        size_01 = fixed_sdram(CONFIG_SYS_DDR_CONFIG);

diff --git a/board/imgtec/malta/lowlevel_init.S b/board/imgtec/malta/lowlevel_init.S
index ecb4424..bed2497 100644 (file)
--- a/board/imgtec/malta/lowlevel_init.S
+++ b/board/imgtec/malta/lowlevel_init.S
@@ -118,7 +118,7 @@ _msc01:
        /* setup basic address decode */
        PTR_LI  t0, CKSEG1ADDR(MALTA_MSC01_BIU_BASE)
        li      t1, 0x0
-       li      t2, -CONFIG_SYS_MEM_SIZE
+       li      t2, -CONFIG_SYS_SDRAM_SIZE
        sw      t1, MSC01_BIU_MCBAS1L_OFS(t0)
        sw      t2, MSC01_BIU_MCMSK1L_OFS(t0)
        sw      t1, MSC01_BIU_MCBAS2L_OFS(t0)
@@ -168,7 +168,7 @@ _msc01:
        sw      t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
 
        /* setup PCI_BAR0 memory window */
-       li      t1, -CONFIG_SYS_MEM_SIZE
+       li      t1, -CONFIG_SYS_SDRAM_SIZE
        sw      t1, MSC01_PCI_BAR0_OFS(t0)
 
        /* setup PCI to SysCon/CPU translation */

diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index d2e2e4a..9853a0b 100644 (file)
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec/malta/malta.c
@@ -94,7 +94,7 @@ static enum sys_con malta_sys_con(void)
 
 int dram_init(void)
 {
-       gd->ram_size = CONFIG_SYS_MEM_SIZE;
+       gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
        return 0;
 }

diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 8a0b175..6a7b848 100644 (file)
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -141,12 +141,11 @@ static int fixed_sdram(void)
        udelay(200);
        setbits_be32(&im->ddr.sdram_cfg, SDRAM_CFG_MEM_EN);
 
-       msize = CONFIG_SYS_DDR_SIZE << 20;
        disable_addr_trans();
-       msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, msize);
+       msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_SIZE);
        enable_addr_trans();
        msize /= (1024 * 1024);
-       if (CONFIG_SYS_DDR_SIZE != msize) {
+       if (CONFIG_SYS_SDRAM_SIZE >> 20 != msize) {
                for (ddr_size = msize << 20, ddr_size_log2 = 0;
                        (ddr_size > 1);
                        ddr_size = ddr_size >> 1, ddr_size_log2++)

diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index 2379b52..559192e 100644 (file)
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -15,7 +15,6 @@
 #include <init.h>
 #include <net.h>
 #include <ns16550.h>
-#include <flash.h>
 #include <nand.h>
 #include <i2c.h>
 #include <serial.h>

diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index dae064d..6c44afb 100644 (file)
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -15,7 +15,6 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
-#include <flash.h>
 #include <init.h>
 #include <asm/global_data.h>
 #include <asm/io.h>

diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 27aad4e..f9e1bc6 100644 (file)
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -30,8 +30,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern flash_info_t flash_info[];      /* FLASH chips info */
-
 void local_bus_init (void);
 ulong flash_get_size (ulong base, int banknum);
 

diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 7cf2dfa..22c67c6 100644 (file)
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -14,7 +14,9 @@
 #include <cli.h>
 #include <console.h>
 #include <env.h>
+#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR
 #include <flash.h>
+#endif
 #include <malloc.h>
 #include <mmc.h>
 #include <nand.h>

diff --git a/boot/Kconfig b/boot/Kconfig
index 59d0c65..1503739 100644 (file)
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -486,7 +486,7 @@ config SYS_TEXT_BASE
 config HAVE_SYS_MONITOR_BASE
        bool
        depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \
-               || FLASH_PIC32 || ENV_IS_IN_FLASH || MTD_NOR_FLASH
+               || ENV_IS_IN_FLASH || MTD_NOR_FLASH
        depends on !EFI_APP
        default y
 

diff --git a/cmd/adc.c b/cmd/adc.c
index 195efa8..1c5d3e1 100644 (file)
--- a/cmd/adc.c
+++ b/cmd/adc.c
@@ -71,6 +71,7 @@ static int do_adc_info(struct cmd_tbl *cmdtp, int flag, int argc,
 static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc,
                         char *const argv[])
 {
+       char *varname = NULL;
        struct udevice *dev;
        unsigned int data;
        int ret, uV, val;
@@ -78,6 +79,9 @@ static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc,
        if (argc < 3)
                return CMD_RET_USAGE;
 
+       if (argc >= 4)
+               varname = argv[3];
+
        ret = adc_channel_single_shot(argv[1], simple_strtol(argv[2], NULL, 0),
                                      &data);
        if (ret) {
@@ -95,7 +99,8 @@ static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc,
                printf("%u\n", data);
        }
 
-       env_set_ulong(argv[2], val);
+       if (varname)
+               env_set_ulong(varname, val);
 
        return CMD_RET_SUCCESS;
 }
@@ -160,5 +165,5 @@ static char adc_help_text[] =
 U_BOOT_CMD_WITH_SUBCMDS(adc, "ADC sub-system", adc_help_text,
        U_BOOT_SUBCMD_MKENT(list, 1, 1, do_adc_list),
        U_BOOT_SUBCMD_MKENT(info, 2, 1, do_adc_info),
-       U_BOOT_SUBCMD_MKENT(single, 3, 1, do_adc_single),
+       U_BOOT_SUBCMD_MKENT(single, 4, 1, do_adc_single),
        U_BOOT_SUBCMD_MKENT(scan, 3, 1, do_adc_scan));

diff --git a/cmd/bootm.c b/cmd/bootm.c
index 1f70ee9..9fe8ce4 100644 (file)
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -31,7 +31,6 @@ static int image_info(unsigned long addr);
 #if defined(CONFIG_CMD_IMLS)
 #include <flash.h>
 #include <mtd/cfi_flash.h>
-extern flash_info_t flash_info[]; /* info for FLASH chips */
 #endif
 
 #if defined(CONFIG_CMD_IMLS) || defined(CONFIG_CMD_IMLS_NAND)

diff --git a/cmd/cls.c b/cmd/cls.c
index 502d5ed..ba36220 100644 (file)
--- a/cmd/cls.c
+++ b/cmd/cls.c
@@ -8,7 +8,6 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
-#include <lcd.h>
 #include <video.h>
 
 #define CSI "\x1b["
@@ -20,19 +19,12 @@ static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc,
 
        /*  Send clear screen and home */
        printf(CSI "2J" CSI "1;1H");
-#if defined(CONFIG_DM_VIDEO)
-#if !defined(CONFIG_VIDEO_ANSI)
-       if (uclass_first_device_err(UCLASS_VIDEO, &dev))
-               return CMD_RET_FAILURE;
-
-       if (video_clear(dev))
-               return CMD_RET_FAILURE;
-#endif
-#elif defined(CONFIG_LCD)
-       lcd_clear();
-#else
-       return CMD_RET_FAILURE;
-#endif
+       if (CONFIG_IS_ENABLED(DM_VIDEO) && !CONFIG_IS_ENABLED(VIDEO_ANSI)) {
+               if (uclass_first_device_err(UCLASS_VIDEO, &dev))
+                       return CMD_RET_FAILURE;
+               if (video_clear(dev))
+                       return CMD_RET_FAILURE;
+       }
        return CMD_RET_SUCCESS;
 }
 

diff --git a/cmd/cramfs.c b/cmd/cramfs.c
index 2aad50c..57e2afa 100644 (file)
--- a/cmd/cramfs.c
+++ b/cmd/cramfs.c
@@ -33,11 +33,11 @@
 # define DEBUGF(fmt, args...)
 #endif
 
-#include <flash.h>
 
 #ifndef CONFIG_MTD_NOR_FLASH
 # define OFFSET_ADJUSTMENT     0
 #else
+#include <flash.h>
 # define OFFSET_ADJUSTMENT     (flash_info[id.num].start[0])
 #endif
 

diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c
index ad49905..90921ce 100644 (file)
--- a/cmd/cros_ec.c
+++ b/cmd/cros_ec.c
@@ -10,7 +10,6 @@
 #include <command.h>
 #include <cros_ec.h>
 #include <dm.h>
-#include <flash.h>
 #include <log.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>

diff --git a/cmd/extension_board.c b/cmd/extension_board.c
index bbb4812..f94abd6 100644 (file)
--- a/cmd/extension_board.c
+++ b/cmd/extension_board.c
@@ -111,6 +111,7 @@ static int do_extension_apply(struct cmd_tbl *cmdtp, int flag,
                return CMD_RET_USAGE;
 
        if (strcmp(argv[1], "all") == 0) {
+               ret = CMD_RET_FAILURE;
                list_for_each_entry(extension, &extension_list, list) {
                        ret = extension_apply(extension);
                        if (ret != CMD_RET_SUCCESS)

diff --git a/cmd/flash.c b/cmd/flash.c
index db4bb25..f4f85ec 100644 (file)
--- a/cmd/flash.c
+++ b/cmd/flash.c
@@ -25,7 +25,6 @@ int find_dev_and_part(const char *id, struct mtd_device **dev,
 #ifdef CONFIG_MTD_NOR_FLASH
 #include <flash.h>
 #include <mtd/cfi_flash.h>
-extern flash_info_t flash_info[];      /* info for FLASH chips */
 
 /*
  * The user interface starts numbering for Flash banks with 1

diff --git a/cmd/jffs2.c b/cmd/jffs2.c
index 914a7be..e00fcc2 100644 (file)
--- a/cmd/jffs2.c
+++ b/cmd/jffs2.c
@@ -73,7 +73,9 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#if defined(CONFIG_CMD_FLASH)
 #include <flash.h>
+#endif
 #include <image.h>
 #include <malloc.h>
 #include <jffs2/jffs2.h>
@@ -156,7 +158,6 @@ static int mtd_device_validate(u8 type, u8 num, u32 *size)
        if (type == MTD_DEV_TYPE_NOR) {
 #if defined(CONFIG_CMD_FLASH)
                if (num < CONFIG_SYS_MAX_FLASH_BANKS) {
-                       extern flash_info_t flash_info[];
                        *size = flash_info[num].size;
 
                        return 0;
@@ -260,8 +261,6 @@ static inline u32 get_part_sector_size_nand(struct mtdids *id)
 static inline u32 get_part_sector_size_nor(struct mtdids *id, struct part_info *part)
 {
 #if defined(CONFIG_CMD_FLASH)
-       extern flash_info_t flash_info[];
-
        u32 end_phys, start_phys, sector_size = 0, size = 0;
        int i;
        flash_info_t *flash;

diff --git a/cmd/load.c b/cmd/load.c
index 1224a7f..e44ae0d 100644 (file)
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -14,7 +14,9 @@
 #include <efi_loader.h>
 #include <env.h>
 #include <exports.h>
+#ifdef CONFIG_MTD_NOR_FLASH
 #include <flash.h>
+#endif
 #include <image.h>
 #include <lmb.h>
 #include <mapmem.h>

diff --git a/cmd/mem.c b/cmd/mem.c
index b751138..1f4e3fc 100644 (file)
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -16,7 +16,9 @@
 #include <cli.h>
 #include <command.h>
 #include <console.h>
+#ifdef CONFIG_MTD_NOR_FLASH
 #include <flash.h>
+#endif
 #include <hash.h>
 #include <log.h>
 #include <mapmem.h>

diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index ffa05bc..2136af6 100644 (file)
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -8,7 +8,6 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
-#include <flash.h>
 #include <image.h>
 #include <net.h>
 #include <vsprintf.h>

diff --git a/cmd/sf.c b/cmd/sf.c
index cd50b38..058635c 100644 (file)
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -9,7 +9,6 @@
 #include <command.h>
 #include <div64.h>
 #include <dm.h>
-#include <flash.h>
 #include <log.h>
 #include <malloc.h>
 #include <mapmem.h>

diff --git a/common/board_r.c b/common/board_r.c
index ed29069..e702f02 100644 (file)
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -14,7 +14,9 @@
 #include <bootstage.h>
 #include <cpu_func.h>
 #include <exports.h>
+#ifdef CONFIG_MTD_NOR_FLASH
 #include <flash.h>
+#endif
 #include <hang.h>
 #include <image.h>
 #include <irq_func.h>

diff --git a/common/flash.c b/common/flash.c
index f939c2f..848f44e 100644 (file)
--- a/common/flash.c
+++ b/common/flash.c
@@ -13,8 +13,6 @@
 
 #include <mtd/cfi_flash.h>
 
-extern flash_info_t  flash_info[]; /* info for FLASH chips */
-
 /*-----------------------------------------------------------------------
  * Functions
  */

diff --git a/common/spl/Kconfig.vpl b/common/spl/Kconfig.vpl
index ba4b2e4..f331622 100644 (file)
--- a/common/spl/Kconfig.vpl
+++ b/common/spl/Kconfig.vpl
@@ -166,7 +166,7 @@ config VPL_SERIAL
        select VPL_PRINTF
        select VPL_STRTO
        help
-         Enable support for serial in VPL. See SPL_SERIAL_SUPPORT for
+         Enable support for serial in VPL. See SPL_SERIAL for
          details.
 
 config VPL_SIZE_LIMIT

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index f661474..23a395e 100644 (file)
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -398,6 +398,17 @@ int __weak spl_mmc_emmc_boot_partition(struct mmc *mmc)
        return default_spl_mmc_emmc_boot_partition(mmc);
 }
 
+static int spl_mmc_get_mmc_devnum(struct mmc *mmc)
+{
+       struct blk_desc *block_dev;
+#if !CONFIG_IS_ENABLED(BLK)
+       block_dev = &mmc->block_dev;
+#else
+       block_dev = dev_get_uclass_plat(mmc->dev);
+#endif
+       return block_dev->devnum;
+}
+
 int spl_mmc_load(struct spl_image_info *spl_image,
                 struct spl_boot_device *bootdev,
                 const char *filename,
@@ -408,9 +419,11 @@ int spl_mmc_load(struct spl_image_info *spl_image,
        u32 boot_mode;
        int err = 0;
        __maybe_unused int part = 0;
+       int mmc_dev;
 
-       /* Perform peripheral init only once */
-       if (!mmc) {
+       /* Perform peripheral init only once for an mmc device */
+       mmc_dev = spl_mmc_get_device_index(bootdev->boot_device);
+       if (!mmc || spl_mmc_get_mmc_devnum(mmc) != mmc_dev) {
                err = spl_mmc_find_device(&mmc, bootdev->boot_device);
                if (err)
                        return err;

diff --git a/common/update.c b/common/update.c
index b9ad475..80f16af 100644 (file)
--- a/common/update.c
+++ b/common/update.c
@@ -20,14 +20,12 @@
 
 #include <command.h>
 #include <env.h>
-#include <flash.h>
 #include <net.h>
 #include <net/tftp.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <dfu.h>
 #include <errno.h>
-#include <mtd/cfi_flash.h>
 
 #if defined(CONFIG_DFU_TFTP) || defined(CONFIG_UPDATE_TFTP)
 /* env variable holding the location of the update file */
@@ -49,7 +47,8 @@
 extern ulong tftp_timeout_ms;
 extern int tftp_timeout_count_max;
 #ifdef CONFIG_MTD_NOR_FLASH
-extern flash_info_t flash_info[];
+#include <flash.h>
+#include <mtd/cfi_flash.h>
 static uchar *saved_prot_info;
 #endif
 static int update_load(char *filename, ulong msec_max, int cnt_max, ulong addr)

diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig
index 6c56cdc..5083545 100644 (file)
--- a/configs/10m50_defconfig
+++ b/configs/10m50_defconfig
@@ -40,6 +40,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_ALTERA_QSPI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_PHY_MARVELL=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y

diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index 858fc5b..e294d13 100644 (file)
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -38,6 +38,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=254
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig
index c7fd5a0..571b653 100644 (file)
--- a/configs/M5235EVB_Flash32_defconfig
+++ b/configs/M5235EVB_Flash32_defconfig
@@ -45,6 +45,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index a14bf42..7f7d92b 100644 (file)
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -45,6 +45,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig
index f99375b..e4fb7ab 100644 (file)
--- a/configs/M5249EVB_defconfig
+++ b/configs/M5249EVB_defconfig
@@ -28,4 +28,6 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_CHECKSUM=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_MCFUART=y

diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig
index 3ed703a..79382eb 100644 (file)
--- a/configs/M5253DEMO_defconfig
+++ b/configs/M5253DEMO_defconfig
@@ -39,6 +39,7 @@ CONFIG_SYS_FSL_I2C_OFFSET=0x280
 CONFIG_SYS_I2C_SLAVE=0x7F
 CONFIG_SYS_I2C_SPEED=80000
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=2048
 CONFIG_USE_SYS_MAX_FLASH_BANKS=y
 CONFIG_DRIVER_DM9000=y
 CONFIG_MCFUART=y

diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index e3f736b..7dc87a2 100644 (file)
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -57,6 +57,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index fe6ffca..9e2cc33 100644 (file)
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -41,6 +41,7 @@ CONFIG_SYS_I2C_SPEED=80000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=11
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig
index 42940e1..751d805 100644 (file)
--- a/configs/M5282EVB_defconfig
+++ b/configs/M5282EVB_defconfig
@@ -33,6 +33,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_CHECKSUM=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index 28d51ea..1032891 100644 (file)
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -41,6 +41,7 @@ CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_SYS_UNIFY_CACHE=y

diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index c59359b..152a0be 100644 (file)
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -40,6 +40,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_SYS_UNIFY_CACHE=y

diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index ae4add5..0bb86c1 100644 (file)
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -41,6 +41,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y

diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index aead0f4..27f7256 100644 (file)
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -41,6 +41,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=137
 CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y

diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 6adba43..086507e 100644 (file)
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -83,6 +83,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=35
 CONFIG_MTD_RAW_NAND=y
 CONFIG_MPC8XX_FEC=y
 # CONFIG_PCI is not set

diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index efdddf7..9a42109 100644 (file)
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -194,8 +194,10 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_ETH_PHY=y

diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 6fa89aa..def5d6f 100644 (file)
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -61,7 +61,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y

diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 8277649..881fca9 100644 (file)
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -60,7 +60,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y

diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index c21ed57..99a6330 100644 (file)
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -60,7 +60,9 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y

diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index caa9652..2ec67d7 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -99,7 +99,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 5030afd..a3df3dd 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -67,7 +67,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index dd04cff..955e9d8 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -88,7 +88,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 46613cc..25f6c81 100644 (file)
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -90,7 +90,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 6849221..158e182 100644 (file)
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -98,7 +98,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 89fccd6..4015e3e 100644 (file)
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -66,7 +66,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index a278661..9d67ed1 100644 (file)
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -87,7 +87,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 17daecd..8231731 100644 (file)
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -89,7 +89,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index ba17b43..78fd344 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -101,7 +101,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 7a5e057..c74d22a 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -69,7 +69,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index ef85d48..885f720 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -90,7 +90,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index bda32cc..ef37991 100644 (file)
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -92,7 +92,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index d3fe640..116fff6 100644 (file)
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -100,7 +100,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index c13369e..52ec404 100644 (file)
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -68,7 +68,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 691d6e3..2461f53 100644 (file)
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -89,7 +89,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index a630e96..151720c 100644 (file)
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -91,7 +91,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index e122997..48e2f84 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -110,7 +110,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x4000

diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index b581cb1..28f0758 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -97,7 +97,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index e8543c6..1786b94 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -99,7 +99,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 2b9fcb0..ce3f88d 100644 (file)
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -77,7 +77,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 90106d7..0945f4f 100644 (file)
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -109,7 +109,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x4000

diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 7489ad3..4298eac 100644 (file)
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -96,7 +96,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 728592f..ae57246 100644 (file)
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -98,7 +98,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index ada7e2d..c5988e7 100644 (file)
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -76,7 +76,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 4dddea3..6e8caa2 100644 (file)
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -112,8 +112,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000

diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index ddd9e33..43ab26d 100644 (file)
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -99,8 +99,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index 88365bf..60a62e5 100644 (file)
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -101,8 +101,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index ef31e09..4e73f07 100644 (file)
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -79,8 +79,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index b5f5bb9..49a4129 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -114,8 +114,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x4000

diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 856a78f..e046b76 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -101,8 +101,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index b03c17c..f001a1b 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -103,8 +103,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index c1a5ef9..4c9ca9e 100644 (file)
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -81,8 +81,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index caa6211..40cc420 100644 (file)
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -113,8 +113,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x4000

diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index 29cc147..f0f5f48 100644 (file)
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -100,8 +100,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 3ee43f8..e845058 100644 (file)
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -102,8 +102,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index 7af0244..cf106dc 100644 (file)
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -80,8 +80,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 30bf78b..da15a1c 100644 (file)
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -74,7 +73,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y
 CONFIG_DM_SPI_FLASH=y

diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index d5ad609..96be038 100644 (file)
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -71,7 +70,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 97b01b4..91f0ac5 100644 (file)
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -73,7 +72,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index c1eb080..7839820 100644 (file)
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -68,7 +67,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 1df522a..dd39946 100644 (file)
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -79,7 +78,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y

diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 2380cfc..bff1168 100644 (file)
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -76,7 +75,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 8a2464d..a0b55b0 100644 (file)
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -78,7 +77,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 0abf6e1..2eb1f7f 100644 (file)
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -73,7 +72,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index 66769e0..3594581 100644 (file)
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -73,7 +72,10 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 8b5b814..0d27e49 100644 (file)
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -75,7 +74,10 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index a0b12d0..ef75108 100644 (file)
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -70,7 +69,10 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index f48b0f9..cf2d5de 100644 (file)
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -79,7 +78,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y

diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index bf72874..81f04ae 100644 (file)
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -75,7 +74,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index c3a5f63..fd28f3d 100644 (file)
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -77,7 +76,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 9dac9e9..5933485 100644 (file)
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -72,7 +71,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index de2b09c..1140bc0 100644 (file)
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
@@ -102,8 +101,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 3a3cff8..05c4331 100644 (file)
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -15,7 +15,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -101,8 +100,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 9499f58..8c82ee8 100644 (file)
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -17,7 +17,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -104,8 +103,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index da28ef1..700bbd9 100644 (file)
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -10,7 +10,6 @@ CONFIG_TARGET_T1024RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -76,8 +75,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index e51e363..200536a 100644 (file)
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
@@ -98,8 +97,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index e86f0fa..281cc71 100644 (file)
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -97,8 +96,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index c8d8857..c7b337a 100644 (file)
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -100,8 +99,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 1f3d6f6..4983a52 100644 (file)
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T1042D4RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -72,8 +71,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index f947561..30669d8 100644 (file)
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
@@ -105,8 +104,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index d83d365..17629f1 100644 (file)
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -104,8 +103,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index a18ea56..4c62d93 100644 (file)
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -7,7 +7,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_NXP_ESBC=y
 CONFIG_BOOTSCRIPT_HDR_ADDR=0xee020000
@@ -78,8 +77,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 160e697..f68c874 100644 (file)
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -107,8 +106,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 16563ea..ef29f47 100644 (file)
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -8,7 +8,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SRIO_PCIE_BOOT_SLAVE=y
 CONFIG_PCIE1=y

diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index e7775da..62263b2 100644 (file)
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -79,8 +78,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 472e577..a1db4a4 100644 (file)
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
@@ -107,8 +106,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 6882baf..6e9c708 100644 (file)
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -106,8 +105,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 5b1824d..719f022 100644 (file)
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -109,8 +108,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 6c6835e..1117c01 100644 (file)
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -81,8 +80,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index a34c7ca..10991e1 100644 (file)
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -13,7 +13,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y
@@ -108,8 +107,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 0f503a8..0aa715d 100644 (file)
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
@@ -107,8 +106,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index d5845fe..07114a0 100644 (file)
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -16,7 +16,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_T2080RDB_REV_D=y
@@ -110,8 +109,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index e599c4e..99b9c79 100644 (file)
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T2080RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_T2080RDB_REV_D=y
 CONFIG_PCIE1=y
@@ -82,8 +81,11 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index bd467ac..df3b5f3 100644 (file)
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -14,7 +14,6 @@ CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_SYS_MPC85XX_NO_RESETVEC=y
 CONFIG_PCIE1=y
@@ -93,7 +92,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 5b7849e..dc73dcd 100644 (file)
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -9,7 +9,6 @@ CONFIG_TARGET_T4240RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 CONFIG_PCIE1=y
 CONFIG_PCIE2=y
@@ -68,7 +67,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=10000000

diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig
index ad549c0..71ee979 100644 (file)
--- a/configs/amcore_defconfig
+++ b/configs/amcore_defconfig
@@ -35,4 +35,5 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MCFUART=y

diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig
index 9f5cb87..b62e21c 100644 (file)
--- a/configs/astro_mcf5373l_defconfig
+++ b/configs/astro_mcf5373l_defconfig
@@ -44,6 +44,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=259
 CONFIG_MCFRTC=y
 CONFIG_SYS_MCFRTC_BASE=0xFC0A8000
 CONFIG_MCFUART=y

diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig
index 7b97581..bd74eea 100644 (file)
--- a/configs/at91sam9263ek_norflash_boot_defconfig
+++ b/configs/at91sam9263ek_norflash_boot_defconfig
@@ -51,6 +51,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y

diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig
index 2c354f3..c33fedb 100644 (file)
--- a/configs/at91sam9263ek_norflash_defconfig
+++ b/configs/at91sam9263ek_norflash_defconfig
@@ -52,6 +52,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y

diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index 42f3dc4..8167dd1 100644 (file)
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -60,6 +60,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SMC911X=y

diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index 2be57d2..16c7a40 100644 (file)
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -45,6 +45,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index 5245643..cc73d3b 100644 (file)
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -46,6 +46,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index 7bb4e69..dab4a9f 100644 (file)
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -46,6 +46,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index 8ae2f23..0ded7cf 100644 (file)
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -47,6 +47,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 4a41e6b..e5c3706 100644 (file)
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -46,6 +46,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index 0670ffa..4c141f4 100644 (file)
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -47,6 +47,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index bf7f709..7b8b9b8 100644 (file)
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -46,6 +46,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index e1d46d3..f657cb8 100644 (file)
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -47,6 +47,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y

diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig
index 42f6087..e8301c6 100644 (file)
--- a/configs/cobra5272_defconfig
+++ b/configs/cobra5272_defconfig
@@ -50,6 +50,7 @@ CONFIG_SYS_BR7_PRELIM_BOOL=y
 CONFIG_SYS_BR7_PRELIM=0x701
 CONFIG_SYS_OR7_PRELIM=0xFF00007C
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=11
 CONFIG_USE_SYS_MAX_FLASH_BANKS=y
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y

diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig
index cb2caf4..4ad1d56 100644 (file)
--- a/configs/comtrend_ct5361_ram_defconfig
+++ b/configs/comtrend_ct5361_ram_defconfig
@@ -51,6 +51,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y

diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig
index b7174ff..dc0f7ce 100644 (file)
--- a/configs/comtrend_wap5813n_ram_defconfig
+++ b/configs/comtrend_wap5813n_ram_defconfig
@@ -51,6 +51,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y

diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig
index 8f6b8b9..00ba7d7 100644 (file)
--- a/configs/da850evm_direct_nor_defconfig
+++ b/configs/da850evm_direct_nor_defconfig
@@ -69,6 +69,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=67
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y

diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index eae073d..744ffbd 100644 (file)
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -66,6 +66,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=71
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_LPC32XX_SLC=y

diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig
index 4cf03ab..378de4b 100644 (file)
--- a/configs/eb_cpu5282_defconfig
+++ b/configs/eb_cpu5282_defconfig
@@ -48,6 +48,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig
index 1178515..ef0512c 100644 (file)
--- a/configs/eb_cpu5282_internal_defconfig
+++ b/configs/eb_cpu5282_internal_defconfig
@@ -46,6 +46,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_DM_ETH=y
 CONFIG_MCFFEC=y
 CONFIG_MII=y

diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig
index 6b7cdbe..1cd0ac0 100644 (file)
--- a/configs/edminiv2_defconfig
+++ b/configs/edminiv2_defconfig
@@ -65,6 +65,7 @@ CONFIG_SYS_I2C_SLAVE=0x0
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=11
 CONFIG_MVGBE=y
 CONFIG_MII=y
 CONFIG_SYS_NS16550=y

diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 796b717..6725e3a 100644 (file)
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -71,6 +71,7 @@ CONFIG_SYS_I2C_SOFT_SLAVE=0
 CONFIG_GENERIC_ATMEL_MCI=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=32
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y

diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig
index a81aa00..cabe289 100644 (file)
--- a/configs/gazerbeam_defconfig
+++ b/configs/gazerbeam_defconfig
@@ -191,6 +191,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=135
 CONFIG_PHYLIB_10G=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_BROADCOM=y

diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig
index 2b5a587..daa6ba0 100644 (file)
--- a/configs/huawei_hg556a_ram_defconfig
+++ b/configs/huawei_hg556a_ram_defconfig
@@ -51,6 +51,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y

diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 74dfc66..1f0a864 100644 (file)
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -194,6 +194,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_ELBC=y
 CONFIG_PHY_ATHEROS=y

diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig
index 86a3bd9..a283407 100644 (file)
--- a/configs/imx8mm_evk_fspi_defconfig
+++ b/configs/imx8mm_evk_fspi_defconfig
@@ -7,13 +7,12 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x400000
+CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk"
 CONFIG_SPL_TEXT_BASE=0x7E2000
 CONFIG_TARGET_IMX8MM_EVK=y
-CONFIG_IMX_CONFIG="board/freescale/imx8mm_evk/imximage-8mm-lpddr4-fspi.cfg"
 CONFIG_SPL_MMC=y
-CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
@@ -39,6 +38,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x80000
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
 CONFIG_SPL_I2C=y
+CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_WATCHDOG=y
 CONFIG_SYS_PROMPT="u-boot=> "
@@ -78,6 +78,11 @@ CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_FSL_USDHC=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=40000000
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
@@ -96,28 +101,14 @@ CONFIG_DM_PWM=y
 CONFIG_PWM_IMX=y
 CONFIG_DM_SERIAL=y
 CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_NXP_FSPI=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
 CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
 CONFIG_IMX_WATCHDOG=y
-CONFIG_NXP_FSPI=y
-CONFIG_SPI=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_BAR=y
-CONFIG_DM_SPI=y
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SF_DEFAULT_BUS=0
-CONFIG_SF_DEFAULT_CS=0
-CONFIG_SF_DEFAULT_SPEED=40000000
-CONFIG_SF_DEFAULT_MODE=0
 CONFIG_FSPI_CONF_HEADER=y
 CONFIG_FSPI_CONF_FILE="fspi_header.bin"
-CONFIG_READ_CLK_SOURCE=0x00
-CONFIG_DEVICE_TYPE=0x01
-CONFIG_FLASH_PAD_TYPE=0x01
-CONFIG_SERIAL_CLK_FREQUENCY=0x02
-CONFIG_LUT_CUSTOM_SEQUENCE=0x00
-CONFIG_LUT_SEQUENCE="0x0b, 0x04, 0x18, 0x08, 0x08, 0x30, 0x04, 0x24"

diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig
index d885206..55269f3 100644 (file)
--- a/configs/imx8ulp_evk_defconfig
+++ b/configs/imx8ulp_evk_defconfig
@@ -66,7 +66,6 @@ CONFIG_IMX_RGPIO2P=y
 CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_IMX_LPI2C=y
-CONFIG_MISC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_FSL_USDHC=y

diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig
index 1f59f7e..a721279 100644 (file)
--- a/configs/imx93_11x11_evk_defconfig
+++ b/configs/imx93_11x11_evk_defconfig
@@ -75,6 +75,8 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="eth0"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM=y
 CONFIG_REGMAP=y
@@ -83,7 +85,6 @@ CONFIG_IMX_RGPIO2P=y
 CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_IMX_LPI2C=y
-CONFIG_SYS_I2C_SPEED=100000
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
@@ -113,5 +114,3 @@ CONFIG_FSL_LPUART=y
 CONFIG_ULP_WATCHDOG=y
 CONFIG_LZO=y
 CONFIG_BZIP2=y
-CONFIG_USE_ETHPRIME=y
-CONFIG_ETHPRIME="eth0"

diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig
index 5f4ec5f..644876e 100644 (file)
--- a/configs/integratorap_cm720t_defconfig
+++ b/configs/integratorap_cm720t_defconfig
@@ -30,7 +30,9 @@ CONFIG_SYS_RX_ETH_BUFFER=8
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig
index fb86b7c..9cc8070 100644 (file)
--- a/configs/integratorap_cm920t_defconfig
+++ b/configs/integratorap_cm920t_defconfig
@@ -30,7 +30,9 @@ CONFIG_SYS_RX_ETH_BUFFER=8
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig
index 6bf08cd..9f7371f 100644 (file)
--- a/configs/integratorap_cm926ejs_defconfig
+++ b/configs/integratorap_cm926ejs_defconfig
@@ -30,7 +30,9 @@ CONFIG_SYS_RX_ETH_BUFFER=8
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig
index 97c44f3..3f7f3e4 100644 (file)
--- a/configs/integratorap_cm946es_defconfig
+++ b/configs/integratorap_cm946es_defconfig
@@ -30,7 +30,9 @@ CONFIG_SYS_RX_ETH_BUFFER=8
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig
index 89cfa9b..95d82b5 100644 (file)
--- a/configs/integratorcp_cm1136_defconfig
+++ b/configs/integratorcp_cm1136_defconfig
@@ -33,7 +33,9 @@ CONFIG_BOOTFILE="uImage"
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=64
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig
index d895ba4..61191e2 100644 (file)
--- a/configs/integratorcp_cm920t_defconfig
+++ b/configs/integratorcp_cm920t_defconfig
@@ -33,7 +33,9 @@ CONFIG_BOOTFILE="uImage"
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=64
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig
index 9cf449c..b8b27da 100644 (file)
--- a/configs/integratorcp_cm926ejs_defconfig
+++ b/configs/integratorcp_cm926ejs_defconfig
@@ -33,7 +33,9 @@ CONFIG_BOOTFILE="uImage"
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=64
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig
index bcbcde2..60e0979 100644 (file)
--- a/configs/integratorcp_cm946es_defconfig
+++ b/configs/integratorcp_cm946es_defconfig
@@ -33,7 +33,9 @@ CONFIG_BOOTFILE="uImage"
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=64
 CONFIG_BAUDRATE=38400
 CONFIG_OF_LIBFDT=y

diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index a0c9244..dcc0b29 100644 (file)
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -12,7 +12,6 @@ CONFIG_TARGET_KMCENT2=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y
-CONFIG_SYS_FSL_CPC=y
 CONFIG_SYS_CACHE_STASHING=y
 # CONFIG_DEEP_SLEEP is not set
 CONFIG_PCIE1=y
@@ -73,8 +72,10 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig
index 9a944ca..58191c1 100644 (file)
--- a/configs/kzm9g_defconfig
+++ b/configs/kzm9g_defconfig
@@ -37,6 +37,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SMC911X=y
 CONFIG_SMC911X_BASE=0x10000000

diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 92fa4f0..778f22a 100644 (file)
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -79,7 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index fcbaf9b..bf6ddb6 100644 (file)
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -79,7 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 19a21f4..da92ac1 100644 (file)
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -111,7 +111,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 727475f..ee2c6b8 100644 (file)
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -78,7 +78,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 82c6a1b..484ff02 100644 (file)
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -81,7 +81,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 438a8ec..c19fd26 100644 (file)
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -81,7 +81,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index cbb7c55..66cee0b 100644 (file)
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -109,7 +109,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index b86a60f..7356b3d 100644 (file)
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -65,7 +65,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y

diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index 0410249..fdf66f6 100644 (file)
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -68,7 +68,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y

diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index 82e3b39..55b30d3 100644 (file)
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -68,7 +68,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y

diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index d247d11..118a085 100644 (file)
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -96,7 +96,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y

diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 855657c..c87581d 100644 (file)
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -96,7 +96,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y

diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 364a347..d7ff7e2 100644 (file)
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -79,7 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 7b083b3..462fad1 100644 (file)
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -79,7 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 7446f01..63287ca 100644 (file)
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -108,7 +108,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 6dd797c..fc72f4c 100644 (file)
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -80,7 +80,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 53f19a3..172ab72 100644 (file)
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -106,7 +106,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index 1ebe893..b414d40 100644 (file)
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -76,7 +76,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index d04d1d9..9bac24a 100644 (file)
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -85,7 +85,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 787c8f9..0a40bf0 100644 (file)
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -62,7 +62,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 341fb0f..f27eadf 100644 (file)
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -65,7 +65,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 305734d..da23382 100644 (file)
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -85,7 +85,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 56cdef8..2be08bb 100644 (file)
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -92,7 +92,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y

diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index bf2805d..d9b841d 100644 (file)
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -86,7 +86,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index f1370b5..79feb55 100644 (file)
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -90,7 +90,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index 12ccb78..3aafd10 100644 (file)
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -61,7 +61,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index db52294..f9cb304 100644 (file)
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -67,7 +67,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index fdeedca..3a71185 100644 (file)
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -76,7 +76,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index a66099c..35abfb3 100644 (file)
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -79,7 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index 835159d..5316c80 100644 (file)
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -79,7 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index 2a70d66..8550190 100644 (file)
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -106,7 +106,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 11554a8..6cdc78d 100644 (file)
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -107,7 +107,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
index 7fd2412..7efa5cb 100644 (file)
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@@ -76,7 +76,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index 52d3d30..3846b95 100644 (file)
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -85,7 +85,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y

diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index 64d87ae..aca271a 100644 (file)
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -75,7 +75,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
@@ -86,6 +89,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
index 3af10a0..9bed029 100644 (file)
--- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
@@ -81,6 +81,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig
index 55a5389..4a56e43 100644 (file)
--- a/configs/ls1088aqds_qspi_defconfig
+++ b/configs/ls1088aqds_qspi_defconfig
@@ -84,6 +84,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index d3b0684..d203fb9 100644 (file)
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -95,7 +95,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
@@ -105,6 +108,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index fa1f71d..1bd83af 100644 (file)
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -103,6 +103,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index af5ecad..c59de47 100644 (file)
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -83,7 +83,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
@@ -100,6 +103,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_MDIO_MUX=y

diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
index b4cae48..aa9bc8a 100644 (file)
--- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
@@ -78,6 +78,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y

diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 452ee83..2459212 100644 (file)
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -81,6 +81,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y

diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index e36512e..fc222b5 100644 (file)
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -100,6 +100,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y

diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 2f81a13..eba206d 100644 (file)
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -100,6 +100,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y

diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index b5f556d..347cc60 100644 (file)
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -77,6 +77,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y

diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index 3af7828..362b4be 100644 (file)
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -83,6 +83,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y

diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 91cb2df..afb4e48 100644 (file)
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -56,6 +56,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
@@ -64,7 +65,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
@@ -78,6 +82,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 8aef83a..15dadeb 100644 (file)
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -59,6 +59,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
@@ -67,7 +68,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
@@ -81,6 +85,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index 1d841af..9fc1801 100644 (file)
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -79,6 +79,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
@@ -97,6 +98,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 302de32..d2dd95e 100644 (file)
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -60,6 +60,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
@@ -77,6 +78,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index e972842..e2e4cfd 100644 (file)
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -74,6 +74,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
@@ -91,6 +92,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y

diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 4fab4fb..5378876 100644 (file)
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -60,6 +60,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
@@ -67,7 +68,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
@@ -77,6 +81,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x580980000
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_NVME_PCI=y

diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index c3327cd..6570a46 100644 (file)
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -63,6 +63,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
@@ -70,7 +71,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
@@ -80,6 +84,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x580980000
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_NVME_PCI=y

diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 6c7b49b..7c87f89 100644 (file)
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -83,6 +83,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
 CONFIG_FSL_ESDHC=y
@@ -90,7 +91,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
@@ -99,6 +103,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x980000
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_NVME_PCI=y

diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index fb7faa4..a426d6d 100644 (file)
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -61,6 +61,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x57
@@ -72,6 +73,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x980000
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_NVME_PCI=y

diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index dc0f6f8..f082fa5 100644 (file)
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -66,6 +66,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -78,7 +79,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
@@ -92,6 +96,8 @@ CONFIG_PHYLIB_10G=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_TERANETICS=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_MDIO_MUX=y

diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index b86f816..1972fc9 100644 (file)
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -56,6 +56,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
@@ -71,6 +72,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x980000
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 9e08552..dedc191 100644 (file)
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -63,6 +63,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_EARLY_INIT=y
@@ -78,6 +79,8 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_CORTINA_FW_ADDR=0x980000
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index 8d970cc..1674a2c 100644 (file)
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -61,6 +61,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -72,7 +73,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
@@ -83,6 +87,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index d70d3cb..071db6b 100644 (file)
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -68,6 +68,7 @@ CONFIG_DDR_CLK_FREQ=133333333
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -79,7 +80,10 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=1024
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
@@ -91,6 +95,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index b2bc71a..84aea7f 100644 (file)
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -61,6 +61,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -82,6 +83,8 @@ CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_MDIO_MUX=y

diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 32e47c3..7fce30b 100644 (file)
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -68,6 +68,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -89,6 +90,8 @@ CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_MDIO_MUX=y

diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index a758a4d..42efefa 100644 (file)
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -59,6 +59,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -75,6 +76,8 @@ CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index e6e7940..85ee4ca 100644 (file)
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -67,6 +67,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -84,6 +85,8 @@ CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
index bbdcb89..547c868 100644 (file)
--- a/configs/lx2160ardb_tfa_stmm_defconfig
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -67,6 +67,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -84,6 +85,8 @@ CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index bb81e56..4210084 100644 (file)
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -63,6 +63,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -84,6 +85,8 @@ CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_MDIO_MUX=y

diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index 216ac80..dd1c076 100644 (file)
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -70,6 +70,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -92,6 +93,8 @@ CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_MDIO_MUX=y

diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index b7a4238..70faef8 100644 (file)
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -71,6 +71,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y
 CONFIG_DIMM_SLOTS_PER_CTLR=2
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_SYS_FSL_DDR_INTLV_256B=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -93,6 +94,8 @@ CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_NO_FW_UPLOAD=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_VITESSE=y
+CONFIG_FSL_MEMAC=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_DM_MDIO_MUX=y

diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index e55b4a4..60a8815 100644 (file)
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -38,6 +38,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
 CONFIG_PCI_MSC01=y

diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index 6c6492d..b4b0320 100644 (file)
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -40,6 +40,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
 CONFIG_PCI_MSC01=y

diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index 3aff68b..ade98e6 100644 (file)
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -37,6 +37,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
 CONFIG_PCI_MSC01=y

diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index e268fb6..ef31afe 100644 (file)
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -39,6 +39,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=128
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
 CONFIG_PCI_MSC01=y

diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index 80b59cb..1fae517 100644 (file)
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -64,6 +64,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y

diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index 6984256..111c0f0 100644 (file)
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -61,6 +61,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y

diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig
index ad61859..192bf98 100644 (file)
--- a/configs/microblaze-generic_defconfig
+++ b/configs/microblaze-generic_defconfig
@@ -66,9 +66,11 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=2048
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig
index ee83cd4..cf251ab 100644 (file)
--- a/configs/octeon_ebb7304_defconfig
+++ b/configs/octeon_ebb7304_defconfig
@@ -52,9 +52,11 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig
index ab5dfad..6702df0 100644 (file)
--- a/configs/omap35_logic_somlv_defconfig
+++ b/configs/omap35_logic_somlv_defconfig
@@ -77,6 +77,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000

diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig
index 8c5bc19..b161fe2 100644 (file)
--- a/configs/omap3_logic_somlv_defconfig
+++ b/configs/omap3_logic_somlv_defconfig
@@ -78,6 +78,7 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW_DETECTION_SW=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000

diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig
index bc58a63..e1cbc0c 100644 (file)
--- a/configs/pg_wcom_expu1_defconfig
+++ b/configs/pg_wcom_expu1_defconfig
@@ -81,8 +81,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig
index 5d70160..a381c8f 100644 (file)
--- a/configs/pg_wcom_expu1_update_defconfig
+++ b/configs/pg_wcom_expu1_update_defconfig
@@ -79,8 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig
index a604d32..39c43ec 100644 (file)
--- a/configs/pg_wcom_seli8_defconfig
+++ b/configs/pg_wcom_seli8_defconfig
@@ -81,8 +81,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig
index dfd6d62..3e05759 100644 (file)
--- a/configs/pg_wcom_seli8_update_defconfig
+++ b/configs/pg_wcom_seli8_update_defconfig
@@ -79,8 +79,10 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_FSL_IFC=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig
index 6922380..a5256b7 100644 (file)
--- a/configs/pm9261_defconfig
+++ b/configs/pm9261_defconfig
@@ -48,6 +48,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y

diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig
index 2b4a844..b7a8124 100644 (file)
--- a/configs/pm9263_defconfig
+++ b/configs/pm9263_defconfig
@@ -52,6 +52,7 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SYS_NAND_USE_FLASH_BBT is not set
 CONFIG_NAND_ATMEL=y

diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
index f7c93ba..8d7bc19 100644 (file)
--- a/configs/qemu_arm64_defconfig
+++ b/configs/qemu_arm64_defconfig
@@ -50,6 +50,7 @@ CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y

diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
index 5094547..b2bc149 100644 (file)
--- a/configs/qemu_arm_defconfig
+++ b/configs/qemu_arm_defconfig
@@ -52,6 +52,7 @@ CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_ETH=y

diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index 2beda3a..3af338c 100644 (file)
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -45,6 +45,7 @@ CONFIG_CLK=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_DM_ETH=y
 CONFIG_E1000=y
 CONFIG_EEPRO100=y

diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index e667d23..04ad54e 100644 (file)
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -83,7 +83,9 @@ CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_RENESAS_RPC_HF=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index afccf86..de25e52 100644 (file)
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -77,6 +77,7 @@ CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_RENESAS_RPC_HF=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig
index d423ad7..9491b78 100644 (file)
--- a/configs/rcar3_salvator-x_defconfig
+++ b/configs/rcar3_salvator-x_defconfig
@@ -86,7 +86,9 @@ CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_RENESAS_RPC_HF=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig
index 341abe4..a7e3759 100644 (file)
--- a/configs/rcar3_ulcb_defconfig
+++ b/configs/rcar3_ulcb_defconfig
@@ -85,7 +85,9 @@ CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_RENESAS_RPC_HF=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y

diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index 40a8c02..0f06d43 100644 (file)
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -83,6 +83,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=131
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_ATMEL_NAND_HW_PMECC=y

diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index 7725115..f29a1b7 100644 (file)
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -82,6 +82,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=131
 CONFIG_NAND_ATMEL=y
 CONFIG_PMECC_CAP=4
 CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y

diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 4e85807..cfd6ae1 100644 (file)
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -84,6 +84,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=131
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_ATMEL=y
 CONFIG_ATMEL_NAND_HW_PMECC=y

diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig
index df008b7..4334182 100644 (file)
--- a/configs/sfr_nb4-ser_ram_defconfig
+++ b/configs/sfr_nb4-ser_ram_defconfig
@@ -53,6 +53,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y

diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 60a38ab..2515861 100644 (file)
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -73,6 +73,8 @@ CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_MTD_RAW_NAND=y
 CONFIG_PHY_ATHEROS=y

diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig
index 6461065..aa4e98a 100644 (file)
--- a/configs/stm32746g-eval_defconfig
+++ b/configs/stm32746g-eval_defconfig
@@ -42,6 +42,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig
index 753a4b8..feba985 100644 (file)
--- a/configs/stm32746g-eval_spl_defconfig
+++ b/configs/stm32746g-eval_spl_defconfig
@@ -63,6 +63,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index fde427a..b347347 100644 (file)
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -32,4 +32,5 @@ CONFIG_ENV_IS_IN_FLASH=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=12
 CONFIG_SYS_MAX_FLASH_BANKS=2

diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig
index e2c41b0..98c0507 100644 (file)
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -31,4 +31,5 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ARM_PL180_MMCI=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=12
 CONFIG_SYS_MAX_FLASH_BANKS=2

diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig
index c7dbc69..c27f760 100644 (file)
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -33,6 +33,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=12
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index e3f80ab..61d6daa 100644 (file)
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -42,6 +42,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig
index 927d28d..0368ece 100644 (file)
--- a/configs/stm32f746-disco_spl_defconfig
+++ b/configs/stm32f746-disco_spl_defconfig
@@ -63,6 +63,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig
index b7e9ee9..c177bd8 100644 (file)
--- a/configs/stm32f769-disco_defconfig
+++ b/configs/stm32f769-disco_defconfig
@@ -41,6 +41,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig
index bae28b4..7515574 100644 (file)
--- a/configs/stm32f769-disco_spl_defconfig
+++ b/configs/stm32f769-disco_spl_defconfig
@@ -62,6 +62,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_STM32_FLASH=y
+CONFIG_SYS_MAX_FLASH_SECT=8
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y

diff --git a/configs/ten64_tfa_defconfig b/configs/ten64_tfa_defconfig
index 4bbee30..dad6c2d 100644 (file)
--- a/configs/ten64_tfa_defconfig
+++ b/configs/ten64_tfa_defconfig
@@ -71,6 +71,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_VITESSE=y
+CONFIG_SYS_MEMAC_LITTLE_ENDIAN=y
 CONFIG_DM_ETH=y
 CONFIG_DM_MDIO=y
 CONFIG_E1000=y

diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig
index 2cb17f5..ab13ac8 100644 (file)
--- a/configs/total_compute_defconfig
+++ b/configs/total_compute_defconfig
@@ -53,7 +53,9 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_LIBAVB=y
 CONFIG_OF_LIBFDT_OVERLAY=y

diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 792bcf1..cf3ffc7 100644 (file)
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -30,8 +30,10 @@ CONFIG_CMD_UBI=y
 CONFIG_MTD=y
 CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=259
 CONFIG_DM_ETH=y
 CONFIG_PCI=y
 CONFIG_USB=y

diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index 0ae8ae1..39d96fe 100644 (file)
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -27,6 +27,8 @@ CONFIG_CMD_UBI=y
 CONFIG_MTD=y
 CONFIG_SYS_FLASH_CFI_WIDTH_32BIT=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=256
 CONFIG_VIRTIO_MMIO=y

diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig
index f208489..8817c4e 100644 (file)
--- a/configs/vexpress_ca9x4_defconfig
+++ b/configs/vexpress_ca9x4_defconfig
@@ -45,8 +45,10 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=259
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_DM_ETH=y
 CONFIG_SMC911X=y

diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index b3834b4..7beb591 100644 (file)
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -111,6 +111,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_ZYNQ=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y

diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig
index eab40fc..966b0eb 100644 (file)
--- a/configs/xtfpga_defconfig
+++ b/configs/xtfpga_defconfig
@@ -39,8 +39,10 @@ CONFIG_DM=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_16BIT=y
+CONFIG_SYS_FLASH_EMPTY_INFO=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_MAX_FLASH_SECT=1027
 CONFIG_PHYLIB=y
 CONFIG_DM_ETH=y
 CONFIG_ETHOC=y

diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
index ecdbf81..59cd19e 100644 (file)
--- a/configs/zynq_cse_nor_defconfig
+++ b/configs/zynq_cse_nor_defconfig
@@ -78,5 +78,6 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_SYS_FLASH_QUIET_TEST=y
 CONFIG_ARM_DCC=y
 # CONFIG_GZIP is not set

diff --git a/doc/arch/m68k.rst b/doc/arch/m68k.rst
index 698e288..87a51e5 100644 (file)
--- a/doc/arch/m68k.rst
+++ b/doc/arch/m68k.rst
@@ -114,8 +114,6 @@ apply to one or more cpu for the ColdFire family:
 
 CONFIG_SYS_MBAR:
   defines the base address of the MCF5272 configuration registers
-CONFIG_SYS_ENET_BD_BASE:
-  defines the base address of the FEC buffer descriptors
 CONFIG_SYS_SCR:
   defines the contents of the System Configuration Register
 CONFIG_SYS_SPR:

diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index d93ed8d..22400a9 100644 (file)
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -182,6 +182,13 @@ config SYS_DDR_RAW_TIMING
          timing parameters are extracted from datasheet and hard-coded into
          header files or board specific files.
 
+config SYS_FSL_DDR_INTLV_256B
+       bool "Enforce 256-byte interleave"
+       help
+         DDR controller interleaving on 256-byte. This is a special
+         interleaving mode, handled by Dickens for Freescale layerscape SoCs
+         with ARM core.
+
 endif
 
 menu "PowerPC / M68K initial memory controller definitions (FLASH, SDRAM, etc)"

diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
index 25a9c81..2dae159 100644 (file)
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -4,7 +4,6 @@
  */
 
 #include <common.h>
-#include <flash.h>
 #include <malloc.h>
 #include <errno.h>
 #include <div64.h>

diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
index 98eccc3..bdfdf26 100644 (file)
--- a/drivers/fastboot/fb_command.c
+++ b/drivers/fastboot/fb_command.c
@@ -10,7 +10,6 @@
 #include <fastboot-internal.h>
 #include <fb_mmc.h>
 #include <fb_nand.h>
-#include <flash.h>
 #include <part.h>
 #include <stdlib.h>
 

diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index c62e414..033c510 100644 (file)
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -10,7 +10,6 @@
 #include <fastboot.h>
 #include <fastboot-internal.h>
 #include <fb_mmc.h>
-#include <flash.h>
 #include <image-sparse.h>
 #include <image.h>
 #include <log.h>

diff --git a/drivers/fastboot/fb_nand.c b/drivers/fastboot/fb_nand.c
index eb8a36f..6d3a900 100644 (file)
--- a/drivers/fastboot/fb_nand.c
+++ b/drivers/fastboot/fb_nand.c
@@ -7,7 +7,6 @@
 #include <config.h>
 #include <common.h>
 #include <blk.h>
-#include <flash.h>
 
 #include <fastboot.h>
 #include <image-sparse.h>

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 82a8bca..7e4c357 100644 (file)
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -70,7 +70,7 @@ config GPIO_HOG
 
 config SPL_GPIO_HOG
        bool "Enable GPIO hog support in SPL"
-       depends on SPL_GPIO_SUPPORT
+       depends on SPL_GPIO
        help
          Enable gpio hog support in SPL
          The GPIO chip may contain GPIO hog definitions. GPIO hogging

diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index e131ecc..621d175 100644 (file)
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -18,7 +18,6 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
-#include <flash.h>
 #include <i2c.h>
 #include <cros_ec.h>
 #include <fdtdec.h>

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 3d1f6e4..fcdb450 100644 (file)
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -106,6 +106,10 @@ config SYS_FLASH_USE_BUFFER_WRITE
        help
          Use buffered writes to flash.
 
+config SYS_FLASH_EMPTY_INFO
+       bool "Enable displaying empty sectors in flash info"
+       depends on FLASH_CFI_DRIVER
+
 config FLASH_CFI_MTD
        bool "Enable CFI MTD driver"
        depends on FLASH_CFI_DRIVER
@@ -128,6 +132,21 @@ config SYS_FLASH_CFI
          Define if the flash driver uses extra elements in the
          common flash structure for storing flash geometry.
 
+config SYS_FLASH_QUIET_TEST
+       bool "Disable printing a warning about not recognizing some flash banks"
+       depends on FLASH_CFI_DRIVER
+       help
+         If this option is enabled, the common CFI flash doesn't print it's
+         warning upon not recognized FLASH banks. This is useful, if some of
+         the configured banks are only optionally available.
+
+config SYS_FLASH_CHECKSUM
+       bool "Compute and print flash CRC if 'flashchecksum' is set in the environment"
+       depends on MTD_NOR_FLASH
+       help
+         If the variable flashchecksum is set in the environment, perform a CRC
+         of the flash and print the value to console.
+
 config ALTERA_QSPI
        bool "Altera Generic Quad SPI Controller"
        depends on DM_MTD
@@ -138,14 +157,6 @@ config ALTERA_QSPI
          NOR flash to parallel flash interface. Please find details on the
          "Embedded Peripherals IP User Guide" of Altera.
 
-config FLASH_PIC32
-       bool "Microchip PIC32 Flash driver"
-       depends on MACH_PIC32 && DM_MTD
-       select USE_SYS_MAX_FLASH_BANKS
-       help
-         This enables access to Microchip PIC32 internal non-CFI flash
-         chips through PIC32 Non-Volatile-Memory Controller.
-
 config RENESAS_RPC_HF
        bool "Renesas RCar Gen3 RPC HyperFlash driver"
        depends on RCAR_GEN3 && DM_MTD
@@ -168,6 +179,11 @@ config STM32_FLASH
         This is the driver of embedded flash for some STMicroelectronics
         STM32 MCU.
 
+config SYS_MAX_FLASH_SECT
+       int "Maximumm number of sectors on a flash chip"
+       depends on MTD_NOR_FLASH || FLASH_CFI_DRIVER
+       default 512
+
 config SAMSUNG_ONENAND
        bool "Samsung OneNAND driver support"
 

diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index ce04511..3a78590 100644 (file)
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -11,7 +11,6 @@ mtd-$(CONFIG_ALTERA_QSPI) += altera_qspi.o
 mtd-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o
 mtd-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o
 mtd-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o
-mtd-$(CONFIG_FLASH_PIC32) += pic32_flash.o
 mtd-$(CONFIG_STM32_FLASH) += stm32_flash.o
 mtd-$(CONFIG_RENESAS_RPC_HF) += renesas_rpc_hf.o
 mtd-$(CONFIG_HBMC_AM654) += hbmc-am654.o

diff --git a/drivers/mtd/pic32_flash.c b/drivers/mtd/pic32_flash.c
deleted file mode 100644 (file)
index ea0dbe9..0000000
--- a/drivers/mtd/pic32_flash.c
+++ /dev/null
@@ -1,448 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2015
- * Cristian Birsan <cristian.birsan@microchip.com>
- * Purna Chandra Mandal <purna.mandal@microchip.com>
- */
-
-#include <common.h>
-#include <cpu_func.h>
-#include <dm.h>
-#include <fdt_support.h>
-#include <flash.h>
-#include <init.h>
-#include <irq_func.h>
-#include <asm/global_data.h>
-#include <linux/bitops.h>
-#include <mach/pic32.h>
-#include <wait_bit.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* NVM Controller registers */
-struct pic32_reg_nvm {
-       struct pic32_reg_atomic ctrl;
-       struct pic32_reg_atomic key;
-       struct pic32_reg_atomic addr;
-       struct pic32_reg_atomic data;
-};
-
-/* NVM operations */
-#define NVMOP_NOP              0
-#define NVMOP_WORD_WRITE       1
-#define NVMOP_PAGE_ERASE       4
-
-/* NVM control bits */
-#define NVM_WR                 BIT(15)
-#define NVM_WREN               BIT(14)
-#define NVM_WRERR              BIT(13)
-#define NVM_LVDERR             BIT(12)
-
-/* NVM programming unlock register */
-#define LOCK_KEY               0x0
-#define UNLOCK_KEY1            0xaa996655
-#define UNLOCK_KEY2            0x556699aa
-
-/*
- * PIC32 flash banks consist of number of pages, each page
- * into number of rows and rows into number of words.
- * Here we will maintain page information instead of sector.
- */
-flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
-static struct pic32_reg_nvm *nvm_regs_p;
-
-static inline void flash_initiate_operation(u32 nvmop)
-{
-       /* set operation */
-       writel(nvmop, &nvm_regs_p->ctrl.raw);
-
-       /* enable flash write */
-       writel(NVM_WREN, &nvm_regs_p->ctrl.set);
-
-       /* unlock sequence */
-       writel(LOCK_KEY, &nvm_regs_p->key.raw);
-       writel(UNLOCK_KEY1, &nvm_regs_p->key.raw);
-       writel(UNLOCK_KEY2, &nvm_regs_p->key.raw);
-
-       /* initiate operation */
-       writel(NVM_WR, &nvm_regs_p->ctrl.set);
-}
-
-static int flash_wait_till_busy(const char *func, ulong timeout)
-{
-       int ret = wait_for_bit_le32(&nvm_regs_p->ctrl.raw,
-                                   NVM_WR, false, timeout, false);
-
-       return ret ? ERR_TIMEOUT : ERR_OK;
-}
-
-static inline int flash_complete_operation(void)
-{
-       u32 tmp;
-
-       tmp = readl(&nvm_regs_p->ctrl.raw);
-       if (tmp & NVM_WRERR) {
-               printf("Error in Block Erase - Lock Bit may be set!\n");
-               flash_initiate_operation(NVMOP_NOP);
-               return ERR_PROTECTED;
-       }
-
-       if (tmp & NVM_LVDERR) {
-               printf("Error in Block Erase - low-vol detected!\n");
-               flash_initiate_operation(NVMOP_NOP);
-               return ERR_NOT_ERASED;
-       }
-
-       /* disable flash write or erase operation */
-       writel(NVM_WREN, &nvm_regs_p->ctrl.clr);
-
-       return ERR_OK;
-}
-
-/*
- * Erase flash sectors, returns:
- * ERR_OK - OK
- * ERR_INVAL - invalid sector arguments
- * ERR_TIMEOUT - write timeout
- * ERR_NOT_ERASED - Flash not erased
- * ERR_UNKNOWN_FLASH_VENDOR - incorrect flash
- */
-int flash_erase(flash_info_t *info, int s_first, int s_last)
-{
-       ulong sect_start, sect_end, flags;
-       int prot, sect;
-       int rc;
-
-       if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_MCHP) {
-               printf("Can't erase unknown flash type %08lx - aborted\n",
-                      info->flash_id);
-               return ERR_UNKNOWN_FLASH_VENDOR;
-       }
-
-       if ((s_first < 0) || (s_first > s_last)) {
-               printf("- no sectors to erase\n");
-               return ERR_INVAL;
-       }
-
-       prot = 0;
-       for (sect = s_first; sect <= s_last; ++sect) {
-               if (info->protect[sect])
-                       prot++;
-       }
-
-       if (prot)
-               printf("- Warning: %d protected sectors will not be erased!\n",
-                      prot);
-       else
-               printf("\n");
-
-       /* erase on unprotected sectors */
-       for (sect = s_first; sect <= s_last; sect++) {
-               if (info->protect[sect])
-                       continue;
-
-               /* disable interrupts */
-               flags = disable_interrupts();
-
-               /* write destination page address (physical) */
-               sect_start = CPHYSADDR(info->start[sect]);
-               writel(sect_start, &nvm_regs_p->addr.raw);
-
-               /* page erase */
-               flash_initiate_operation(NVMOP_PAGE_ERASE);
-
-               /* wait */
-               rc = flash_wait_till_busy(__func__,
-                                         CONFIG_SYS_FLASH_ERASE_TOUT);
-
-               /* re-enable interrupts if necessary */
-               if (flags)
-                       enable_interrupts();
-
-               if (rc != ERR_OK)
-                       return rc;
-
-               rc = flash_complete_operation();
-               if (rc != ERR_OK)
-                       return rc;
-
-               /*
-                * flash content is updated but cache might contain stale
-                * data, so invalidate dcache.
-                */
-               sect_end = info->start[sect] + info->size / info->sector_count;
-               invalidate_dcache_range(info->start[sect], sect_end);
-       }
-
-       printf(" done\n");
-       return ERR_OK;
-}
-
-int page_erase(flash_info_t *info, int sect)
-{
-       return 0;
-}
-
-/* Write a word to flash */
-static int write_word(flash_info_t *info, ulong dest, ulong word)
-{
-       ulong flags;
-       int rc;
-
-       /* read flash to check if it is sufficiently erased */
-       if ((readl((void __iomem *)dest) & word) != word) {
-               printf("Error, Flash not erased!\n");
-               return ERR_NOT_ERASED;
-       }
-
-       /* disable interrupts */
-       flags = disable_interrupts();
-
-       /* update destination page address (physical) */
-       writel(CPHYSADDR(dest), &nvm_regs_p->addr.raw);
-       writel(word, &nvm_regs_p->data.raw);
-
-       /* word write */
-       flash_initiate_operation(NVMOP_WORD_WRITE);
-
-       /* wait for operation to complete */
-       rc = flash_wait_till_busy(__func__, CONFIG_SYS_FLASH_WRITE_TOUT);
-
-       /* re-enable interrupts if necessary */
-       if (flags)
-               enable_interrupts();
-
-       if (rc != ERR_OK)
-               return rc;
-
-       return flash_complete_operation();
-}
-
-/*
- * Copy memory to flash, returns:
- * ERR_OK - OK
- * ERR_TIMEOUT - write timeout
- * ERR_NOT_ERASED - Flash not erased
- */
-int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
-{
-       ulong dst, tmp_le, len = cnt;
-       int i, l, rc;
-       uchar *cp;
-
-       /* get lower word aligned address */
-       dst = (addr & ~3);
-
-       /* handle unaligned start bytes */
-       l = addr - dst;
-       if (l != 0) {
-               tmp_le = 0;
-               for (i = 0, cp = (uchar *)dst; i < l; ++i, ++cp)
-                       tmp_le |= *cp << (i * 8);
-
-               for (; (i < 4) && (cnt > 0); ++i, ++src, --cnt, ++cp)
-                       tmp_le |= *src << (i * 8);
-
-               for (; (cnt == 0) && (i < 4); ++i, ++cp)
-                       tmp_le |= *cp << (i * 8);
-
-               rc = write_word(info, dst, tmp_le);
-               if (rc)
-                       goto out;
-
-               dst += 4;
-       }
-
-       /* handle word aligned part */
-       while (cnt >= 4) {
-               tmp_le = src[0] | src[1] << 8 | src[2] << 16 | src[3] << 24;
-               rc = write_word(info, dst, tmp_le);
-               if (rc)
-                       goto out;
-               src += 4;
-               dst += 4;
-               cnt -= 4;
-       }
-
-       if (cnt == 0) {
-               rc = ERR_OK;
-               goto out;
-       }
-
-       /* handle unaligned tail bytes */
-       tmp_le = 0;
-       for (i = 0, cp = (uchar *)dst; (i < 4) && (cnt > 0); ++i, ++cp) {
-               tmp_le |= *src++ << (i * 8);
-               --cnt;
-       }
-
-       for (; i < 4; ++i, ++cp)
-               tmp_le |= *cp << (i * 8);
-
-       rc = write_word(info, dst, tmp_le);
-out:
-       /*
-        * flash content updated by nvm controller but CPU cache might
-        * have stale data, so invalidate dcache.
-        */
-       invalidate_dcache_range(addr, addr + len);
-
-       printf(" done\n");
-       return rc;
-}
-
-void flash_print_info(flash_info_t *info)
-{
-       int i;
-
-       if (info->flash_id == FLASH_UNKNOWN) {
-               printf("missing or unknown FLASH type\n");
-               return;
-       }
-
-       switch (info->flash_id & FLASH_VENDMASK) {
-       case FLASH_MAN_MCHP:
-               printf("Microchip Technology ");
-               break;
-       default:
-               printf("Unknown Vendor ");
-               break;
-       }
-
-       switch (info->flash_id & FLASH_TYPEMASK) {
-       case FLASH_MCHP100T:
-               printf("Internal (8 Mbit, 64 x 16k)\n");
-               break;
-       default:
-               printf("Unknown Chip Type\n");
-               break;
-       }
-
-       printf("  Size: %ld MB in %d Sectors\n",
-              info->size >> 20, info->sector_count);
-
-       printf("  Sector Start Addresses:");
-       for (i = 0; i < info->sector_count; ++i) {
-               if ((i % 5) == 0)
-                       printf("\n   ");
-
-               printf(" %08lX%s", info->start[i],
-                      info->protect[i] ? " (RO)" : "     ");
-       }
-       printf("\n");
-}
-
-unsigned long flash_init(void)
-{
-       unsigned long size = 0;
-       struct udevice *dev;
-       int bank;
-
-       /* probe every MTD device */
-       for (uclass_first_device(UCLASS_MTD, &dev); dev;
-            uclass_next_device(&dev)) {
-               /* nop */
-       }
-
-       /* calc total flash size */
-       for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank)
-               size += flash_info[bank].size;
-
-       return size;
-}
-
-static void pic32_flash_bank_init(flash_info_t *info,
-                                 ulong base, ulong size)
-{
-       ulong sect_size;
-       int sect;
-
-       /* device & manufacturer code */
-       info->flash_id = FLASH_MAN_MCHP | FLASH_MCHP100T;
-       info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
-       info->size = size;
-
-       /* update sector (i.e page) info */
-       sect_size = info->size / info->sector_count;
-       for (sect = 0; sect < info->sector_count; sect++) {
-               info->start[sect] = base;
-               /* protect each sector by default */
-               info->protect[sect] = 1;
-               base += sect_size;
-       }
-}
-
-static int pic32_flash_probe(struct udevice *dev)
-{
-       void *blob = (void *)gd->fdt_blob;
-       int node = dev_of_offset(dev);
-       const char *list, *end;
-       const fdt32_t *cell;
-       unsigned long addr, size;
-       int parent, addrc, sizec;
-       flash_info_t *info;
-       int len, idx;
-
-       /*
-        * decode regs. there are multiple reg tuples, and they need to
-        * match with reg-names.
-        */
-       parent = fdt_parent_offset(blob, node);
-       fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
-       list = fdt_getprop(blob, node, "reg-names", &len);
-       if (!list)
-               return -ENOENT;
-
-       end = list + len;
-       cell = fdt_getprop(blob, node, "reg", &len);
-       if (!cell)
-               return -ENOENT;
-
-       for (idx = 0, info = &flash_info[0]; list < end;) {
-               addr = fdt_translate_address((void *)blob, node, cell + idx);
-               size = fdt_addr_to_cpu(cell[idx + addrc]);
-               len = strlen(list);
-               if (!strncmp(list, "nvm", len)) {
-                       /* NVM controller */
-                       nvm_regs_p = ioremap(addr, size);
-               } else if (!strncmp(list, "bank", 4)) {
-                       /* Flash bank: use kseg0 cached address */
-                       pic32_flash_bank_init(info, CKSEG0ADDR(addr), size);
-                       info++;
-               }
-               idx += addrc + sizec;
-               list += len + 1;
-       }
-
-       /* disable flash write/erase operations */
-       writel(NVM_WREN, &nvm_regs_p->ctrl.clr);
-
-#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
-       /* monitor protection ON by default */
-       flash_protect(FLAG_PROTECT_SET,
-                     CONFIG_SYS_MONITOR_BASE,
-                     CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
-                     &flash_info[0]);
-#endif
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
-       /* ENV protection ON by default */
-       flash_protect(FLAG_PROTECT_SET,
-                     CONFIG_ENV_ADDR,
-                     CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
-                     &flash_info[0]);
-#endif
-       return 0;
-}
-
-static const struct udevice_id pic32_flash_ids[] = {
-       { .compatible = "microchip,pic32mzda-flash" },
-       {}
-};
-
-U_BOOT_DRIVER(pic32_flash) = {
-       .name   = "pic32_flash",
-       .id     = UCLASS_MTD,
-       .of_match = pic32_flash_ids,
-       .probe  = pic32_flash_probe,
-};

diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index 8586781..e19e342 100644 (file)
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -10,7 +10,6 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
-#include <flash.h>
 #include <log.h>
 #include <spi.h>
 #include <spi_flash.h>

diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 0aed28a..071b25a 100644 (file)
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -4,7 +4,6 @@
  */
 
 #include <common.h>
-#include <flash.h>
 #include <malloc.h>
 #include <linux/errno.h>
 #include <linux/mtd/mtd.h>

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 8a226a7..26a356b 100644 (file)
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -10,7 +10,6 @@
  */
 
 #include <common.h>
-#include <flash.h>
 #include <log.h>
 #include <watchdog.h>
 #include <dm.h>

diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 5d90a92..93e7dbe 100644 (file)
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -357,6 +357,9 @@ config FEC_MXC
 config FMAN_ENET
        bool "Freescale FMan ethernet support"
        depends on ARM || PPC
+       select SYS_FMAN_V3 if ARCH_B4420 || ARCH_B4860 || ARCH_LS1043A || \
+               ARCH_LS1046A || ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || \
+               ARCH_T2080 || ARCH_T4240
        help
          This driver support the Freescale FMan Ethernet controller
 
@@ -370,6 +373,12 @@ config SYS_QE_FMAN_FW_LENGTH
        depends on FMAN_ENET || QE || U_QE
        default 0x10000
 
+config SYS_FMAN_V3
+       bool
+       select FSL_MEMAC
+       help
+         SoC has FMan v3 with mEMAC
+
 config FTMAC100
        bool "Ftmac100 Ethernet Support"
        help

diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index ae38412..5a7d303 100644 (file)
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -11,7 +11,6 @@ obj-y += tgec.o
 obj-y += tgec_phy.o
 
 # Soc have FMAN v3 with mEMAC
-obj-$(CONFIG_SYS_FMAN_V3) += memac_phy.o
 obj-$(CONFIG_SYS_FMAN_V3) += memac.o
 
 # SoC specific SERDES support

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 33a4b6f..52ce08b 100644 (file)
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -345,6 +345,13 @@ config PHY_NCSI
 
 endif #PHYLIB
 
+config FSL_MEMAC
+       bool "NXP mEMAC PHY support"
+
+config SYS_MEMAC_LITTLE_ENDIAN
+       bool "mEMAC is access in little endian mode"
+       depends on FSL_MEMAC || FSL_LS_MDIO
+
 config PHY_RESET_DELAY
        int "Extra delay after reset before MII register access"
        default 0

diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index 8fd5a2e..6e79868 100644 (file)
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -12,6 +12,7 @@ config DM_PWM
 config PWM_ASPEED
        bool "Enable support for the Aspeed PWM"
        depends on DM_PWM
+       select SYSCON
        help
          This PWM is found on Ast2600 SoCs. It supports a programmable period
          and duty cycle. It provides 16 channels which can be independently

diff --git a/drivers/xen/events.c b/drivers/xen/events.c
index 5e90a65..532216f 100644 (file)
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -23,7 +23,9 @@
 #include <xen/events.h>
 #include <xen/hvm.h>
 
+#if CONFIG_IS_ENABLED(XEN_SERIAL)
 extern u32 console_evtchn;
+#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */
 
 #define NR_EVS 1024
 
@@ -51,8 +53,11 @@ void unbind_all_ports(void)
        struct vcpu_info *vcpu_info = &s->vcpu_info[cpu];
 
        for (i = 0; i < NR_EVS; i++) {
+#if CONFIG_IS_ENABLED(XEN_SERIAL)
                if (i == console_evtchn)
                        continue;
+#endif /* CONFIG_IS_ENABLED(XEN_SERIAL) */
+
                if (test_and_clear_bit(i, bound_ports)) {
                        printf("port %d still bound!\n", i);
                        unbind_evtchn(i);

diff --git a/env/flash.c b/env/flash.c
index 9c8abfa..1e75f8c 100644 (file)
--- a/env/flash.c
+++ b/env/flash.c
@@ -13,7 +13,6 @@
 #include <command.h>
 #include <env.h>
 #include <env_internal.h>
-#include <flash.h>
 #include <log.h>
 #include <asm/global_data.h>
 #include <linux/stddef.h>
@@ -26,6 +25,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_SPL_BUILD
 # if defined(CONFIG_CMD_SAVEENV) && defined(CONFIG_CMD_FLASH)
+#  include <flash.h>
 #  define CMD_SAVEENV
 # elif defined(CONFIG_ENV_ADDR_REDUND)
 #  error CONFIG_ENV_ADDR_REDUND must have CONFIG_CMD_SAVEENV & CONFIG_CMD_FLASH

diff --git a/env/sf.c b/env/sf.c
index 4b76854..a425ecc 100644 (file)
--- a/env/sf.c
+++ b/env/sf.c
@@ -12,7 +12,6 @@
 #include <dm.h>
 #include <env.h>
 #include <env_internal.h>
-#include <flash.h>
 #include <malloc.h>
 #include <spi.h>
 #include <spi_flash.h>

diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c
index 7ef48bb..6c017ce 100644 (file)
--- a/fs/cramfs/cramfs.c
+++ b/fs/cramfs/cramfs.c
@@ -25,7 +25,6 @@
  */
 
 #include <common.h>
-#include <flash.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
 #include <linux/stat.h>
@@ -43,7 +42,7 @@ struct cramfs_super super;
 /* CPU address space offset calculation macro, struct part_info offset is
  * device address space offset, so we need to shift it by a device start address. */
 #if defined(CONFIG_MTD_NOR_FLASH)
-extern flash_info_t flash_info[];
+#include <flash.h>
 #define PART_OFFSET(x) ((ulong)x->offset + \
                         flash_info[x->dev->id->num].start[0])
 #else

diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 1818e81..ef7b302 100644 (file)
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -113,7 +113,6 @@
 
 #include <common.h>
 #include <config.h>
-#include <flash.h>
 #include <malloc.h>
 #include <div64.h>
 #include <linux/compiler.h>
@@ -381,6 +380,8 @@ static void put_fl_mem_onenand(void *buf)
 
 
 #if defined(CONFIG_CMD_FLASH)
+#include <flash.h>
+
 /*
  * Support for jffs2 on top of NOR-flash
  *
@@ -392,7 +393,6 @@ static inline void *get_fl_mem_nor(u32 off, u32 size, void *ext_buf)
        u32 addr = off;
        struct mtdids *id = current_part->dev->id;
 
-       extern flash_info_t flash_info[];
        flash_info_t *flash = &flash_info[id->num];
 
        addr += flash->start[0];

diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h
index 9b4f5fc..35560ab 100644 (file)
--- a/include/configs/10m50_devboard.h
+++ b/include/configs/10m50_devboard.h
@@ -20,7 +20,6 @@
 /*
  * Flash
  */
-#define CONFIG_SYS_MAX_FLASH_SECT      1024
 
 /*
  * BOOTP options

diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h
index 2d52dc6..69fa1c1 100644 (file)
--- a/include/configs/3c120_devboard.h
+++ b/include/configs/3c120_devboard.h
@@ -19,7 +19,6 @@
 /*
  * CFI Flash
  */
-#define CONFIG_SYS_MAX_FLASH_SECT      512
 
 /*
  * MEMORY ORGANIZATION

diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index c773164..6c6469b 100644 (file)
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -82,7 +82,6 @@
 /* FLASH organization */
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        254     /* max number of sectors on one chip */
 #endif
 
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_CS0_BASE

diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 79448cf..5411641 100644 (file)
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -90,7 +90,6 @@
  */
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 #endif
 
 #define CONFIG_SYS_FLASH_BASE          (CONFIG_SYS_CS0_BASE)

diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index 1889a23..42c62b4 100644 (file)
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -77,8 +77,6 @@
 #ifdef CONFIG_SYS_FLASH_CFI
 
 #      define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
-#      define CONFIG_SYS_FLASH_CHECKSUM
 #      define CONFIG_SYS_FLASH_BANKS_LIST      { CONFIG_SYS_FLASH_BASE }
 #endif
 

diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index cac9b24..75278f4 100644 (file)
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -93,8 +93,6 @@
 
 /* FLASH organization */
 #define CONFIG_SYS_FLASH_BASE          (CONFIG_SYS_CS0_BASE)
-#define CONFIG_SYS_MAX_FLASH_SECT      2048    /* max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    1000
 
 #define FLASH_SST6401B         0x200
 #define SST_ID_xF6401B         0x236D236D
@@ -106,11 +104,9 @@
  * 0x30 is block erase in SST
  */
 #      define CONFIG_SYS_FLASH_SIZE            0x800000
-#      define CONFIG_FLASH_CFI_LEGACY
 #else
 #      define CONFIG_SYS_SST_SECT              2048
 #      define CONFIG_SYS_SST_SECTSZ            0x1000
-#      define CONFIG_SYS_FLASH_WRITE_TOUT      500
 #endif
 
 /* Cache Configuration */
@@ -129,9 +125,6 @@
 #define CONFIG_SYS_CACHE_ICACR         (CF_CACR_CENB | CF_CACR_CEIB | \
                                         CF_CACR_DBWE)
 
-/* Port configuration */
-#define CONFIG_SYS_FECI2C              0xF0
-
 #define CONFIG_SYS_CS0_BASE            0xFF800000
 #define CONFIG_SYS_CS0_MASK            0x007F0021
 #define CONFIG_SYS_CS0_CTRL            0x00001D80

diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 2fa1e43..356ad3e 100644 (file)
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -91,7 +91,6 @@
  */
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 #endif
 
 /*-----------------------------------------------------------------------

diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 292578f..35ff267 100644 (file)
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -91,8 +91,6 @@
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CONFIG_SYS_MAX_FLASH_SECT      11      /* max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    1000
 
 #define CONFIG_SYS_FLASH_SIZE          0x200000
 
@@ -124,9 +122,4 @@
 #define CONFIG_SYS_CS1_CTRL            0x00001900
 #define CONFIG_SYS_CS1_MASK            0x00070001
 
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define CONFIG_SYS_FECI2C              0x0FA0
-
 #endif /* _M5275EVB_H */

diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 9f06f41..900b0b5 100644 (file)
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -95,8 +95,6 @@
 #ifdef CONFIG_SYS_FLASH_CFI
 
 #      define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
-#      define CONFIG_SYS_FLASH_CHECKSUM
 #      define CONFIG_SYS_FLASH_BANKS_LIST      { CONFIG_SYS_FLASH_BASE }
 #endif
 

diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 4d8f752..4f82389 100644 (file)
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -99,7 +99,6 @@
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_FLASH_SPANSION_S29WS_N    1
 #      define CONFIG_SYS_FLASH_SIZE            0x1000000       /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 #endif
 
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_CS0_BASE

diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 87d3e8f..a6c953f 100644 (file)
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -92,7 +92,6 @@
  */
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 #endif
 
 #ifdef CONFIG_CMD_NAND

diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index d920587..f519bef 100644 (file)
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -94,7 +94,6 @@
  */
 #ifdef CONFIG_SYS_FLASH_CFI
 #      define CONFIG_SYS_FLASH_SIZE            0x800000        /* Max size that the board might have */
-#      define CONFIG_SYS_MAX_FLASH_SECT        137     /* max number of sectors on one chip */
 #endif
 
 #      define CONFIG_SYS_MAX_NAND_DEVICE       1

diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index 41ab860..9d06838 100644 (file)
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -69,9 +69,6 @@
 
 /* FLASH organization */
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_MAX_FLASH_SECT      35
-#define CONFIG_SYS_FLASH_ERASE_TOUT    120000
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500
 
 /*
  * For booting Linux, the board info and command line data

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index d56d603..c2f4f2b 100644 (file)
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -69,7 +69,7 @@
 /*
  * Manually set up DDR parameters
  */
-#define CONFIG_SYS_DDR_SIZE            256             /* MB */
+#define CONFIG_SYS_SDRAM_SIZE          0x10000000 /* 256 MiB */
 #define CONFIG_SYS_DDR_CS0_BNDS                0x0000000f
 #define CONFIG_SYS_DDR_CS0_CONFIG      (CSCONFIG_EN \
                                        | CSCONFIG_ODT_WR_ONLY_CURRENT \
@@ -141,15 +141,6 @@
 #define CONFIG_SYS_FLASH_BASE          0xFE000000 /* FLASH base address */
 #define CONFIG_SYS_FLASH_SIZE          8 /* max FLASH size is 32M */
 
-#define CONFIG_SYS_FLASH_EMPTY_INFO            /* display empty sectors */
-
-
-#define CONFIG_SYS_MAX_FLASH_SECT      256 /* max sectors per device */
-
-#undef CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
 /*
  * NAND Flash on the Local Bus
  */

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index c3c6807..0c710ef 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -124,12 +124,6 @@
 
 #define CONFIG_SYS_FLASH_BANKS_LIST \
        {CONFIG_SYS_FLASH_BASE_PHYS + 0x800000, CONFIG_SYS_FLASH_BASE_PHYS}
-#define CONFIG_SYS_MAX_FLASH_SECT      128             /* sectors per device */
-#undef CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 
 #define CONFIG_HWCONFIG                        /* enable hwconfig */
 

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 12a78ea..7f5eaf8 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -114,43 +114,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-/* DDR3 Controller Settings */
-#define CONFIG_SYS_DDR_CS0_BNDS                0x0000003f
-#define CONFIG_SYS_DDR_CS0_CONFIG      0x80014302
-#define CONFIG_SYS_DDR_CS0_CONFIG_2    0x00000000
-#define CONFIG_SYS_DDR_INIT_ADDR       0x00000000
-#define CONFIG_SYS_DDR_INIT_EXT_ADDR   0x00000000
-#define CONFIG_SYS_DDR_MODE_CONTROL    0x00000000
-#define CONFIG_SYS_DDR_ZQ_CONTROL      0x89080600
-#define CONFIG_SYS_DDR_SR_CNTR         0x00000000
-#define CONFIG_SYS_DDR_RCW_1           0x00000000
-#define CONFIG_SYS_DDR_RCW_2           0x00000000
-#define CONFIG_SYS_DDR_CONTROL         0xc70c0008      /* Type = DDR3  */
-#define CONFIG_SYS_DDR_CONTROL_2       0x24401000
-#define CONFIG_SYS_DDR_TIMING_4                0x00000001
-#define CONFIG_SYS_DDR_TIMING_5                0x03402400
-
-#define CONFIG_SYS_DDR_TIMING_3_800    0x00030000
-#define CONFIG_SYS_DDR_TIMING_0_800    0x00110104
-#define CONFIG_SYS_DDR_TIMING_1_800    0x6f6b8644
-#define CONFIG_SYS_DDR_TIMING_2_800    0x0FA888CF
-#define CONFIG_SYS_DDR_CLK_CTRL_800    0x03000000
-#define CONFIG_SYS_DDR_MODE_1_800      0x00441420
-#define CONFIG_SYS_DDR_MODE_2_800      0x00000000
-#define CONFIG_SYS_DDR_INTERVAL_800    0x0C300100
-#define CONFIG_SYS_DDR_WRLVL_CONTROL_800 0x8675f608
-
-/* settings for DDR3 at 667MT/s */
-#define CONFIG_SYS_DDR_TIMING_3_667            0x00010000
-#define CONFIG_SYS_DDR_TIMING_0_667            0x00110004
-#define CONFIG_SYS_DDR_TIMING_1_667            0x5d59e544
-#define CONFIG_SYS_DDR_TIMING_2_667            0x0FA890CD
-#define CONFIG_SYS_DDR_CLK_CTRL_667            0x03000000
-#define CONFIG_SYS_DDR_MODE_1_667              0x00441210
-#define CONFIG_SYS_DDR_MODE_2_667              0x00000000
-#define CONFIG_SYS_DDR_INTERVAL_667            0x0a280000
-#define CONFIG_SYS_DDR_WRLVL_CONTROL_667       0x8675F608
-
 #define CONFIG_SYS_CCSRBAR                     0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW            CONFIG_SYS_CCSRBAR
 
@@ -174,7 +137,6 @@ extern unsigned long get_sdram_size(void);
 /* NOR Flash on IFC */
 
 #define CONFIG_SYS_FLASH_BASE          0xee000000
-#define CONFIG_SYS_MAX_FLASH_SECT      256     /* 32M */
 
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_FLASH_BASE_PHYS     (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
@@ -200,15 +162,9 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_NOR_FTIM3   0x0
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
-#undef CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
 /* CFI for NOR Flash */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 
 /* NAND Flash on IFC */
 #define CONFIG_SYS_NAND_BASE           0xff800000

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 2d55283..de5f42b 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -100,13 +100,6 @@
 #define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
 #endif
 
-#define CONFIG_SYS_FLASH_BR_PRELIM \
-               (BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | \
-               BR_PS_16 | BR_V)
-#define CONFIG_SYS_FLASH_OR_PRELIM \
-               ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \
-                | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR)
-
 #define CONFIG_FSL_CPLD
 #define CPLD_BASE              0xffdf0000      /* CPLD registers */
 #ifdef CONFIG_PHYS_64BIT
@@ -120,13 +113,8 @@
 #define PIXIS_LBMAP_SHIFT      4
 #define PIXIS_LBMAP_ALTBANK    0x40
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024            /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000           /* Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500             /* Write Timeout (ms) */
-
 /* Nand Flash */
 #ifdef CONFIG_NAND_FSL_ELBC
 #define CONFIG_SYS_NAND_BASE           0xffa00000
@@ -155,7 +143,6 @@
                               | OR_FCM_EHTR)
 #endif /* CONFIG_NAND_FSL_ELBC */
 
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 
 #define CONFIG_HWCONFIG

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index c90ffe0..f5e07a9 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -165,14 +165,8 @@
                                FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3   0x0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 
 #ifdef CONFIG_TARGET_T1024RDB

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 56486cf..7983a71 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -127,14 +127,8 @@
                                FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3   0x0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 
 /* CPLD on IFC */

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 710254a..3da9831 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -130,14 +130,8 @@
                                FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3   0x0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS \
                                        + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
 

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 8ade2e3..813d8fa 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -120,13 +120,8 @@
                                FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3   0x0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS }
 
 /* CPLD on IFC */

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 653483c..332f34e 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -201,14 +201,8 @@
                                FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3   0x0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS \
                                        + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
 

diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 4b59759..bd7e2f1 100644 (file)
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -223,7 +223,6 @@
  * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB)
  */
 #if defined(CONFIG_NOR)
-#define CONFIG_SYS_MAX_FLASH_SECT      128
 #define CONFIG_SYS_FLASH_BASE          (0x08000000)
 #define CONFIG_SYS_FLASH_SIZE          0x01000000
 #endif  /* NOR support */

diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 93beed4..2dc6bd2 100644 (file)
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -88,7 +88,6 @@
 /* FLASH and environment organization */
 
 /* **** PISMO SUPPORT *** */
-#define CONFIG_SYS_MAX_FLASH_SECT      520     /* max number of sectors */
                                                /* on one chip */
 #define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
 
@@ -96,6 +95,4 @@
 #define CONFIG_SYS_FLASH_BASE          NAND_BASE
 #endif
 
-#define CONFIG_SYS_ENV_SECT_SIZE       (128 << 10)     /* 128 KiB */
-
 #endif /* __CONFIG_H */

diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 3c9267b..3f3b399 100644 (file)
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -36,8 +36,6 @@
 #define CONFIG_SYS_SDRAM_BASE          0x00000000
 #define CONFIG_SYS_SDRAM_SIZE          0x1000000
 #define CONFIG_SYS_FLASH_BASE          0xffc00000
-#define CONFIG_SYS_MAX_FLASH_SECT      1024
-#define CONFIG_SYS_FLASH_ERASE_TOUT    1000
 
 /* amcore design has flash data bytes wired swapped */
 #define CONFIG_SYS_WRITE_SWAPPED_DATA

diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index 1c74941..da02a96 100644 (file)
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -47,14 +47,8 @@
 
 /* FLASH */
 #define CONFIG_SYS_FLASH_BASE          0x00000000
-#define CONFIG_SYS_MAX_FLASH_SECT      512
 #define CONFIG_SYS_FLASH_BANKS_LIST    { (CONFIG_SYS_FLASH_BASE) }
 
-#define CONFIG_SYS_FLASH_ERASE_TOUT    3000
-#define CONFIG_SYS_FLASH_WRITE_TOUT    3000
-#define CONFIG_SYS_FLASH_LOCK_TOUT     3000
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT   3000
-
 /* ENV setting */
 
 /* SH Ether */

diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index da4d497..adfadd7 100644 (file)
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -62,9 +62,6 @@
 #define CONFIG_SYS_CPU_CLK             (CONFIG_SYS_CLK * 3)
 #define CONFIG_SYS_SDRAM_SIZE          32              /* SDRAM size in MB */
 
-#define CONFIG_SYS_CORE_SRAM_SIZE      0x8000
-#define CONFIG_SYS_CORE_SRAM           0x80000000
-
 /*
  * Define baudrate for UART1 (console output, tftp, ...)
  * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
@@ -206,11 +203,8 @@
                                                (CONFIG_SYS_SDRAM_SIZE << 20))
 
 /* FLASH organization */
-#define CONFIG_SYS_MAX_FLASH_SECT      259
-#define CONFIG_SYS_FLASH_ERASE_TOUT    1000
 
 #define CONFIG_SYS_FLASH_SIZE          0x2000000
-#define CONFIG_SYS_FLASH_CFI_NONBLOCK  1
 
 #define LDS_BOARD_TEXT \
        . = DEFINED(env_offset) ? env_offset : .; \

diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 9497f05..8c6d1cd 100644 (file)
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -40,7 +40,6 @@
 #ifdef CONFIG_SYS_USE_NORFLASH
 #define PHYS_FLASH_1                           0x10000000
 #define CONFIG_SYS_FLASH_BASE                  PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_SECT              256
 
 #define CONFIG_SYS_MONITOR_SEC 1:0-3
 #define CONFIG_SYS_MONITOR_LEN (256 << 10)

diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index daa5cdf..cf5125f 100644 (file)
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -46,9 +46,6 @@
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 #define CONFIG_SYS_FLASH_BANKS_LIST    { PHYS_FLASH_1, }
 
-#define CONFIG_SYS_FLASH_ERASE_TOUT    120000  /* TO for Flash Erase (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* TO for Flash Write (ms) */
-
 /* max number of memory banks */
 /*
  * There are 4 banks supported for this Controller,
@@ -58,7 +55,6 @@
 
 /* max number of sectors on one chip */
 #define CONFIG_FLASH_SECTOR_SIZE       (0x10000*2)
-#define CONFIG_SYS_MAX_FLASH_SECT      512
 
 /* environments */
 

diff --git a/include/configs/blanche.h b/include/configs/blanche.h
index 25b6e70..959c521 100644 (file)
--- a/include/configs/blanche.h
+++ b/include/configs/blanche.h
@@ -30,14 +30,8 @@
 #define CONFIG_FLASH_SHOW_PROGRESS     45
 #define CONFIG_SYS_FLASH_BASE          0x00000000
 #define CONFIG_SYS_FLASH_SIZE          0x04000000      /* 64 MB */
-#define CONFIG_SYS_MAX_FLASH_SECT      1024
 #define CONFIG_SYS_FLASH_BANKS_LIST    { (CONFIG_SYS_FLASH_BASE) }
 #define CONFIG_SYS_FLASH_BANKS_SIZES   { (CONFIG_SYS_FLASH_SIZE) }
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT    3000
-#define CONFIG_SYS_FLASH_WRITE_TOUT    3000
-#define CONFIG_SYS_FLASH_LOCK_TOUT     3000
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT   3000
 #endif
 
 /* Board Clock */

diff --git a/include/configs/bmips_bcm6338.h b/include/configs/bmips_bcm6338.h
index ddaa540..b8a962d 100644 (file)
--- a/include/configs/bmips_bcm6338.h
+++ b/include/configs/bmips_bcm6338.h
@@ -21,6 +21,5 @@
 #endif
 
 #define CONFIG_SYS_FLASH_BASE                  0xbfc00000
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 
 #endif /* __CONFIG_BMIPS_BCM6338_H */

diff --git a/include/configs/bmips_bcm6348.h b/include/configs/bmips_bcm6348.h
index f704fe2..b23ab6a 100644 (file)
--- a/include/configs/bmips_bcm6348.h
+++ b/include/configs/bmips_bcm6348.h
@@ -21,6 +21,5 @@
 #endif
 
 #define CONFIG_SYS_FLASH_BASE                  0xbfc00000
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 
 #endif /* __CONFIG_BMIPS_BCM6348_H */

diff --git a/include/configs/bmips_bcm6358.h b/include/configs/bmips_bcm6358.h
index 9aaa694..106af2d 100644 (file)
--- a/include/configs/bmips_bcm6358.h
+++ b/include/configs/bmips_bcm6358.h
@@ -21,6 +21,5 @@
 #endif
 
 #define CONFIG_SYS_FLASH_BASE                  0xbe000000
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 
 #endif /* __CONFIG_BMIPS_BCM6358_H */

diff --git a/include/configs/bmips_bcm6368.h b/include/configs/bmips_bcm6368.h
index 0319124..fb1d760 100644 (file)
--- a/include/configs/bmips_bcm6368.h
+++ b/include/configs/bmips_bcm6368.h
@@ -21,6 +21,5 @@
 #endif
 
 #define CONFIG_SYS_FLASH_BASE                  0xb8000000
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 
 #endif /* __CONFIG_BMIPS_BCM6368_H */

diff --git a/include/configs/boston.h b/include/configs/boston.h
index 8b04492..5d6da77 100644 (file)
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -35,12 +35,6 @@
  */
 
 /*
- * Flash
- */
-
-#define CONFIG_SYS_MAX_FLASH_SECT              1024
-
-/*
  * Environment
  */
 

diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 789e6a4..6cb1a10 100644 (file)
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -143,8 +143,4 @@ NANDTGTS \
 #define CONFIG_NAND_OMAP_GPMC_WSCFG    1
 #endif /* CONFIG_MTD_RAW_NAND */
 
-#if defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_SYS_ENV_SECT_SIZE       CONFIG_ENV_SIZE
-#endif
-
 #endif /* ! __CONFIG_BRPPT1_H__ */

diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
index 965eba5..fdbcbf5 100644 (file)
--- a/include/configs/chiliboard.h
+++ b/include/configs/chiliboard.h
@@ -119,10 +119,4 @@
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       14
 
-#if defined(CONFIG_ENV_IS_IN_NAND)
-#define CONFIG_SYS_ENV_SECT_SIZE       CONFIG_SYS_NAND_BLOCK_SIZE
-#endif
-
-/* Network. */
-
 #endif /* ! __CONFIG_CHILIBOARD_H */

diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index 4baf7f7..84b4271 100644 (file)
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -79,8 +79,6 @@
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
-#define CONFIG_SYS_ENV_SECT_SIZE       (128 << 10)     /* 128 KiB */
-
 /* GPIO pin + bank to pin ID mapping */
 #define GPIO_PIN(_bank, _pin)          ((_bank << 5) + _pin)
 

diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index dd7b6c0..ba0662f 100644 (file)
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -143,13 +143,6 @@ enter a valid image address in flash */
 #define CONFIG_SYS_SCR                 0x0003
 #define CONFIG_SYS_SPR                 0xffff
 
-/* ---
- * Ethernet settings
- * ---
- */
-
-#define CONFIG_SYS_ENET_BD_BASE        0x780000
-
 /*-----------------------------------------------------------------------
  * Definitions for initial stack pointer and data area (in internal SRAM)
  */
@@ -187,12 +180,6 @@ enter a valid image address in flash */
 #define CONFIG_SYS_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 
 /*-----------------------------------------------------------------------
- * FLASH organization
- */
-#define CONFIG_SYS_MAX_FLASH_SECT      11      /* max number of sectors on one chip    */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    1000    /* flash timeout */
-
-/*-----------------------------------------------------------------------
  * Cache Configuration
  */
 

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 4eeca47..a4fb2b5 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -92,12 +92,6 @@
 #define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
 #endif
 
-#define CONFIG_SYS_FLASH_BR_PRELIM \
-               (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) \
-                | BR_PS_16 | BR_V)
-#define CONFIG_SYS_FLASH_OR_PRELIM ((0xf8000ff7 & ~OR_GPCM_SCY & ~OR_GPCM_EHTR) \
-                                       | OR_GPCM_SCY_8 | OR_GPCM_EHTR_CLEAR)
-
 #define PIXIS_BASE             0xffdf0000      /* PIXIS registers */
 #ifdef CONFIG_PHYS_64BIT
 #define PIXIS_BASE_PHYS                0xfffdf0000ull
@@ -110,13 +104,8 @@
 #define PIXIS_LBMAP_SHIFT      4
 #define PIXIS_LBMAP_ALTBANK    0x40
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024            /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000           /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500             /* Flash Write Timeout (ms) */
-
 /* Nand Flash */
 #ifdef CONFIG_NAND_FSL_ELBC
 #define CONFIG_SYS_NAND_BASE           0xffa00000
@@ -145,7 +134,6 @@
                               | OR_FCM_EHTR)
 #endif /* CONFIG_NAND_FSL_ELBC */
 
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
 
 #define CONFIG_HWCONFIG

diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 3db9720..58c9024 100644 (file)
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -134,11 +134,8 @@
 #endif
 
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_FLASH_SECT_SZ       (128 << 10) /* 128KB */
 #define CONFIG_SYS_FLASH_BASE          DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
 #define PHYS_FLASH_SIZE                        (8 << 20) /* Flash size 8MB */
-#define CONFIG_SYS_MAX_FLASH_SECT ((PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)\
-              + 3)
 #endif
 
 /*

diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 328e495..7916ca8 100644 (file)
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -29,7 +29,6 @@
 /*
  * NOR Flash
  */
-#define CONFIG_SYS_MAX_FLASH_SECT      71
 #define CONFIG_SYS_FLASH_BASE          EMC_CS0_BASE
 #define CONFIG_SYS_FLASH_SIZE          SZ_4M
 

diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 9247720..6cf716e 100644 (file)
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -89,7 +89,6 @@
 /* Parallel NOR Support */
 #if defined(CONFIG_NOR)
 /* NOR: device related configs */
-#define CONFIG_SYS_MAX_FLASH_SECT      512
 #define CONFIG_SYS_FLASH_SIZE          (64 * 1024 * 1024) /* 64 MB */
 #define CONFIG_SYS_FLASH_BASE          (0x08000000)
 /* Reduce SPL size by removing unlikey targets */

diff --git a/include/configs/draak.h b/include/configs/draak.h
index a38e486..8bfba78 100644 (file)
--- a/include/configs/draak.h
+++ b/include/configs/draak.h
@@ -15,7 +15,6 @@
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
 #define CONFIG_SYS_FLASH_BANKS_LIST    { 0x08000000 }
-#define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
 #endif /* __DRAAK_H */

diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 6e444c4..249da66 100644 (file)
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -94,9 +94,6 @@
 #define        CONFIG_SYS_INT_FLASH_BASE       0xF0000000
 #define CONFIG_SYS_INT_FLASH_ENABLE    0x21
 
-#define        CONFIG_SYS_MAX_FLASH_SECT       128
-#define        CONFIG_SYS_FLASH_ERASE_TOUT     10000000
-
 #define CONFIG_SYS_FLASH_SIZE          16*1024*1024
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }

diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h
index 3dc111f..597efd6 100644 (file)
--- a/include/configs/ebisu.h
+++ b/include/configs/ebisu.h
@@ -16,9 +16,7 @@
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH_BANKS_LIST    { 0x08000000 }
-#define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
 #endif /* __EBISU_H */

diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 8625701..d2f1cd5 100644 (file)
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -79,7 +79,6 @@
  * FLASH configuration
  */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      11 /* max num of sects on one chip */
 #define CONFIG_SYS_FLASH_BASE          0xfff80000
 
 /* auto boot */

diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 3acc62d..7923fbb 100644 (file)
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -15,7 +15,6 @@
 #include "siemens-am33x-common.h"
 /* NAND specific changes for etamin due to different page size */
 #undef CONFIG_SYS_NAND_ECCPOS
-#undef CONFIG_SYS_ENV_SECT_SIZE
 
 #define CONFIG_SYS_ENV_SECT_SIZE       (512 << 10)     /* 512 KiB */
 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \

diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 88a702f..7a3c800 100644 (file)
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -31,7 +31,6 @@
 
 /* 512kB on-chip NOR flash */
 # define CONFIG_SYS_FLASH_BASE         0x00200000 /* AT91SAM9XE_FLASH_BASE */
-# define CONFIG_SYS_MAX_FLASH_SECT     32
 
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */

diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h
index 25095e1..e592dc4 100644 (file)
--- a/include/configs/gazerbeam.h
+++ b/include/configs/gazerbeam.h
@@ -40,8 +40,6 @@
 #define CONFIG_SYS_FLASH_BASE          0xFE000000 /* FLASH base address */
 #define CONFIG_SYS_FLASH_SIZE          8 /* FLASH size is up to 8M */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      135
-
 #define CONFIG_SYS_BAUDRATE_TABLE  \
        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 

diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index a8bb209..e89b800 100644 (file)
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -41,7 +41,7 @@
  * Manually set up DDR parameters,
  * as this board has not the SPD connected to I2C.
  */
-#define CONFIG_SYS_DDR_SIZE            256             /* MB */
+#define CONFIG_SYS_SDRAM_SIZE          0x10000000 /* 256 MiB */
 #define CONFIG_SYS_DDR_CONFIG          (CSCONFIG_EN |\
                                         0x00010000 |\
                                         CSCONFIG_ROW_BIT_13 |\
@@ -109,12 +109,6 @@
 #define CONFIG_SYS_FLASH_BASE          0xFF800000
 #define CONFIG_SYS_FLASH_SIZE          8
 
-
-#define CONFIG_SYS_MAX_FLASH_SECT      128
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500
-
 /*
  * NAND FLASH setup
  */
@@ -129,17 +123,10 @@
 #define CONFIG_SYS_MRAM_BASE           0xE2000000
 #define CONFIG_SYS_MRAM_SIZE           0x20000 /* 128 Kb */
 
-#define CONFIG_SYS_OR_TIMING_MRAM
-
-
 /*
  * CPLD setup
  */
 #define CONFIG_SYS_CPLD_BASE           0xE3000000
-#define CONFIG_SYS_CPLD_SIZE           0x8000
-
-#define CONFIG_SYS_OR_TIMING_MRAM
-
 
 /*
  * HW-Watchdog

diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index 17430f1..6ebdc3d 100644 (file)
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -81,8 +81,6 @@
 #define PHYS_FLASH_1                   0xc0000000
 /* Flash Base for U-Boot */
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_SECT      (PHYS_FLASH_SIZE / \
-               CONFIG_SYS_FLASH_SECT_SZ)
 #define CONFIG_SYS_MONITOR_LEN         0x40000         /* Reserve 256KiB */
 /* Address and size of Redundant Environment Sector    */
 

diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h
index 34eec5a..512e0e6 100644 (file)
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -44,6 +44,3 @@
 #define CONFIG_SYS_FLASH_BASE          0x24000000
 
 /* Timeout values in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    (2 * CONFIG_SYS_HZ) /* Erase Timeout */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    (2 * CONFIG_SYS_HZ) /* Write Timeout */
-#define CONFIG_SYS_FLASH_EMPTY_INFO    /* flinfo indicates empty blocks */

diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 49f07e9..c8457d9 100644 (file)
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -21,7 +21,6 @@
 
 /* Flash settings */
 #define CONFIG_SYS_FLASH_SIZE          0x02000000 /* 32 MiB */
-#define CONFIG_SYS_MAX_FLASH_SECT      128
 
 /*-----------------------------------------------------------------------
  * PCI definitions

diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 288014c..2752152 100644 (file)
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -34,7 +34,6 @@
  * Miscellaneous configurable options
  */
 #define PHYS_FLASH_SIZE                        0x01000000      /* 16MB */
-#define CONFIG_SYS_MAX_FLASH_SECT      64
 #define CONFIG_SYS_MONITOR_LEN         0x00100000
 
 #endif /* __CONFIG_H */

diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index 9f76f48..04192d8 100644 (file)
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -18,7 +18,7 @@
 /*
  * Manually set up DDR parameters
  */
-#define CONFIG_SYS_DDR_SIZE            2048 /* MB */
+#define CONFIG_SYS_SDRAM_SIZE          0x80000000 /* 2048 MiB */
 
 /*
  * The reserved memory
@@ -49,7 +49,6 @@
  */
 #define CONFIG_SYS_FLASH_SIZE          256 /* max FLASH size is 256M */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      512 /* max num of sects on one chip */
 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
 
 /* I2C */

diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h
index 6becd7c..20a36fb 100644 (file)
--- a/include/configs/km/km-powerpc.h
+++ b/include/configs/km/km-powerpc.h
@@ -9,9 +9,6 @@
 
 /* Do boardspecific init for all boards */
 
-/* EEprom support 24C08, 24C16, 24C64 */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
-
 /* Increase max size of compressed kernel */
 
 /******************************************************************************

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index eee71db..a91e5e8 100644 (file)
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -97,9 +97,6 @@ extern void __set_direction(unsigned pin, int high);
 #define I2C_DELAY      udelay(1)
 #define I2C_SOFT_DECLARATIONS
 
-/* EEprom support 24C128, 24C256 valid for environment eeprom */
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
-
 /*
  *  Environment variables configurations
  */

diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index f837390..43471e0 100644 (file)
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -61,14 +61,8 @@
                                        FTIM2_NOR_TWP(0xb))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      512     /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE_PHYS }
 
 #define CONFIG_SYS_WRITE_SWAPPED_DATA

diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index b389229..589ba61 100644 (file)
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -133,7 +133,6 @@
 #define KM_I2C_DEBLOCK_SDA     21
 
 /* High Level Configuration Options */
-#define CONFIG_FSL_CORENET             /* Freescale CoreNet platform */
 
 #define CONFIG_RESET_VECTOR_ADDRESS    0xebfffffc
 
@@ -232,11 +231,7 @@
 #define CONFIG_SYS_CS0_FTIM3   CONFIG_SYS_NOR_FTIM3
 
 /* More NOR Flash params */
-#define CONFIG_SYS_FLASH_QUIET_TEST
 
-#define CONFIG_SYS_MAX_FLASH_SECT      512     /* sectors per device */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 
 /* NAND Flash on IFC CS1*/

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index e084f87..602c1c5 100644 (file)
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -19,7 +19,6 @@
 /* NOR Flash */
 #define KZM_FLASH_BASE (0x00000000)
 #define CONFIG_SYS_FLASH_BASE          (KZM_FLASH_BASE)
-#define CONFIG_SYS_MAX_FLASH_SECT      (512)
 
 /* prompt */
 #define CONFIG_SYS_BAUDRATE_TABLE      { 115200 }
@@ -40,20 +39,12 @@
 #define CONFIG_STANDALONE_LOAD_ADDR    0x41000000
 
 /* FLASH */
-#undef  CONFIG_SYS_FLASH_QUIET_TEST
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define FLASH_SECTOR_SIZE      (256 * 1024)    /* 256 KB sectors */
 
 /* Timeout for Flash erase operations (in ms) */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    (3 * 1000)
 /* Timeout for Flash write operations (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    (3 * 1000)
 /* Timeout for Flash set sector lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_LOCK_TOUT             (3 * 1000)
 /* Timeout for Flash clear lock bit operations (in ms) */
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT   (3 * 1000)
-
-#undef  CONFIG_SYS_DIRECT_FLASH_TFTP
 
 /* GPIO / PFC */
 #define CONFIG_SH_GPIO_PFC

diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index b124ce5..48fe828 100644 (file)
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -60,28 +60,6 @@
 #define I2C_VOL_MONITOR_BUS_V_OVF      0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 
-/* DSPI */
-#define CONFIG_FSL_DSPI1
-
-#define MMAP_DSPI          DSPI1_BASE_ADDR
-
-#define CONFIG_SYS_DSPI_CTAR0   1
-
-#define CONFIG_SYS_DSPI_CTAR1  (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
-                               DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
-                               DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \
-                               DSPI_CTAR_DT(0))
-
-#define CONFIG_SYS_DSPI_CTAR2  (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
-                               DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
-                               DSPI_CTAR_CSSCK(0) | DSPI_CTAR_ASC(0) | \
-                               DSPI_CTAR_DT(0))
-
-#define CONFIG_SYS_DSPI_CTAR3  (DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
-                               DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
-                               DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \
-                               DSPI_CTAR_DT(0))
-
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS              \
        "verify=no\0"                           \

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 517ade3..d9a973c 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -65,15 +65,9 @@
                                        FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 1aa29e5..5f3e8d5 100644 (file)
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -95,14 +95,8 @@
                                        FTIM2_NOR_TWPH(0x0e))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE_PHYS }
 
 #define CONFIG_SYS_WRITE_SWAPPED_DATA

diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 95cbcb0..43f30fd 100644 (file)
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -100,7 +100,6 @@
 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY       0x00000000
 
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 #endif
 #endif

diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 15c3ff5..49f6cd6 100644 (file)
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -74,11 +74,6 @@
                                        FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 

diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 6c33847..d36b2c7 100644 (file)
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -42,11 +42,6 @@
 #define CONFIG_SYS_NOR_FTIM3           0
 #define CONFIG_SYS_IFC_CCR             0x01000000
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE_PHYS }
 
 #define CONFIG_SYS_WRITE_SWAPPED_DATA

diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 36c64db..869bbd7 100644 (file)
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -43,7 +43,6 @@
 #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY       0x00000000
 
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 #endif
 #endif
@@ -91,11 +90,6 @@
                                        FTIM2_NOR_TWP(0x1c))
 #define CONFIG_SYS_NOR_FTIM3           0
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 

diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index debb60d..747ee9d 100644 (file)
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -62,14 +62,8 @@
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifndef SYS_NO_FLASH
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE,\
                                         CONFIG_SYS_FLASH_BASE + 0x40000000}
 #endif
@@ -303,8 +297,6 @@
 #endif
 #endif
 
-#define CONFIG_FSL_MEMAC
-
 #define COMMON_ENV \
        "kernelheader_addr_r=0x80200000\0"      \
        "fdtheader_addr_r=0x80100000\0"         \
@@ -473,7 +465,6 @@
 #endif
 
 #ifdef CONFIG_FSL_MC_ENET
-#define CONFIG_FSL_MEMAC
 #define RGMII_PHY1_ADDR                0x1
 #define RGMII_PHY2_ADDR                0x2
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C

diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index c0567c3..3e829ea 100644 (file)
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -47,14 +47,8 @@
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifndef SYS_NO_FLASH
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
 #endif
 #endif
@@ -208,8 +202,6 @@
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM              0
 
-#define CONFIG_FSL_MEMAC
-
 #ifndef SPL_NO_ENV
 /* Initial environment variables */
 #ifdef CONFIG_TFABOOT

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 3e86d1b..ba5af6c 100644 (file)
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -16,8 +16,6 @@
 
 /* Link Definitions */
 
-#define CONFIG_SYS_FSL_DDR_INTLV_256B  /* force 256 byte interleaving */
-
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0

diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 9ba7258..6487397 100644 (file)
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -64,14 +64,8 @@
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE,\
                                         CONFIG_SYS_FLASH_BASE + 0x40000000}
 #endif
@@ -214,10 +208,6 @@
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NAND_FTIM3
 #endif
 
-/* Debug Server firmware */
-#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
-#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR        0x580D00000ULL
-
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
 
 /*
@@ -249,8 +239,6 @@
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM      0
 
-#define CONFIG_FSL_MEMAC
-
 /* Initial environment variables */
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #ifdef CONFIG_NXP_ESBC
@@ -395,7 +383,6 @@
 #endif
 
 #if defined(CONFIG_FSL_MC_ENET)
-#define CONFIG_FSL_MEMAC
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
 #define SGMII_CARD_PORT2_PHY_ADDR 0x1d
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E

diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index a504a0e..87d07b7 100644 (file)
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -61,14 +61,8 @@
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifdef CONFIG_MTD_NOR_FLASH
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      1024    /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE,\
                                         CONFIG_SYS_FLASH_BASE + 0x40000000}
 #endif
@@ -185,10 +179,6 @@
 #define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NAND_FTIM3
 #endif
-
-/* Debug Server firmware */
-#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
-#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR        0x580D00000ULL
 #endif
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
 
@@ -236,8 +226,6 @@
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM      0
 
-#define CONFIG_FSL_MEMAC
-
 #define BOOT_TARGET_DEVICES(func) \
        func(USB, usb, 0) \
        func(MMC, mmc, 0) \

diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index 81c9337..e110861 100644 (file)
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -18,9 +18,6 @@
 /*
  *  Environment variables configurations
  */
-#ifdef CONFIG_SPI_FLASH
-#define CONFIG_SYS_MAX_FLASH_SECT      8
-#endif
 
 /*
  * Default environment variables

diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index b754373..6187071 100644 (file)
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -10,12 +10,9 @@
 #include <asm/arch/config.h>
 #include <asm/arch/soc.h>
 
-#define CONFIG_FSL_MEMAC
-
 #define CONFIG_SYS_FLASH_BASE          0x20000000
 
 /* DDR */
-#define CONFIG_SYS_FSL_DDR_INTLV_256B  /* force 256 byte interleaving */
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_SYS_DDR_SDRAM_BASE              0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0

diff --git a/include/configs/malta.h b/include/configs/malta.h
index c8b230a..5a42cee 100644 (file)
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -30,7 +30,7 @@
 #else
 # define CONFIG_SYS_SDRAM_BASE         0x80000000
 #endif
-#define CONFIG_SYS_MEM_SIZE            (256 * 1024 * 1024)
+#define CONFIG_SYS_SDRAM_SIZE          0x10000000      /* 256 MiB */
 
 #define CONFIG_SYS_INIT_SP_OFFSET      0x400000
 
@@ -47,7 +47,6 @@
 #else
 # define CONFIG_SYS_FLASH_BASE         0xbe000000
 #endif
-#define CONFIG_SYS_MAX_FLASH_SECT      128
 
 /*
  * Environment

diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h
index 02a2235..17986a0 100644 (file)
--- a/include/configs/mccmon6.h
+++ b/include/configs/mccmon6.h
@@ -27,7 +27,6 @@
 
 /* NOR 16-bit mode */
 #define CONFIG_SYS_FLASH_BASE           WEIM_ARB_BASE_ADDR
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #define CONFIG_FLASH_VERIFY
 
 /* NOR Flash MTD */

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 73f8492..8eaac4f 100644 (file)
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -16,14 +16,6 @@
 # define CONFIG_SYS_BAUDRATE_TABLE \
        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 
-#ifdef CONFIG_CFI_FLASH
-/* ?empty sector */
-# define CONFIG_SYS_FLASH_EMPTY_INFO   1
-/* max number of memory banks */
-/* max number of sectors on one chip */
-# define CONFIG_SYS_MAX_FLASH_SECT     2048
-#endif
-
 #define        CONFIG_HOSTNAME         "microblaze-generic"
 
 /* architecture dependent code */

diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h
index bc4aa52..c76e7ea 100644 (file)
--- a/include/configs/mx6sabreauto.h
+++ b/include/configs/mx6sabreauto.h
@@ -31,9 +31,6 @@
 
 #ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_SYS_FLASH_BASE           WEIM_ARB_BASE_ADDR
-#define CONFIG_SYS_FLASH_SECT_SIZE      (128 * 1024)
-#define CONFIG_SYS_MAX_FLASH_SECT 256   /* max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 #endif
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2

diff --git a/include/configs/octeon_ebb7304.h b/include/configs/octeon_ebb7304.h
index 7035e63..5479bde 100644 (file)
--- a/include/configs/octeon_ebb7304.h
+++ b/include/configs/octeon_ebb7304.h
@@ -9,12 +9,6 @@
 
 #include "octeon_common.h"
 
-/*
- * CFI flash
- */
-#define CONFIG_SYS_MAX_FLASH_SECT      256
-#define CONFIG_SYS_FLASH_EMPTY_INFO    /* flinfo indicates empty blocks */
-
 #define PHY_ANEG_TIMEOUT       8000    /* PHY needs a longer aneg time */
 
 #endif /* __CONFIG_H__ */

diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 2cd42e5..ad3dbbc 100644 (file)
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -26,7 +26,6 @@
                                          10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE         512
 #define CONFIG_SYS_NAND_ECCBYTES        3
-#define CONFIG_SYS_ENV_SECT_SIZE        SZ_128K
 /* NAND: SPL falcon mode configs */
 #endif /* CONFIG_MTD_RAW_NAND */
 

diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 2683d4c..c47d557 100644 (file)
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -31,7 +31,6 @@
                                          10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE         512
 #define CONFIG_SYS_NAND_ECCBYTES        3
-#define CONFIG_SYS_ENV_SECT_SIZE        SZ_128K
 #endif /* CONFIG_MTD_RAW_NAND */
 
 #define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \

diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index 38dc7ea..1af87b2 100644 (file)
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -150,9 +150,6 @@
 #define CONFIG_SYS_FLASH_BASE          0x10000000
 #endif
 
-#define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_SYS_FLASH_SIZE          0x4000000
 
-#define CONFIG_SYS_ENV_SECT_SIZE       (128 << 10)     /* 128 KiB */
-
 #endif /* __CONFIG_H */

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index ba04029..f7d8723 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -176,10 +176,8 @@
  * Local Bus Definitions
  */
 #if defined(CONFIG_TARGET_P1020RDB_PD)
-#define CONFIG_SYS_MAX_FLASH_SECT      512     /* 64M */
 #define CONFIG_SYS_FLASH_BASE          0xec000000
 #else
-#define CONFIG_SYS_MAX_FLASH_SECT      128     /* 16M */
 #define CONFIG_SYS_FLASH_BASE          0xef000000
 #endif
 
@@ -195,15 +193,8 @@
 #define CONFIG_FLASH_OR_PRELIM 0xfc000ff7
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
-#undef CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
 /* Nand Flash */
 #ifdef CONFIG_NAND_FSL_ELBC
 #define CONFIG_SYS_NAND_BASE           0xff800000

diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 7374514..797e44f 100644 (file)
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -149,7 +149,6 @@
 /* NOR flash */
 #define PHYS_FLASH_1                           0x10000000
 #define CONFIG_SYS_FLASH_BASE                  PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_SECT              256
 
 /* USB */
 #define CONFIG_SYS_USB_OHCI_REGS_BASE          0x00500000

diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 7a6d817..bb5bd8b 100644 (file)
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -149,7 +149,6 @@
 /* NOR flash, if populated */
 #define PHYS_FLASH_1                   0x10000000
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
-#define CONFIG_SYS_MAX_FLASH_SECT      256
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND

diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h
index e9f756b..dd2faeb 100644 (file)
--- a/include/configs/qemu-arm.h
+++ b/include/configs/qemu-arm.h
@@ -74,6 +74,4 @@
        "ramdisk_addr_r=0x44000000\0" \
        BOOTENV
 
-#define CONFIG_SYS_MAX_FLASH_SECT      256 /* Sector: 256K, Bank: 64M */
-
 #endif /* __CONFIG_H */

diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 31e94df..5181792 100644 (file)
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -33,8 +33,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_SYS_BOOT_BLOCK          0x00000000      /* boot TLB */
-
 #define CONFIG_HWCONFIG
 
 #define CONFIG_SYS_INIT_RAM_ADDR               0x00100000

diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 409d5af..f0dfba3 100644 (file)
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -17,7 +17,6 @@
  * NOR Flash ( Spantion S29GL256P )
  */
 #define CONFIG_SYS_FLASH_BASE          (0xA0000000)
-#define CONFIG_SYS_MAX_FLASH_SECT  256
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
 
 /*

diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h
index 4359357..ae94f0e 100644 (file)
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -18,11 +18,10 @@
 /*-----------------------------------------------------------------------
  *  System memory Configuration
  */
-#define CONFIG_SYS_MEM_SIZE            0x40000000
 #define CONFIG_SYS_SDRAM_BASE          0x71000000
 
 /*
- * "(CONFIG_SYS_MEM_SIZE - CONFIG_SYS_RESERVE_MEM_SIZE)" has been used in
+ * "(0x40000000 - CONFIG_SYS_RESERVE_MEM_SIZE)" has been used in
  * u-boot nanopi2-v2016.01.
  * This is not working anymore because boot_fdt_add_mem_rsv_regions() in
  * common/image-fdt.c has been extended:

diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index 4b0f20e..41e5254 100644 (file)
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -14,9 +14,7 @@
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH_BANKS_LIST    { 0x08000000 }
-#define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
 #endif /* __SALVATOR_X_H */

diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 7bc3f91..b48e40b 100644 (file)
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -31,7 +31,6 @@
 /* NOR flash */
 #ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_SYS_FLASH_BASE          0x10000000
-#define CONFIG_SYS_MAX_FLASH_SECT      131
 #endif
 
 /* SDRAM */

diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index d2d4296..fcb0fd5 100644 (file)
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -370,9 +370,6 @@
                                                        /* CS0 */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND
                                                           devices */
-#if !defined(CONFIG_SPI_BOOT)
-#define CONFIG_SYS_ENV_SECT_SIZE       (128 << 10)     /* 128 KiB */
-#endif
 #endif
 
 #endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */

diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 5dc8d85..498deb4 100644 (file)
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -80,7 +80,6 @@
  */
 #define CONFIG_SYS_LBC_CACHE_BASE      0xf0000000      /* Localbus cacheable    */
 
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH0              0xFE000000
 #define CONFIG_SYS_FLASH1              0xFC000000
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 }
@@ -88,11 +87,6 @@
 #define CONFIG_SYS_LBC_FLASH_BASE      CONFIG_SYS_FLASH1       /* Localbus flash start */
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_LBC_FLASH_BASE /* start of FLASH     */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      256             /* sectors per device   */
-#undef CONFIG_SYS_FLASH_CHECKSUM
-#define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms)     */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms)     */
-
 #define CONFIG_SYS_LBC_LCRR            0x00030004    /* LB clock ratio reg     */
 #define CONFIG_SYS_LBC_LBCR            0x00000000    /* LB config reg          */
 #define CONFIG_SYS_LBC_LSRT            0x20000000    /* LB sdram refresh timer */

diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h
index 18c9e5b..51f6901 100644 (file)
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -13,8 +13,6 @@
  * Configuration of the external SDRAM memory
  */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      12
-
 #define CONFIG_SYS_HZ_CLOCK            1000000 /* Timer is clocked at 1MHz */
 
 #define CONFIG_EXTRA_ENV_SETTINGS \

diff --git a/include/configs/stm32f429-evaluation.h b/include/configs/stm32f429-evaluation.h
index 6849477..221b7ab 100644 (file)
--- a/include/configs/stm32f429-evaluation.h
+++ b/include/configs/stm32f429-evaluation.h
@@ -18,8 +18,6 @@
  * Configuration of the external SDRAM memory
  */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      12
-
 #define CONFIG_SYS_HZ_CLOCK            1000000 /* Timer is clocked at 1MHz */
 
 #define BOOT_TARGET_DEVICES(func) \

diff --git a/include/configs/stm32f469-discovery.h b/include/configs/stm32f469-discovery.h
index 2d8b2d2..55e70ce 100644 (file)
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -18,8 +18,6 @@
  * Configuration of the external SDRAM memory
  */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      12
-
 #define CONFIG_SYS_HZ_CLOCK            1000000 /* Timer is clocked at 1MHz */
 
 #define BOOT_TARGET_DEVICES(func) \

diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index df05ee4..64c1bc7 100644 (file)
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -18,8 +18,6 @@
  * Configuration of the external SDRAM memory
  */
 
-#define CONFIG_SYS_MAX_FLASH_SECT      8
-
 #define CONFIG_SYS_HZ_CLOCK            1000000 /* Timer is clocked at 1MHz */
 
 #define BOOT_TARGET_DEVICES(func) \

diff --git a/include/configs/total_compute.h b/include/configs/total_compute.h
index 4fb3d73..7c77a8d 100644 (file)
--- a/include/configs/total_compute.h
+++ b/include/configs/total_compute.h
@@ -44,10 +44,5 @@
  */
 
 #define CONFIG_SYS_FLASH_BASE          0x0C000000
-/* 256 x 256KiB sectors */
-#define CONFIG_SYS_MAX_FLASH_SECT      256
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO    /* flinfo indicates empty blocks */
-#define FLASH_MAX_SECTOR_SIZE          0x00040000
 
 #endif /* __TOTAL_COMPUTE_H */

diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h
index 5788732..a977271 100644 (file)
--- a/include/configs/ulcb.h
+++ b/include/configs/ulcb.h
@@ -14,9 +14,7 @@
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
-#define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH_BANKS_LIST    { 0x08000000 }
-#define CONFIG_SYS_MAX_FLASH_SECT      256
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 
 #endif /* __ULCB_H */

diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h
index 3705313..077428f 100644 (file)
--- a/include/configs/vexpress_aemv8.h
+++ b/include/configs/vexpress_aemv8.h
@@ -261,18 +261,8 @@
 
 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 #define CONFIG_SYS_FLASH_BASE          0x08000000
-/* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
-#define CONFIG_SYS_MAX_FLASH_SECT      259
-/* Store environment at top of flash in the same location as blank.img */
-/* in the Juno firmware. */
 #else
 #define CONFIG_SYS_FLASH_BASE          (V2M_PA_BASE + 0x0C000000)
-/* 256 x 256KiB sectors */
-#define CONFIG_SYS_MAX_FLASH_SECT      256
-/* Store environment at top of flash */
 #endif
 
-#define CONFIG_SYS_FLASH_EMPTY_INFO    /* flinfo indicates empty blocks */
-#define FLASH_MAX_SECTOR_SIZE          0x00040000
-
 #endif /* __VEXPRESS_AEMV8_H */

diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index ff7307f..7c0856a 100644 (file)
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -167,18 +167,9 @@
                "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
 
 /* FLASH and environment organization */
-#define PHYS_FLASH_SIZE                        0x04000000      /* 64MB */
 #define CONFIG_SYS_FLASH_SIZE          0x04000000
-#define CONFIG_SYS_FLASH_BASE0         V2M_NOR0
-#define CONFIG_SYS_FLASH_BASE1         V2M_NOR1
 
 /* Timeout values in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT    (2 * CONFIG_SYS_HZ) /* Erase Timeout */
-#define CONFIG_SYS_FLASH_WRITE_TOUT    (2 * CONFIG_SYS_HZ) /* Write Timeout */
-
-/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
-#define CONFIG_SYS_MAX_FLASH_SECT      259             /* Max sectors */
-#define FLASH_MAX_SECTOR_SIZE          0x00040000      /* 256 KB sectors */
 
 /* Room required on the stack for the environment data */
 
@@ -189,8 +180,6 @@
  */
 
 /* Store environment at top of flash */
-#define CONFIG_SYS_FLASH_EMPTY_INFO    /* flinfo indicates empty blocks */
-#define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE0, \
-                                         CONFIG_SYS_FLASH_BASE1 }
+#define CONFIG_SYS_FLASH_BANKS_LIST    { V2M_NOR0, V2M_NOR1 }
 
 #endif /* VEXPRESS_COMMON_H */

diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index f1ea476..ad8ea65 100644 (file)
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -76,13 +76,12 @@
 
 #if defined(CONFIG_MAX_MEM_MAPPED) && \
        CONFIG_MAX_MEM_MAPPED < CONFIG_SYS_SDRAM_SIZE
-#define CONFIG_SYS_MEMORY_SIZE         CONFIG_MAX_MEM_MAPPED
+#define XTENSA_SYS_TEXT_ADDR           \
+       (MEMADDR(CONFIG_MAX_MEM_MAPPED) - CONFIG_SYS_MONITOR_LEN)
 #else
-#define CONFIG_SYS_MEMORY_SIZE         CONFIG_SYS_SDRAM_SIZE
-#endif
-
 #define XTENSA_SYS_TEXT_ADDR           \
-       (MEMADDR(CONFIG_SYS_MEMORY_SIZE) - CONFIG_SYS_MONITOR_LEN)
+       (MEMADDR(CONFIG_SYS_SDRAM_SIZE) - CONFIG_SYS_MONITOR_LEN)
+#endif
 
 /*==============================*/
 /* U-Boot general configuration */
@@ -105,18 +104,6 @@
  * SHIFT left amount and field WIDTH (bits), and also by a bitMASK.
  */
 
-/* Date of FPGA bitstream build in binary coded decimal (BCD) */
-#define CONFIG_SYS_FPGAREG_DATE                IOADDR(0x0D020000)
-#define FPGAREG_MTH_SHIFT              24              /* BCD month 1..12 */
-#define FPGAREG_MTH_WIDTH              8
-#define FPGAREG_MTH_MASK               0xFF000000
-#define FPGAREG_DAY_SHIFT              16              /* BCD day 1..31 */
-#define FPGAREG_DAY_WIDTH              8
-#define FPGAREG_DAY_MASK               0x00FF0000
-#define FPGAREG_YEAR_SHIFT             0               /* BCD year 2001..9999*/
-#define FPGAREG_YEAR_WIDTH             16
-#define FPGAREG_YEAR_MASK              0x0000FFFF
-
 /* FPGA core clock frequency in Hz (also input to UART) */
 #define CONFIG_SYS_FPGAREG_FREQ        IOADDR(0x0D020004)      /* CPU clock frequency*/
 
@@ -166,23 +153,17 @@
 
 #ifdef CONFIG_XTFPGA_LX60
 # define CONFIG_SYS_FLASH_SIZE         0x0040000       /* 4MB */
-# define CONFIG_SYS_FLASH_SECT_SZ      0x10000         /* block size 64KB */
 # define CONFIG_SYS_FLASH_PARMSECT_SZ  0x2000          /* param size  8KB */
 # define CONFIG_SYS_FLASH_BASE         IOADDR(0x08000000)
 #elif defined(CONFIG_XTFPGA_KC705)
 # define CONFIG_SYS_FLASH_SIZE         0x8000000       /* 128MB */
-# define CONFIG_SYS_FLASH_SECT_SZ      0x20000         /* block size 128KB */
 # define CONFIG_SYS_FLASH_PARMSECT_SZ  0x8000          /* param size 32KB */
 # define CONFIG_SYS_FLASH_BASE         IOADDR(0x00000000)
 #else
 # define CONFIG_SYS_FLASH_SIZE         0x1000000       /* 16MB */
-# define CONFIG_SYS_FLASH_SECT_SZ      0x20000         /* block size 128KB */
 # define CONFIG_SYS_FLASH_PARMSECT_SZ  0x8000          /* param size 32KB */
 # define CONFIG_SYS_FLASH_BASE         IOADDR(0x08000000)
 #endif
-#define CONFIG_SYS_MAX_FLASH_SECT      \
-       (CONFIG_SYS_FLASH_SECT_SZ/CONFIG_SYS_FLASH_PARMSECT_SZ + \
-        CONFIG_SYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ - 1)
 
 /*
  * Put environment in top block (64kB)
@@ -190,6 +171,5 @@
  */
 
 /* print 'E' for empty sector on flinfo */
-#define CONFIG_SYS_FLASH_EMPTY_INFO
 
 #endif /* __CONFIG_H */

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 1fdde90..75ae687 100644 (file)
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -38,12 +38,7 @@
 
 /* NOR */
 #ifdef CONFIG_MTD_NOR_FLASH
-# define CONFIG_SYS_MAX_FLASH_SECT     512
-# define CONFIG_SYS_FLASH_ERASE_TOUT   1000
-# define CONFIG_SYS_FLASH_WRITE_TOUT   5000
 # define CONFIG_FLASH_SHOW_PROGRESS    10
-# undef CONFIG_SYS_FLASH_EMPTY_INFO
-# define CONFIG_SYS_FLASH_QUIET_TEST
 #endif
 
 #ifdef CONFIG_NAND_ZYNQ

diff --git a/include/flash.h b/include/flash.h
index f3959f5..95992fa 100644 (file)
--- a/include/flash.h
+++ b/include/flash.h
@@ -7,10 +7,6 @@
 #ifndef _FLASH_H_
 #define _FLASH_H_
 
-#ifndef CONFIG_SYS_MAX_FLASH_SECT
-#define CONFIG_SYS_MAX_FLASH_SECT      512
-#endif
-
 /*-----------------------------------------------------------------------
  * FLASH Info: contains chip specific data, per FLASH bank
  */
@@ -91,6 +87,7 @@ int flash_sect_erase(ulong addr_first, ulong addr_last);
 int flash_sect_protect(int flag, ulong addr_first, ulong addr_last);
 int flash_sect_roundb(ulong *addr);
 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect);
+void flash_cmd_reset(flash_info_t *info);
 void flash_set_verbose(uint v);
 
 /* common/flash.c */

diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h
index d4aeea7..1321da1 100644 (file)
--- a/include/mtd/cfi_flash.h
+++ b/include/mtd/cfi_flash.h
@@ -176,7 +176,6 @@ extern int cfi_flash_num_flash_banks;
 
 phys_addr_t cfi_flash_bank_addr(int i);
 unsigned long cfi_flash_bank_size(int i);
-void flash_cmd_reset(flash_info_t *info);
 
 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 void flash_write8(u8 value, void *addr);

diff --git a/net/nfs.c b/net/nfs.c
index 9152ab7..9f65cfb 100644 (file)
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -28,7 +28,9 @@
 
 #include <common.h>
 #include <command.h>
+#ifdef CONFIG_SYS_DIRECT_FLASH_NFS
 #include <flash.h>
+#endif
 #include <image.h>
 #include <log.h>
 #include <net.h>

diff --git a/net/tftp.c b/net/tftp.c
index bfc4c9b..451d735 100644 (file)
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -17,9 +17,6 @@
 #include <asm/global_data.h>
 #include <net/tftp.h>
 #include "bootp.h"
-#ifdef CONFIG_SYS_DIRECT_FLASH_TFTP
-#include <flash.h>
-#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -158,47 +155,24 @@ static inline int store_block(int block, uchar *src, unsigned int len)
                        tftp_block_size;
        ulong newsize = offset + len;
        ulong store_addr = tftp_load_addr + offset;
-#ifdef CONFIG_SYS_DIRECT_FLASH_TFTP
-       int i, rc = 0;
-
-       for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
-               /* start address in flash? */
-               if (flash_info[i].flash_id == FLASH_UNKNOWN)
-                       continue;
-               if (store_addr >= flash_info[i].start[0]) {
-                       rc = 1;
-                       break;
-               }
-       }
-
-       if (rc) { /* Flash is destination for this packet */
-               rc = flash_write((char *)src, store_addr, len);
-               if (rc) {
-                       flash_perror(rc);
-                       return rc;
-               }
-       } else
-#endif /* CONFIG_SYS_DIRECT_FLASH_TFTP */
-       {
-               void *ptr;
+       void *ptr;
 
 #ifdef CONFIG_LMB
-               ulong end_addr = tftp_load_addr + tftp_load_size;
+       ulong end_addr = tftp_load_addr + tftp_load_size;
 
-               if (!end_addr)
-                       end_addr = ULONG_MAX;
+       if (!end_addr)
+               end_addr = ULONG_MAX;
 
-               if (store_addr < tftp_load_addr ||
-                   store_addr + len > end_addr) {
-                       puts("\nTFTP error: ");
-                       puts("trying to overwrite reserved memory...\n");
-                       return -1;
-               }
-#endif
-               ptr = map_sysmem(store_addr, len);
-               memcpy(ptr, src, len);
-               unmap_sysmem(ptr);
+       if (store_addr < tftp_load_addr ||
+           store_addr + len > end_addr) {
+               puts("\nTFTP error: ");
+               puts("trying to overwrite reserved memory...\n");
+               return -1;
        }
+#endif
+       ptr = map_sysmem(store_addr, len);
+       memcpy(ptr, src, len);
+       unmap_sysmem(ptr);
 
        if (net_boot_file_size < newsize)
                net_boot_file_size = newsize;

diff --git a/post/drivers/flash.c b/post/drivers/flash.c
index 07eab33..7d65f46 100644 (file)
--- a/post/drivers/flash.c
+++ b/post/drivers/flash.c
@@ -6,12 +6,12 @@
  * Licensed under the GPL-2 or later.
  */
 
+#if CONFIG_POST & CONFIG_SYS_POST_FLASH
 #include <common.h>
 #include <malloc.h>
 #include <post.h>
 #include <flash.h>
 
-#if CONFIG_POST & CONFIG_SYS_POST_FLASH
 
 /*
  * This code will walk over the declared sectors erasing them,
@@ -30,8 +30,6 @@
 # error "invalid flash block start/end"
 #endif
 
-extern flash_info_t flash_info[];
-
 static void *seed_src_data(void *ptr, ulong *old_len, ulong new_len)
 {
        unsigned char *p;

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fc07c5d..4f628e0 100644 (file)
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -32,7 +32,6 @@ CONFIG_FEC_ENET_DEV
 CONFIG_FEC_FIXED_SPEED
 CONFIG_FEC_MXC_PHYADDR
 CONFIG_FLASH_BR_PRELIM
-CONFIG_FLASH_CFI_LEGACY
 CONFIG_FLASH_OR_PRELIM
 CONFIG_FLASH_SECTOR_SIZE
 CONFIG_FLASH_SHOW_PROGRESS
@@ -40,16 +39,13 @@ CONFIG_FLASH_SPANSION_S29WS_N
 CONFIG_FLASH_VERIFY
 CONFIG_FM_PLAT_CLK_DIV
 CONFIG_FSL_CADMUS
-CONFIG_FSL_CORENET
 CONFIG_FSL_CPLD
 CONFIG_FSL_DEVICE_DISABLE
-CONFIG_FSL_DSPI1
 CONFIG_FSL_ESDHC_PIN_MUX
 CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
 CONFIG_FSL_IIM
 CONFIG_FSL_ISBC_KEY_EXT
 CONFIG_FSL_LBC
-CONFIG_FSL_MEMAC
 CONFIG_FSL_NGPIXIS
 CONFIG_FSL_PMIC_BITLEN
 CONFIG_FSL_PMIC_BUS
@@ -487,7 +483,6 @@ CONFIG_SYS_BMAN_SP_CENA_SIZE
 CONFIG_SYS_BMAN_SP_CINH_SIZE
 CONFIG_SYS_BMAN_SWP_ISDR_REG
 CONFIG_SYS_BOOTMAPSZ
-CONFIG_SYS_BOOT_BLOCK
 CONFIG_SYS_CACHE_ACR0
 CONFIG_SYS_CACHE_ACR1
 CONFIG_SYS_CACHE_ACR2
@@ -499,8 +494,6 @@ CONFIG_SYS_CCSRBAR_PHYS_HIGH
 CONFIG_SYS_CCSRBAR_PHYS_LOW
 CONFIG_SYS_CLK
 CONFIG_SYS_CLKTL_CBCDR
-CONFIG_SYS_CORE_SRAM
-CONFIG_SYS_CORE_SRAM_SIZE
 CONFIG_SYS_CPLD_AMASK
 CONFIG_SYS_CPLD_BASE
 CONFIG_SYS_CPLD_BASE_PHYS
@@ -511,7 +504,6 @@ CONFIG_SYS_CPLD_FTIM0
 CONFIG_SYS_CPLD_FTIM1
 CONFIG_SYS_CPLD_FTIM2
 CONFIG_SYS_CPLD_FTIM3
-CONFIG_SYS_CPLD_SIZE
 CONFIG_SYS_CPU_CLK
 CONFIG_SYS_CS0_BASE
 CONFIG_SYS_CS0_CTRL
@@ -602,7 +594,6 @@ CONFIG_SYS_DDR_CLKSEL
 CONFIG_SYS_DDR_CLK_CNTL
 CONFIG_SYS_DDR_CLK_CONTROL
 CONFIG_SYS_DDR_CLK_CTRL
-CONFIG_SYS_DDR_CLK_CTRL_667
 CONFIG_SYS_DDR_CLK_CTRL_800
 CONFIG_SYS_DDR_CONFIG
 CONFIG_SYS_DDR_CONFIG_2
@@ -618,15 +609,12 @@ CONFIG_SYS_DDR_CS1_CONFIG_2
 CONFIG_SYS_DDR_INIT_ADDR
 CONFIG_SYS_DDR_INIT_EXT_ADDR
 CONFIG_SYS_DDR_INTERVAL
-CONFIG_SYS_DDR_INTERVAL_667
 CONFIG_SYS_DDR_INTERVAL_800
 CONFIG_SYS_DDR_MODE
 CONFIG_SYS_DDR_MODE2
 CONFIG_SYS_DDR_MODE_1
-CONFIG_SYS_DDR_MODE_1_667
 CONFIG_SYS_DDR_MODE_1_800
 CONFIG_SYS_DDR_MODE_2
-CONFIG_SYS_DDR_MODE_2_667
 CONFIG_SYS_DDR_MODE_2_800
 CONFIG_SYS_DDR_MODE_CONTROL
 CONFIG_SYS_DDR_RCW_1
@@ -635,53 +623,34 @@ CONFIG_SYS_DDR_SDRAM_BASE
 CONFIG_SYS_DDR_SDRAM_CFG
 CONFIG_SYS_DDR_SDRAM_CFG2
 CONFIG_SYS_DDR_SDRAM_CLK_CNTL
-CONFIG_SYS_DDR_SIZE
 CONFIG_SYS_DDR_SR_CNTR
 CONFIG_SYS_DDR_TIMING_0
-CONFIG_SYS_DDR_TIMING_0_667
 CONFIG_SYS_DDR_TIMING_0_800
 CONFIG_SYS_DDR_TIMING_1
-CONFIG_SYS_DDR_TIMING_1_667
 CONFIG_SYS_DDR_TIMING_1_800
 CONFIG_SYS_DDR_TIMING_2
-CONFIG_SYS_DDR_TIMING_2_667
 CONFIG_SYS_DDR_TIMING_2_800
 CONFIG_SYS_DDR_TIMING_3
-CONFIG_SYS_DDR_TIMING_3_667
 CONFIG_SYS_DDR_TIMING_3_800
 CONFIG_SYS_DDR_TIMING_4
 CONFIG_SYS_DDR_TIMING_5
 CONFIG_SYS_DDR_WRLVL_CONTROL
-CONFIG_SYS_DDR_WRLVL_CONTROL_667
-CONFIG_SYS_DDR_WRLVL_CONTROL_800
 CONFIG_SYS_DDR_ZQ_CONTROL
-CONFIG_SYS_DEBUG
-CONFIG_SYS_DEBUG_SERVER_FW_ADDR
-CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
 CONFIG_SYS_DIALOG_PMIC_I2C_ADDR
-CONFIG_SYS_DIRECT_FLASH_TFTP
 CONFIG_SYS_DPAA_DCE
 CONFIG_SYS_DPAA_FMAN
 CONFIG_SYS_DPAA_PME
 CONFIG_SYS_DPAA_RMAN
-CONFIG_SYS_DRAM_SIZE
 CONFIG_SYS_DRAM_TEST
-CONFIG_SYS_DSPI_CTAR0
-CONFIG_SYS_DSPI_CTAR1
-CONFIG_SYS_DSPI_CTAR2
-CONFIG_SYS_DSPI_CTAR3
 CONFIG_SYS_DV_NOR_BOOT_CFG
 CONFIG_SYS_EEPROM_BUS_NUM
-CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
 CONFIG_SYS_EEPROM_WREN
-CONFIG_SYS_ENET_BD_BASE
 CONFIG_SYS_ENV_SECT_SIZE
 CONFIG_SYS_ETHOC_BASE
 CONFIG_SYS_ETHOC_BUFFER_ADDR
 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
 CONFIG_SYS_FAST_CLK
 CONFIG_SYS_FDT_PAD
-CONFIG_SYS_FECI2C
 CONFIG_SYS_FEC_BUF_USE_SRAM
 CONFIG_SYS_FLASH0
 CONFIG_SYS_FLASH1
@@ -690,24 +659,10 @@ CONFIG_SYS_FLASH1_BASE_PHYS_EARLY
 CONFIG_SYS_FLASH_BANKS_LIST
 CONFIG_SYS_FLASH_BANKS_SIZES
 CONFIG_SYS_FLASH_BASE
-CONFIG_SYS_FLASH_BASE0
-CONFIG_SYS_FLASH_BASE1
 CONFIG_SYS_FLASH_BASE_PHYS
 CONFIG_SYS_FLASH_BASE_PHYS_EARLY
-CONFIG_SYS_FLASH_BR_PRELIM
-CONFIG_SYS_FLASH_CFI_NONBLOCK
-CONFIG_SYS_FLASH_CHECKSUM
-CONFIG_SYS_FLASH_EMPTY_INFO
-CONFIG_SYS_FLASH_ERASE_TOUT
-CONFIG_SYS_FLASH_LOCK_TOUT
-CONFIG_SYS_FLASH_OR_PRELIM
 CONFIG_SYS_FLASH_PARMSECT_SZ
-CONFIG_SYS_FLASH_QUIET_TEST
-CONFIG_SYS_FLASH_SECT_SIZE
-CONFIG_SYS_FLASH_SECT_SZ
 CONFIG_SYS_FLASH_SIZE
-CONFIG_SYS_FLASH_UNLOCK_TOUT
-CONFIG_SYS_FLASH_WRITE_TOUT
 CONFIG_SYS_FM1_10GEC1_PHY_ADDR
 CONFIG_SYS_FM1_CLK
 CONFIG_SYS_FM1_DTSEC1_PHY_ADDR
@@ -727,9 +682,7 @@ CONFIG_SYS_FM2_DTSEC1_PHY_ADDR
 CONFIG_SYS_FM2_DTSEC2_PHY_ADDR
 CONFIG_SYS_FM2_DTSEC3_PHY_ADDR
 CONFIG_SYS_FM2_DTSEC4_PHY_ADDR
-CONFIG_SYS_FMAN_V3
 CONFIG_SYS_FM_MURAM_SIZE
-CONFIG_SYS_FPGAREG_DATE
 CONFIG_SYS_FPGAREG_DIPSW
 CONFIG_SYS_FPGAREG_FREQ
 CONFIG_SYS_FPGAREG_RESET
@@ -747,10 +700,6 @@ CONFIG_SYS_FPGA_SIZE
 CONFIG_SYS_FPGA_WAIT
 CONFIG_SYS_FSL_BMAN_ADDR
 CONFIG_SYS_FSL_BMAN_OFFSET
-CONFIG_SYS_FSL_CCSR_GUR_BE
-CONFIG_SYS_FSL_CCSR_GUR_LE
-CONFIG_SYS_FSL_CCSR_SCFG_BE
-CONFIG_SYS_FSL_CCSR_SCFG_LE
 CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR
 CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR
 CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR
@@ -781,7 +730,6 @@ CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET
 CONFIG_SYS_FSL_CORENET_SERDES_ADDR
 CONFIG_SYS_FSL_CORENET_SERDES_OFFSET
 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
-CONFIG_SYS_FSL_CORES_PER_CLUSTER
 CONFIG_SYS_FSL_CPC_ADDR
 CONFIG_SYS_FSL_CPC_OFFSET
 CONFIG_SYS_FSL_CSU_ADDR
@@ -791,7 +739,6 @@ CONFIG_SYS_FSL_DCSR_DDR_ADDR
 CONFIG_SYS_FSL_DDR2_ADDR
 CONFIG_SYS_FSL_DDR3_ADDR
 CONFIG_SYS_FSL_DDR_ADDR
-CONFIG_SYS_FSL_DDR_INTLV_256B
 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
 CONFIG_SYS_FSL_DSPI_BE
@@ -803,10 +750,8 @@ CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
 CONFIG_SYS_FSL_ERRATUM_A008751
 CONFIG_SYS_FSL_ESDHC_ADDR
-CONFIG_SYS_FSL_ESDHC_BE
 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
 CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
-CONFIG_SYS_FSL_ESDHC_LE
 CONFIG_SYS_FSL_ESDHC_NUM
 CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
 CONFIG_SYS_FSL_FM
@@ -833,8 +778,6 @@ CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET
 CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET
 CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET
 CONFIG_SYS_FSL_GUTS_ADDR
-CONFIG_SYS_FSL_IFC_BE
-CONFIG_SYS_FSL_IFC_LE
 CONFIG_SYS_FSL_ISBC_VER
 CONFIG_SYS_FSL_JR0_ADDR
 CONFIG_SYS_FSL_JR0_OFFSET
@@ -848,8 +791,6 @@ CONFIG_SYS_FSL_OCRAM_SIZE
 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
 CONFIG_SYS_FSL_PAMU_OFFSET
 CONFIG_SYS_FSL_PCIE_COMPAT
-CONFIG_SYS_FSL_PEX_LUT_BE
-CONFIG_SYS_FSL_PEX_LUT_LE
 CONFIG_SYS_FSL_PMIC_I2C_ADDR
 CONFIG_SYS_FSL_PMU_ADDR
 CONFIG_SYS_FSL_PMU_CLTBENR
@@ -1003,7 +944,6 @@ CONFIG_SYS_MAMR
 CONFIG_SYS_MASTER_CLOCK
 CONFIG_SYS_MATRIX_EBI0CSA_VAL
 CONFIG_SYS_MATRIX_EBICSA_VAL
-CONFIG_SYS_MAX_FLASH_SECT
 CONFIG_SYS_MAX_I2C_BUS
 CONFIG_SYS_MAX_NAND_CHIPS
 CONFIG_SYS_MAX_NAND_DEVICE
@@ -1015,11 +955,8 @@ CONFIG_SYS_MCKR1_VAL
 CONFIG_SYS_MCKR2_VAL
 CONFIG_SYS_MCKR_CSS
 CONFIG_SYS_MDIO1_OFFSET
-CONFIG_SYS_MEMAC_LITTLE_ENDIAN
 CONFIG_SYS_MEMORY_BASE
-CONFIG_SYS_MEMORY_SIZE
 CONFIG_SYS_MEM_RESERVE_SECURE
-CONFIG_SYS_MEM_SIZE
 CONFIG_SYS_MFD
 CONFIG_SYS_MHZ
 CONFIG_SYS_MIPS_TIMER_FREQ
@@ -1183,7 +1120,6 @@ CONFIG_SYS_OBIR
 CONFIG_SYS_OMAP_ABE_SYSCK
 CONFIG_SYS_ONENAND_BASE
 CONFIG_SYS_ONENAND_BLOCK_SIZE
-CONFIG_SYS_OR_TIMING_MRAM
 CONFIG_SYS_OSCIN_FREQ
 CONFIG_SYS_OSPR_OFFSET
 CONFIG_SYS_PACNT

diff --git a/tools/Makefile b/tools/Makefile
index 9f23396..005e736 100644 (file)
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -198,7 +198,9 @@ hostprogs-$(CONFIG_EXYNOS5420) += mkexynosspl
 HOSTCFLAGS_mkexynosspl.o := -pedantic
 
 HOSTCFLAGS_kwboot.o += -pthread
-HOSTLDLIBS_kwboot += -pthread -ltinfo
+HOSTLDLIBS_kwboot += -pthread
+HOSTLDLIBS_kwboot += \
+       $(shell pkg-config --libs tinfo 2> /dev/null || echo "-ltinfo")
 
 ifdtool-objs := $(LIBFDT_OBJS) ifdtool.o
 hostprogs-$(CONFIG_X86) += ifdtool
@@ -242,7 +244,10 @@ hostprogs-$(CONFIG_MIPS) += mips-relocs
 hostprogs-$(CONFIG_ASN1_COMPILER)      += asn1_compiler
 HOSTCFLAGS_asn1_compiler.o = -idirafter $(srctree)/include
 
-HOSTLDLIBS_mkeficapsule += -lgnutls -luuid
+HOSTCFLAGS_mkeficapsule.o += \
+       $(shell pkg-config --cflags gnutls uuid 2> /dev/null || echo "")
+HOSTLDLIBS_mkeficapsule += \
+       $(shell pkg-config --libs gnutls uuid 2> /dev/null || echo "-lgnutls -luuid")
 hostprogs-$(CONFIG_TOOLS_MKEFICAPSULE) += mkeficapsule
 
 # We build some files with extra pedantic flags to try to minimize things

diff --git a/tools/sunxi_toc0.c b/tools/sunxi_toc0.c
index bab5d17..56200bd 100644 (file)
--- a/tools/sunxi_toc0.c
+++ b/tools/sunxi_toc0.c
@@ -34,6 +34,12 @@
 #define pr_warn(fmt, args...)  fprintf(stderr, pr_fmt(fmt), "warning", ##args)
 #define pr_info(fmt, args...)  fprintf(stderr, pr_fmt(fmt), "info", ##args)
 
+#if defined(LIBRESSL_VERSION_NUMBER)
+#define RSA_get0_n(key) (key)->n
+#define RSA_get0_e(key) (key)->e
+#define RSA_get0_d(key) (key)->d
+#endif
+
 struct __packed toc0_key_item {
        __le32  vendor_id;
        __le32  key0_n_len;