vf610twr: Fix typo in DRAM init
authorAnthony Felice <tony.felice@timesys.com>
Fri, 9 Oct 2015 20:38:39 +0000 (16:38 -0400)
committerStefano Babic <sbabic@denx.de>
Fri, 16 Oct 2015 07:33:26 +0000 (09:33 +0200)
This commit fixes a typo in vf610twr DRAM init that was causing a hang in
U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
(vf610: refactor DDRMC code).

Signed-off-by: Anthony Felice <tony.felice@timesys.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
board/freescale/vf610twr/vf610twr.c

index 7834931..37b241d 100644 (file)
@@ -108,7 +108,7 @@ int dram_init(void)
                .trcd_int          = 6,
                .tras_lockout      = 0,
                .tdal              = 12,
-               .bstlen            = 0,
+               .bstlen            = 3,
                .tdll              = 512,
                .trp_ab            = 6,
                .tref              = 3120,