/* Lowest slew rate for UART0,1,2 */
out_8(&gpio->srcr_uart, 0x00);
+
+#ifdef CONFIG_FSL_ESDHC
+ /* eSDHC pin as faster speed */
+ out_8(&gpio->srcr_sdhc, 0x03);
+
+ /* All esdhc pins as SD */
+ out_8(&gpio->par_sdhch, 0xff);
+ out_8(&gpio->par_sdhcl, 0xff);
+#endif
#endif /* CONFIG_MCF5441x */
#ifdef CONFIG_MCF5445x
clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
#endif
}
+
#endif
temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1;
gd->bus_clk = vco / temp; /* bus clock */
+ temp = ((pdr & PLL_DR_OUTDIV3_BITS) >> 10) + 1;
+ gd->arch.sdhc_clk = vco / temp;
}
#endif
#include <asm/types.h>
#ifdef __GNUC__
-#define __sw16(x) \
- ((__u16)( \
- (((__u16)(x) & (__u16)0x00ffU) << 8) | \
- (((__u16)(x) & (__u16)0xff00U) >> 8) ))
-#define __sw32(x) \
- ((__u32)( \
- (((__u32)(x)) << 24) | \
- (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
- (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
- (((__u32)(x)) >> 24) ))
+
+static inline __u32 __sw32(__u32 x)
+{
+ __u32 v = x;
+
+ return v << 24 |
+ (v & (__u32)0x0000ff00UL) << 8 |
+ (v & (__u32)0x00ff0000UL) >> 8 |
+ v >> 24;
+}
+
+static inline __u16 __sw16(__u16 x)
+{
+ __u16 v = x;
+
+ return (v & (__u16)0x00ffU) << 8 |
+ (v & (__u16)0xff00U) >> 8;
+}
static __inline__ unsigned ld_le16(const volatile unsigned short *addr)
{
- unsigned result = *addr;
- return __sw16(result);
+ return __sw16(*addr);
}
static __inline__ void st_le16(volatile unsigned short *addr,
static __inline__ unsigned ld_le32(const volatile unsigned *addr)
{
- unsigned result = *addr;
- return __sw32(result);
+ return __sw32(*addr);
}
static __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
#endif
#define CONFIG_SYS_INTR_BASE (MMAP_INTC0)
-#define CONFIG_SYS_NUM_IRQS (128)
+#define CONFIG_SYS_NUM_IRQS (192)
#endif /* CONFIG_M54418 */