spi: Zap CONFIG_HARD_SPI
authorJagan Teki <jagan@amarulasolutions.com>
Sat, 24 Nov 2018 09:01:12 +0000 (14:31 +0530)
committerJagan Teki <jagan@amarulasolutions.com>
Tue, 27 Nov 2018 15:36:53 +0000 (21:06 +0530)
In legacy CONFIG_HARD_SPI initalizing spi_init code, which
was removed during dm conversion cleanup.

So remove the dead instances of CONFIG_HARD_SPI, and related
code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
23 files changed:
README
arch/powerpc/include/asm/config.h
board/freescale/mpc8349emds/mpc8349emds.c
board/ids/ids8313/ids8313.c
common/board_f.c
include/configs/M52277EVB.h
include/configs/M54418TWR.h
include/configs/M54451EVB.h
include/configs/M54455EVB.h
include/configs/MPC8536DS.h
include/configs/P1022DS.h
include/configs/UCP1020.h
include/configs/controlcenterd.h
include/configs/dreamplug.h
include/configs/ds109.h
include/configs/ids8313.h
include/configs/mx31pdk.h
include/configs/mxs.h
include/configs/p1_p2_rdb_pc.h
include/configs/p1_twr.h
include/configs/stmark2.h
include/configs/ts4800.h
scripts/config_whitelist.txt

diff --git a/README b/README
index a46c7c6..17d56b8 100644 (file)
--- a/README
+++ b/README
@@ -1932,14 +1932,6 @@ The following options need to be configured:
                SPI configuration items (port pins to use, etc). For
                an example, see include/configs/sacsng.h.
 
-               CONFIG_HARD_SPI
-
-               Enables a hardware SPI driver for general-purpose reads
-               and writes.  As with CONFIG_SOFT_SPI, the board configuration
-               must define a list of chip-select function pointers.
-               Currently supported on some MPC8xxx processors.  For an
-               example, see include/configs/mpc8349emds.h.
-
                CONFIG_SYS_SPI_MXC_WAIT
                Timeout for waiting until spi transfer completed.
                default: (CONFIG_SYS_HZ/100)     /* 10 ms */
index 849a69a..c9c9964 100644 (file)
   #define HWCONFIG_BUFFER_SIZE 256
 #endif
 
-/* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */
-#if defined(CONFIG_MPC8XXX_SPI) || defined(CONFIG_FSL_ESPI)
-# ifndef CONFIG_HARD_SPI
-#  define CONFIG_HARD_SPI
-# endif
-#endif
-
 #define CONFIG_LMB
 #define CONFIG_SYS_BOOT_RAMDISK_HIGH
 
index 4ec0af4..d40ed37 100644 (file)
@@ -273,7 +273,7 @@ void spi_cs_deactivate(struct spi_slave *slave)
 
        iopd->dat |=  SPI_CS_MASK;
 }
-#endif /* CONFIG_HARD_SPI */
+#endif
 
 #if defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, bd_t *bd)
index a411d4e..d547af4 100644 (file)
@@ -208,4 +208,4 @@ void spi_cs_deactivate(struct spi_slave *slave)
        /* deactivate the spi_cs */
        setbits_be32(&iopd->dat, IDSCPLD_SPI_CS_MASK);
 }
-#endif /* CONFIG_HARD_SPI */
+#endif
index 60634e5..a3e80ca 100644 (file)
@@ -257,15 +257,6 @@ __weak int init_func_vid(void)
 }
 #endif
 
-#if defined(CONFIG_HARD_SPI)
-static int init_func_spi(void)
-{
-       puts("SPI:   ");
-       puts("ready\n");
-       return 0;
-}
-#endif
-
 static int setup_mon_len(void)
 {
 #if defined(__ARM__) || defined(__MICROBLAZE__)
@@ -864,9 +855,6 @@ static const init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
        init_func_vid,
 #endif
-#if defined(CONFIG_HARD_SPI)
-       init_func_spi,
-#endif
        announce_dram_init,
        dram_init,              /* configure available RAM banks */
 #ifdef CONFIG_POST
index 11cb395..83d7745 100644 (file)
 
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
-#define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE         0x7
 #ifdef CONFIG_CMD_SPI
 #      define CONFIG_SYS_DSPI_CS2
index f08896e..4b8ef38 100644 (file)
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
-#define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE         0x7
 #ifdef CONFIG_CMD_SPI
 
index 16becbd..87cdbae 100644 (file)
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
 #define CONFIG_SERIAL_FLASH
-#define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE         0x7
 #ifdef CONFIG_CMD_SPI
 
index 99b60d5..d41b7c4 100644 (file)
 
 /* DSPI and Serial Flash */
 #define CONFIG_CF_DSPI
-#define CONFIG_HARD_SPI
 #define CONFIG_SYS_SBFHDR_SIZE         0x13
 #ifdef CONFIG_CMD_SPI
 
index 524a10f..86a1233 100644 (file)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_BUS_NUM      1
 
-/*
- * eSPI - Enhanced SPI
- */
-#define CONFIG_HARD_SPI
-
 #if defined(CONFIG_SPI_FLASH)
 #define CONFIG_SF_DEFAULT_SPEED        10000000
 #define CONFIG_SF_DEFAULT_MODE 0
index c9ed70c..eeb19a9 100644 (file)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_BUS_NUM      1
 
-/*
- * eSPI - Enhanced SPI
- */
-
-#define CONFIG_HARD_SPI
-
 #define CONFIG_SF_DEFAULT_SPEED                10000000
 #define CONFIG_SF_DEFAULT_MODE         0
 
index 423ecd7..1bbe9d9 100644 (file)
 #define CONFIG_SYS_I2C_NCT72_ADDR      0x4C
 #define CONFIG_SYS_I2C_IDT6V49205B     0x69
 
-/*
- * eSPI - Enhanced SPI
- */
-#define CONFIG_HARD_SPI
-
 #define CONFIG_SF_DEFAULT_SPEED                10000000
 #define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
 
index 4adcd95..1908d35 100644 (file)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 
 #ifndef CONFIG_TRAILBLAZER
-/*
- * eSPI - Enhanced SPI
- */
-#define CONFIG_HARD_SPI
 
 #define CONFIG_SF_DEFAULT_SPEED                10000000
 #define CONFIG_SF_DEFAULT_MODE         0
index 1c94bf9..f4d7172 100644 (file)
@@ -35,7 +35,6 @@
 #endif
 
 #ifdef CONFIG_CMD_SF
-#define CONFIG_HARD_SPI                        1
 #define CONFIG_ENV_SPI_BUS             0
 #define CONFIG_ENV_SPI_CS              0
 #define CONFIG_ENV_SPI_MAX_HZ          50000000 /* 50 MHz */
index c06f005..2c7928e 100644 (file)
@@ -38,7 +38,6 @@
 #endif
 
 #ifdef CONFIG_CMD_SF
-#define CONFIG_HARD_SPI                        1
 #define CONFIG_ENV_SPI_BUS             0
 #define CONFIG_ENV_SPI_CS              0
 #define CONFIG_ENV_SPI_MAX_HZ          50000000 /* 50 MHz */
index 28124dd..7e4c497 100644 (file)
  */
 #define CONFIG_TSEC1
 #define CONFIG_TSEC2
-#define CONFIG_HARD_SPI
 
 /*
  * NOR FLASH setup
 #define CONFIG_SYS_I2C_RTC_ADDR        0x51
 
 /*
- * SPI setup
- */
-#ifdef CONFIG_HARD_SPI
-#define CONFIG_SYS_GPIO1_PRELIM
-#define CONFIG_SYS_GPIO1_DIR           0x00000001
-#define CONFIG_SYS_GPIO1_DAT           0x00000001
-#endif
-
-/*
  * Ethernet setup
  */
 #ifdef CONFIG_TSEC1
index 7d84d16..4765764 100644 (file)
@@ -43,7 +43,6 @@
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE   UART1_BASE
 
-#define CONFIG_HARD_SPI
 #define CONFIG_DEFAULT_SPI_BUS 1
 #define CONFIG_DEFAULT_SPI_MODE        (SPI_MODE_0 | SPI_CS_HIGH)
 
index 9e59e7a..4bb3621 100644 (file)
 
 /* SPI */
 #ifdef CONFIG_CMD_SPI
-#define CONFIG_HARD_SPI
 #define CONFIG_SPI_HALF_DUPLEX
 #endif
 
index 9465fb4..459ecf3 100644 (file)
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
-/*
- * eSPI - Enhanced SPI
- */
-#define CONFIG_HARD_SPI
-
 #if defined(CONFIG_SPI_FLASH)
 #define CONFIG_SF_DEFAULT_SPEED        10000000
 #define CONFIG_SF_DEFAULT_MODE 0
index d018c22..4f48370 100644 (file)
@@ -214,11 +214,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
 
-/*
- * eSPI - Enhanced SPI
- */
-#define CONFIG_HARD_SPI
-
 #if defined(CONFIG_PCI)
 /*
  * General PCI
index c408db8..33ddc67 100644 (file)
@@ -66,7 +66,6 @@
 #define CONFIG_CF_DSPI
 #define CONFIG_SF_DEFAULT_SPEED                50000000
 #define CONFIG_SERIAL_FLASH
-#define CONFIG_HARD_SPI
 #define CONFIG_ENV_SPI_BUS             0
 #define CONFIG_ENV_SPI_CS              1
 
index 956f779..4e274bd 100644 (file)
 #define CONFIG_MXC_UART_BASE   UART1_BASE
 
 /*
- * SPI Configs
- * */
-#define CONFIG_HARD_SPI /* puts SPI: ready */
-
-/*
  * MMC Configs
  * */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      MMC_SDHC1_BASE_ADDR
index abfb0ff..1404fd8 100644 (file)
@@ -750,7 +750,6 @@ CONFIG_G_DNL_UMS_PRODUCT_NUM
 CONFIG_G_DNL_UMS_VENDOR_NUM
 CONFIG_H264_FREQ
 CONFIG_H8300
-CONFIG_HARD_SPI
 CONFIG_HAS_ETH0
 CONFIG_HAS_ETH1
 CONFIG_HAS_ETH2