Merge tag 'u-boot-amlogic-20200708' of https://gitlab.denx.de/u-boot/custodians/u...
authorTom Rini <trini@konsulko.com>
Wed, 8 Jul 2020 14:40:32 +0000 (10:40 -0400)
committerTom Rini <trini@konsulko.com>
Wed, 8 Jul 2020 14:40:32 +0000 (10:40 -0400)
- Add proper Odroid-N2 board support code
- Add support for Odroid-C4 single board computer

19 files changed:
arch/arm/dts/Makefile
arch/arm/dts/meson-g12-common.dtsi
arch/arm/dts/meson-g12.dtsi
arch/arm/dts/meson-g12b-khadas-vim3.dtsi
arch/arm/dts/meson-g12b-s922x.dtsi
arch/arm/dts/meson-g12b.dtsi
arch/arm/dts/meson-khadas-vim3.dtsi
arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/meson-sm1-odroid-c4.dts [new file with mode: 0644]
arch/arm/dts/meson-sm1-sei610.dts
arch/arm/dts/meson-sm1.dtsi
board/amlogic/odroid-n2/MAINTAINERS [new file with mode: 0644]
board/amlogic/odroid-n2/Makefile [new file with mode: 0644]
board/amlogic/odroid-n2/odroid-n2.c [new file with mode: 0644]
board/amlogic/w400/MAINTAINERS
configs/odroid-c4_defconfig [new file with mode: 0644]
configs/odroid-n2_defconfig
doc/board/amlogic/index.rst
doc/board/amlogic/odroid-c4.rst [new file with mode: 0644]

index d345e30..d839cb4 100644 (file)
@@ -163,6 +163,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
        meson-g12b-odroid-n2.dtb \
        meson-g12b-a311d-khadas-vim3.dtb \
        meson-sm1-khadas-vim3l.dtb \
+       meson-sm1-odroid-c4.dtb \
        meson-sm1-sei610.dtb
 dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra20-medcom-wide.dtb \
index 0882ea2..593a006 100644 (file)
                                };
                        };
 
+                       acodec: audio-controller@32000 {
+                               compatible = "amlogic,t9015";
+                               reg = <0x0 0x32000 0x0 0x14>;
+                               #sound-dai-cells = <0>;
+                               sound-name-prefix = "ACODEC";
+                               clocks = <&clkc CLKID_AUDIO_CODEC>;
+                               clock-names = "pclk";
+                               resets = <&reset RESET_AUDIO_CODEC>;
+                               status = "disabled";
+                       };
+
                        periphs: bus@34400 {
                                compatible = "simple-bus";
                                reg = <0x0 0x34400 0x0 0x400>;
                                reg = <0x0 0xff400000 0x0 0x40000>;
                                interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
-                               clock-names = "ddr";
+                               clock-names = "otg";
                                phys = <&usb2_phy1>;
                                phy-names = "usb2-phy";
                                dr_mode = "peripheral";
index 55d3902..6a1f4dc 100644 (file)
                        status = "disabled";
                };
 
+               toacodec: audio-controller@740 {
+                       compatible = "amlogic,g12a-toacodec";
+                       reg = <0x0 0x740 0x0 0x4>;
+                       #sound-dai-cells = <1>;
+                       sound-name-prefix = "TOACODEC";
+                       resets = <&clkc_audio AUD_RESET_TOACODEC>;
+                       status = "disabled";
+               };
+
                tohdmitx: audio-controller@744 {
                        compatible = "amlogic,g12a-tohdmitx";
                        reg = <0x0 0x744 0x0 0x4>;
        };
 };
 
-&cpu_thermal {
-       cooling-maps {
-               map0 {
-                       trip = <&cpu_passive>;
-                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-               };
-               map1 {
-                       trip = <&cpu_hot>;
-                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-                                        <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-               };
-       };
-};
-
 &ethmac {
        power-domains = <&pwrc PWRC_G12A_ETH_ID>;
 };
index c33e85f..224c890 100644 (file)
        sound {
                compatible = "amlogic,axg-sound-card";
                model = "G12B-KHADAS-VIM3";
-               audio-aux-devs = <&tdmout_b>;
-               audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
-                               "TDMOUT_B IN 1", "FRDDR_B OUT 1",
-                               "TDMOUT_B IN 2", "FRDDR_C OUT 1",
-                               "TDM_B Playback", "TDMOUT_B OUT";
+               audio-aux-devs = <&tdmout_a>;
+               audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
+                               "TDMOUT_A IN 1", "FRDDR_B OUT 0",
+                               "TDMOUT_A IN 2", "FRDDR_C OUT 0",
+                               "TDM_A Playback", "TDMOUT_A OUT";
 
                assigned-clocks = <&clkc CLKID_MPLL2>,
                                  <&clkc CLKID_MPLL0>,
@@ -80,7 +80,7 @@
 
                /* 8ch hdmi interface */
                dai-link-3 {
-                       sound-dai = <&tdmif_b>;
+                       sound-dai = <&tdmif_a>;
                        dai-format = "i2s";
                        dai-tdm-slot-tx-mask-0 = <1 1>;
                        dai-tdm-slot-tx-mask-1 = <1 1>;
@@ -89,7 +89,7 @@
                        mclk-fs = <256>;
 
                        codec {
-                               sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
+                               sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
                        };
                };
 
        clock-latency = <50000>;
 };
 
+&frddr_a {
+       status = "okay";
+};
+
 &frddr_b {
        status = "okay";
 };
        status = "okay";
 };
 
-&tdmif_b {
+&tdmif_a {
        status = "okay";
 };
 
-&tdmout_b {
+&tdmout_a {
        status = "okay";
 };
 
index 046cc33..1e5d0ee 100644 (file)
                        opp-hz = /bits/ 64 <1896000000>;
                        opp-microvolt = <981000>;
                };
+
+               opp-1992000000 {
+                       opp-hz = /bits/ 64 <1992000000>;
+                       opp-microvolt = <1001000>;
+               };
        };
 
        cpub_opp_table_1: opp-table-1 {
                        opp-hz = /bits/ 64 <1704000000>;
                        opp-microvolt = <891000>;
                };
+
+               opp-1800000000 {
+                       opp-hz = /bits/ 64 <1800000000>;
+                       opp-microvolt = <981000>;
+               };
+
+               opp-1908000000 {
+                       opp-hz = /bits/ 64 <1908000000>;
+                       opp-microvolt = <1022000>;
+               };
        };
 };
index 6dbc396..9b8548e 100644 (file)
        compatible = "amlogic,g12b-clkc";
 };
 
+&cpu_thermal {
+       cooling-maps {
+               map0 {
+                       trip = <&cpu_passive>;
+                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+               map1 {
+                       trip = <&cpu_hot>;
+                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                        <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+       };
+};
index 094ecf2..1ef1e36 100644 (file)
        leds {
                compatible = "gpio-leds";
 
-               white {
+               led-white {
                        label = "vim3:white:sys";
                        gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
                        linux,default-trigger = "heartbeat";
                };
 
-               red {
+               led-red {
                        label = "vim3:red";
                        gpios = <&gpio_expander 5 GPIO_ACTIVE_LOW>;
                };
diff --git a/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-c4-u-boot.dtsi
new file mode 100644 (file)
index 0000000..2a8f054
--- /dev/null
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include "meson-g12-common-u-boot.dtsi"
+
+&ethmac {
+       snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+       snps,reset-delays-us = <0 10000 1000000>;
+       snps,reset-active-low;
+};
diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts b/arch/arm/dts/meson-sm1-odroid-c4.dts
new file mode 100644 (file)
index 0000000..00d90b3
--- /dev/null
@@ -0,0 +1,402 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "meson-sm1.dtsi"
+#include <dt-bindings/gpio/meson-g12a-gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+       compatible = "hardkernel,odroid-c4", "amlogic,sm1";
+       model = "Hardkernel ODROID-C4";
+
+       aliases {
+               serial0 = &uart_AO;
+               ethernet0 = &ethmac;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x0 0x0 0x40000000>;
+       };
+
+       emmc_pwrseq: emmc-pwrseq {
+               compatible = "mmc-pwrseq-emmc";
+               reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led-blue {
+                       color = <LED_COLOR_ID_BLUE>;
+                       function = LED_FUNCTION_STATUS;
+                       gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "heartbeat";
+                       panic-indicator;
+               };
+       };
+
+       tflash_vdd: regulator-tflash_vdd {
+               compatible = "regulator-fixed";
+
+               regulator-name = "TFLASH_VDD";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               regulator-always-on;
+       };
+
+       tf_io: gpio-regulator-tf_io {
+               compatible = "regulator-gpio";
+
+               regulator-name = "TF_IO";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpios = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
+               gpios-states = <0>;
+
+               states = <3300000 0>,
+                        <1800000 1>;
+       };
+
+       flash_1v8: regulator-flash_1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "FLASH_1V8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               vin-supply = <&vcc_3v3>;
+               regulator-always-on;
+       };
+
+       main_12v: regulator-main_12v {
+               compatible = "regulator-fixed";
+               regulator-name = "12V";
+               regulator-min-microvolt = <12000000>;
+               regulator-max-microvolt = <12000000>;
+               regulator-always-on;
+       };
+
+       vcc_5v: regulator-vcc_5v {
+               compatible = "regulator-fixed";
+               regulator-name = "5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               vin-supply = <&main_12v>;
+       };
+
+       vcc_1v8: regulator-vcc_1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "VCC_1V8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               vin-supply = <&vcc_3v3>;
+               regulator-always-on;
+       };
+
+       vcc_3v3: regulator-vcc_3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "VCC_3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&vddao_3v3>;
+               regulator-always-on;
+               /* FIXME: actually controlled by VDDCPU_B_EN */
+       };
+
+       vddcpu: regulator-vddcpu {
+               /*
+                * MP8756GD Regulator.
+                */
+               compatible = "pwm-regulator";
+
+               regulator-name = "VDDCPU";
+               regulator-min-microvolt = <721000>;
+               regulator-max-microvolt = <1022000>;
+
+               vin-supply = <&main_12v>;
+
+               pwms = <&pwm_AO_cd 1 1250 0>;
+               pwm-dutycycle-range = <100 0>;
+
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       hub_5v: regulator-hub_5v {
+               compatible = "regulator-fixed";
+               regulator-name = "HUB_5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&vcc_5v>;
+
+               /* Connected to the Hub CHIPENABLE, LOW sets low power state */
+               gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       usb_pwr_en: regulator-usb_pwr_en {
+               compatible = "regulator-fixed";
+               regulator-name = "USB_PWR_EN";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               vin-supply = <&vcc_5v>;
+
+               /* Connected to the microUSB port power enable */
+               gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vddao_1v8: regulator-vddao_1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "VDDAO_1V8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               vin-supply = <&vddao_3v3>;
+               regulator-always-on;
+       };
+
+       vddao_3v3: regulator-vddao_3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "VDDAO_3V3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&main_12v>;
+               regulator-always-on;
+       };
+
+       hdmi-connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_connector_in: endpoint {
+                               remote-endpoint = <&hdmi_tx_tmds_out>;
+                       };
+               };
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&vddcpu>;
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPU_CLK>;
+       clock-latency = <50000>;
+};
+
+&cpu1 {
+       cpu-supply = <&vddcpu>;
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPU1_CLK>;
+       clock-latency = <50000>;
+};
+
+&cpu2 {
+       cpu-supply = <&vddcpu>;
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPU2_CLK>;
+       clock-latency = <50000>;
+};
+
+&cpu3 {
+       cpu-supply = <&vddcpu>;
+       operating-points-v2 = <&cpu_opp_table>;
+       clocks = <&clkc CLKID_CPU3_CLK>;
+       clock-latency = <50000>;
+};
+
+&ext_mdio {
+       external_phy: ethernet-phy@0 {
+               /* Realtek RTL8211F (0x001cc916) */
+               reg = <0>;
+               max-speed = <1000>;
+
+               interrupt-parent = <&gpio_intc>;
+               /* MAC_INTR on GPIOZ_14 */
+               interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+       };
+};
+
+&ethmac {
+       pinctrl-0 = <&eth_pins>, <&eth_rgmii_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+       phy-mode = "rgmii";
+       phy-handle = <&external_phy>;
+       amlogic,tx-delay-ns = <2>;
+};
+
+&gpio {
+       gpio-line-names =
+               /* GPIOZ */
+               "", "", "", "", "", "", "", "",
+               "", "", "", "", "", "", "", "",
+               /* GPIOH */
+               "", "", "", "", "",
+               "PIN_36", /* GPIOH_5 */
+               "PIN_26", /* GPIOH_6 */
+               "PIN_32", /* GPIOH_7 */
+               "",
+               /* BOOT */
+               "", "", "", "", "", "", "", "",
+               "", "", "", "", "", "", "", "",
+               /* GPIOC */
+               "", "", "", "", "", "", "", "",
+               /* GPIOA */
+               "", "", "", "", "", "", "", "",
+               "", "", "", "", "", "",
+               "PIN_27", /* GPIOA_14 */
+               "PIN_28", /* GPIOA_15 */
+               /* GPIOX */
+               "PIN_16", /* GPIOX_0 */
+               "PIN_18", /* GPIOX_1 */
+               "PIN_22", /* GPIOX_2 */
+               "PIN_11", /* GPIOX_3 */
+               "PIN_13", /* GPIOX_4 */
+               "PIN_7",  /* GPIOX_5 */
+               "PIN_33", /* GPIOX_6 */
+               "PIN_15", /* GPIOX_7 */
+               "PIN_19", /* GPIOX_8 */
+               "PIN_21", /* GPIOX_9 */
+               "PIN_24", /* GPIOX_10 */
+               "PIN_23", /* GPIOX_11 */
+               "PIN_8",  /* GPIOX_12 */
+               "PIN_10", /* GPIOX_13 */
+               "PIN_29", /* GPIOX_14 */
+               "PIN_31", /* GPIOX_15 */
+               "PIN_12", /* GPIOX_16 */
+               "PIN_3",  /* GPIOX_17 */
+               "PIN_5",  /* GPIOX_18 */
+               "PIN_35"; /* GPIOX_19 */
+
+       /*
+        * WARNING: The USB Hub on the Odroid-C4 needs a reset signal
+        * to be turned high in order to be detected by the USB Controller
+        * This signal should be handled by a USB specific power sequence
+        * in order to reset the Hub when USB bus is powered down.
+        */
+       usb-hub {
+               gpio-hog;
+               gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "usb-hub-reset";
+       };
+};
+
+&gpio_ao {
+       gpio-line-names =
+               /* GPIOAO */
+               "", "", "", "",
+               "PIN_47", /* GPIOAO_4 */
+               "", "",
+               "PIN_45", /* GPIOAO_7 */
+               "PIN_46", /* GPIOAO_8 */
+               "PIN_44", /* GPIOAO_9 */
+               "PIN_42", /* GPIOAO_10 */
+               "",
+               /* GPIOE */
+               "", "", "";
+};
+
+&hdmi_tx {
+       status = "okay";
+       pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
+       pinctrl-names = "default";
+       hdmi-supply = <&vcc_5v>;
+};
+
+&hdmi_tx_tmds_port {
+       hdmi_tx_tmds_out: endpoint {
+               remote-endpoint = <&hdmi_connector_in>;
+       };
+};
+
+&ir {
+       status = "okay";
+       pinctrl-0 = <&remote_input_ao_pins>;
+       pinctrl-names = "default";
+       linux,rc-map-name = "rc-odroid";
+};
+
+&pwm_AO_cd {
+       pinctrl-0 = <&pwm_ao_d_e_pins>;
+       pinctrl-names = "default";
+       clocks = <&xtal>;
+       clock-names = "clkin1";
+       status = "okay";
+};
+
+&saradc {
+       status = "okay";
+};
+
+/* SD card */
+&sd_emmc_b {
+       status = "okay";
+       pinctrl-0 = <&sdcard_c_pins>;
+       pinctrl-1 = <&sdcard_clk_gate_c_pins>;
+       pinctrl-names = "default", "clk-gate";
+
+       bus-width = <4>;
+       cap-sd-highspeed;
+       max-frequency = <200000000>;
+       sd-uhs-sdr12;
+       sd-uhs-sdr25;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       disable-wp;
+
+       cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
+       vmmc-supply = <&tflash_vdd>;
+       vqmmc-supply = <&tf_io>;
+};
+
+/* eMMC */
+&sd_emmc_c {
+       status = "okay";
+       pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
+       pinctrl-1 = <&emmc_clk_gate_pins>;
+       pinctrl-names = "default", "clk-gate";
+
+       bus-width = <8>;
+       cap-mmc-highspeed;
+       mmc-ddr-1_8v;
+       mmc-hs200-1_8v;
+       max-frequency = <200000000>;
+       disable-wp;
+
+       mmc-pwrseq = <&emmc_pwrseq>;
+       vmmc-supply = <&vcc_3v3>;
+       vqmmc-supply = <&flash_1v8>;
+};
+
+&uart_AO {
+       status = "okay";
+       pinctrl-0 = <&uart_ao_a_pins>;
+       pinctrl-names = "default";
+};
+
+&usb {
+       status = "okay";
+       vbus-supply = <&usb_pwr_en>;
+};
+
+&usb2_phy0 {
+       phy-supply = <&vcc_5v>;
+};
+
+&usb2_phy1 {
+       /* Enable the hub which is connected to this port */
+       phy-supply = <&hub_5v>;
+};
index dfb2438..5ab139a 100644 (file)
        leds {
                compatible = "gpio-leds";
 
-               bluetooth {
+               led-bluetooth {
                        label = "sei610:blue:bt";
                        gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
                        default-state = "off";
index d4ec735..71317f5 100644 (file)
@@ -56,6 +56,7 @@
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
@@ -64,6 +65,7 @@
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@2 {
@@ -72,6 +74,7 @@
                        reg = <0x0 0x2>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@3 {
@@ -80,6 +83,7 @@
                        reg = <0x0 0x3>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                l2: l2-cache0 {
        compatible = "amlogic,sm1-clkc";
 };
 
+&cpu_thermal {
+       cooling-maps {
+               map0 {
+                       trip = <&cpu_passive>;
+                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+
+               map1 {
+                       trip = <&cpu_hot>;
+                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+       };
+};
+
 &ethmac {
        power-domains = <&pwrc PWRC_SM1_ETH_ID>;
 };
diff --git a/board/amlogic/odroid-n2/MAINTAINERS b/board/amlogic/odroid-n2/MAINTAINERS
new file mode 100644 (file)
index 0000000..77f7746
--- /dev/null
@@ -0,0 +1,9 @@
+ODROID-N2
+M:     Neil Armstrong <narmstrong@baylibre.com>
+S:     Maintained
+L:     u-boot-amlogic@groups.io
+F:     board/amlogic/odroid-n2/
+F:     configs/odroid-n2_defconfig
+F:     configs/odroid-c4_defconfig
+F:     doc/board/amlogic/odroid-n2.rst
+F:     doc/board/amlogic/odroid-c4.rst
diff --git a/board/amlogic/odroid-n2/Makefile b/board/amlogic/odroid-n2/Makefile
new file mode 100644 (file)
index 0000000..68e4e2a
--- /dev/null
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2020 BayLibre, SAS
+# Author: Neil Armstrong <narmstrong@baylibre.com>
+
+obj-y  := odroid-n2.o
diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c
new file mode 100644 (file)
index 0000000..caf7fd6
--- /dev/null
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <env.h>
+#include <init.h>
+#include <net.h>
+#include <asm/io.h>
+#include <asm/arch/sm.h>
+#include <asm/arch/eth.h>
+
+#define EFUSE_MAC_OFFSET       20
+#define EFUSE_MAC_SIZE         12
+#define MAC_ADDR_LEN           6
+
+int misc_init_r(void)
+{
+       u8 mac_addr[MAC_ADDR_LEN];
+       char efuse_mac_addr[EFUSE_MAC_SIZE], tmp[3];
+       ssize_t len;
+
+       meson_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
+
+       if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
+               len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+                                         efuse_mac_addr, EFUSE_MAC_SIZE);
+               if (len != EFUSE_MAC_SIZE)
+                       return 0;
+
+               /* MAC is stored in ASCII format, 1bytes = 2characters */
+               for (int i = 0; i < 6; i++) {
+                       tmp[0] = efuse_mac_addr[i * 2];
+                       tmp[1] = efuse_mac_addr[i * 2 + 1];
+                       tmp[2] = '\0';
+                       mac_addr[i] = simple_strtoul(tmp, NULL, 16);
+               }
+
+               if (is_valid_ethaddr(mac_addr))
+                       eth_env_set_enetaddr("ethaddr", mac_addr);
+               else
+                       meson_generate_serial_ethaddr();
+       }
+
+       return 0;
+}
index 5e837cf..a1b0ac8 100644 (file)
@@ -5,8 +5,6 @@ L:      u-boot-amlogic@groups.io
 F:     board/amlogic/w400/
 F:     configs/khadas-vim3_defconfig
 F:     configs/khadas-vim3l_defconfig
-F:     configs/odroid-n2_defconfig
 F:     doc/board/amlogic/w400.rst
 F:     doc/board/amlogic/khadas-vim3.rst
 F:     doc/board/amlogic/khadas-vim3l.rst
-F:     doc/board/amlogic/odroid-n2.rst
diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig
new file mode 100644 (file)
index 0000000..db92719
--- /dev/null
@@ -0,0 +1,62 @@
+CONFIG_ARM=y
+CONFIG_SYS_BOARD="odroid-n2"
+CONFIG_ARCH_MESON=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_DM_GPIO=y
+CONFIG_MESON_G12A=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEBUG_UART_BASE=0xff803000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_IDENT_STRING=" odroid-c4"
+CONFIG_DEBUG_UART=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_MISC_INIT_R=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_IMI is not set
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_MESON_GX=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_MESON_G12A_USB_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_RESET=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_DWC3_MESON_G12A=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
+CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
+CONFIG_OF_LIBFDT_OVERLAY=y
index e0cc6e3..0638094 100644 (file)
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_SYS_BOARD="w400"
+CONFIG_SYS_BOARD="odroid-n2"
 CONFIG_ARCH_MESON=y
 CONFIG_SYS_TEXT_BASE=0x01000000
 CONFIG_ENV_SIZE=0x2000
index 3730419..0e2f8c9 100644 (file)
@@ -17,7 +17,7 @@ This matrix concerns the actual source code version.
 +===============================+===========+==============+==============+============+============+=============+==============+
 | Boards                               | Odroid-C2 | P212         | Khadas VIM2  | S400       | U200       | Odroid-N2   | SEI610       |
 |                              | Nanopi-K2 | Khadas-VIM   | Libretech-PC |            | SEI510     | Khadas-VIM3 | Khadas-VIM3L |
-|                              | P200      | LibreTech-CC |              |            |            |             |              |
+|                              | P200      | LibreTech-CC |              |            |            |             | Odroid-C4    |
 |                              | P201      | LibreTech-AC |              |            |            |             |              |
 +-------------------------------+-----------+--------------+--------------+------------+------------+-------------+--------------+
 | UART                         | **Yes**   | **Yes**      | **Yes**      | **Yes**    | **Yes**    | **Yes**     | **Yes**      |
@@ -83,6 +83,7 @@ Board Documentation
    libretech-cc
    nanopi-k2
    odroid-c2
+   odroid-c4
    odroid-n2
    p200
    p201
diff --git a/doc/board/amlogic/odroid-c4.rst b/doc/board/amlogic/odroid-c4.rst
new file mode 100644 (file)
index 0000000..5a5a868
--- /dev/null
@@ -0,0 +1,134 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for ODROID-C4
+====================
+
+ODROID-C4 is a single board computer manufactured by Hardkernel
+Co. Ltd with the following specifications:
+
+ - Amlogic S905X3 Arm Cortex-A55 quad-core SoC
+ - 4GB DDR4 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.1 display
+ - 40-pin GPIO header
+ - 4x USB 3.0 Host
+ - 1x USB 2.0 Host/OTG (micro)
+ - eMMC, microSD
+ - UART serial
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+U-Boot compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make odroid-c4_defconfig
+    $ make
+
+Image creation
+--------------
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=odroid-c4
+    $ git clone --depth 1 \
+       https://github.com/hardkernel/u-boot.git -b odroidg12-v2015.01 \
+       $DIR
+
+    $ cd odroid-c4
+    $ make odroidc4_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Go back to mainline U-Boot source tree then :
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/hardkernel/odroidc4/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+       fip/bl30.bin \
+       fip/zero_tmp \
+       fip/bl30_zero.bin \
+       fip/bl301.bin \
+       fip/bl301_zero.bin \
+       fip/bl30_new.bin \
+       bl30
+
+    $ sh fip/blx_fix.sh \
+       fip/bl2.bin \
+       fip/zero_tmp \
+       fip/bl2_zero.bin \
+       fip/acs.bin \
+       fip/bl21_zero.bin \
+       fip/bl2_new.bin \
+       bl2
+
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                       --output fip/bl30_new.bin.g12a.enc \
+                                       --level v3
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                       --output fip/bl30_new.bin.enc \
+                                       --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                       --output fip/bl31.img.enc \
+                                       --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                       --output fip/bl33.bin.enc \
+                                       --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                       --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
+               --output fip/u-boot.bin \
+               --bl2 fip/bl2.n.bin.sig \
+               --bl30 fip/bl30_new.bin.enc \
+               --bl31 fip/bl31.img.enc \
+               --bl33 fip/bl33.bin.enc \
+               --ddrfw1 fip/ddr4_1d.fw \
+               --ddrfw2 fip/ddr4_2d.fw \
+               --ddrfw3 fip/ddr3_1d.fw \
+               --ddrfw4 fip/piei.fw \
+               --ddrfw5 fip/lpddr4_1d.fw \
+               --ddrfw6 fip/lpddr4_2d.fw \
+               --ddrfw7 fip/diag_lpddr4.fw \
+               --ddrfw8 fip/aml_ddr.fw \
+               --ddrfw9 fip/lpddr3_1d.fw \
+               --level v3
+
+and then write the image to SD with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/your_sd_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444