Merge tag 'v2023.01-rc4' into next
authorTom Rini <trini@konsulko.com>
Mon, 19 Dec 2022 14:29:55 +0000 (09:29 -0500)
committerTom Rini <trini@konsulko.com>
Wed, 21 Dec 2022 18:09:01 +0000 (13:09 -0500)
Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
29 files changed:
1  2 
Kconfig
Makefile
arch/Kconfig
arch/arm/Kconfig
board/Marvell/mvebu_armada-37xx/board.c
boot/pxe_utils.c
common/spl/Kconfig
configs/CHIP_pro_defconfig
configs/Nintendo_NES_Classic_Edition_defconfig
configs/bayleybay_defconfig
configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
configs/conga-qeval20-qa3-e3845_defconfig
configs/minnowmax_defconfig
configs/pinecube_defconfig
configs/puma-rk3399_defconfig
configs/roc-pc-rk3399_defconfig
configs/rock-pi-4-rk3399_defconfig
configs/rock-pi-4c-rk3399_defconfig
configs/som-db5800-som-6867_defconfig
configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
configs/theadorable-x86-conga-qa3-e3845_defconfig
drivers/mtd/nand/raw/Kconfig
drivers/mtd/nand/raw/omap_gpmc.c
drivers/net/tsec.c
drivers/usb/gadget/rndis.c
include/configs/rk3399_common.h
include/configs/sunxi-common.h
lib/Kconfig
scripts/config_whitelist.txt

diff --cc Kconfig
Simple merge
diff --cc Makefile
Simple merge
diff --cc arch/Kconfig
@@@ -111,8 -111,9 +111,8 @@@ config RISC
        select SUPPORT_OF_CONTROL
        select OF_CONTROL
        select DM
-       select SPL_SEPARATE_BSS if SPL
+       imply SPL_SEPARATE_BSS if SPL
        imply DM_SERIAL
 -      imply DM_ETH
        imply DM_EVENT
        imply DM_MMC
        imply DM_SPI
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
@@@ -8,9 -8,7 +8,8 @@@ CONFIG_DRAM_CLK=50
  CONFIG_DRAM_ODT_EN=y
  CONFIG_I2C0_ENABLE=y
  # CONFIG_HAS_ARMV7_SECURE_BASE is not set
- CONFIG_SYS_MONITOR_LEN=786432
  CONFIG_SPL_I2C=y
 +# CONFIG_NET is not set
  CONFIG_SPL_SYS_I2C_LEGACY=y
  CONFIG_SYS_I2C_MVTWSI=y
  CONFIG_SYS_I2C_SLAVE=0x7f
Simple merge
@@@ -66,9 -69,10 +69,11 @@@ CONFIG_PWM_ROCKCHIP=
  # CONFIG_RAM_ROCKCHIP_DEBUG is not set
  CONFIG_RAM_RK3399_LPDDR4=y
  CONFIG_DM_RESET=y
+ CONFIG_DM_RNG=y
+ CONFIG_RNG_ROCKCHIP=y
  CONFIG_BAUDRATE=1500000
  CONFIG_DEBUG_UART_SHIFT=2
 +CONFIG_SYS_NS16550_MEM32=y
  CONFIG_ROCKCHIP_SPI=y
  CONFIG_SYSRESET=y
  CONFIG_USB=y
Simple merge
Simple merge
Simple merge
Simple merge
@@@ -1021,9 -1035,12 +1035,12 @@@ int board_nand_init(struct nand_chip *n
  
        nand->IO_ADDR_R = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat;
        nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd;
-       omap_nand_info[cs].control = NULL;
-       omap_nand_info[cs].cs = cs;
-       omap_nand_info[cs].ws = wscfg[cs];
+       info = &omap_nand_info[cs];
+       info->control = NULL;
+       info->cs = cs;
+       info->ws = wscfg[cs];
 -      info->fifo = (void __iomem *)CONFIG_SYS_NAND_BASE;
++      info->fifo = (void __iomem *)CFG_SYS_NAND_BASE;
        nand_set_controller_data(nand, &omap_nand_info[cs]);
        nand->cmd_ctrl  = omap_nand_hwcontrol;
        nand->options   |= NAND_NO_PADDING | NAND_CACHEPRG;
Simple merge
Simple merge
  /* RAW SD card / eMMC locations. */
  
  /* FAT sd card locations. */
 -#define CONFIG_SYS_SDRAM_BASE         0
 +#define CFG_SYS_SDRAM_BASE            0
  #define SDRAM_MAX_SIZE                        0xf8000000
  
+ #define ROCKPI_4B_IDBLOADER_IMAGE_GUID \
+       EFI_GUID(0x02f4d760, 0xcfd5, 0x43bd, 0x8e, 0x2d, \
+                0xa4, 0x2a, 0xcb, 0x33, 0xc6, 0x60)
+ #define ROCKPI_4B_UBOOT_IMAGE_GUID \
+       EFI_GUID(0x4ce292da, 0x1dd8, 0x428d, 0xa1, 0xc2, \
+                0x77, 0x74, 0x3e, 0xf8, 0xb9, 0x6e)
+ #define ROCKPI_4C_IDBLOADER_IMAGE_GUID \
+       EFI_GUID(0xfd68510c, 0x12d3, 0x4f0a, 0xb8, 0xd3, \
+                0xd8, 0x79, 0xe1, 0xd3, 0xa5, 0x40)
+ #define ROCKPI_4C_UBOOT_IMAGE_GUID \
+       EFI_GUID(0xb81fb4ae, 0xe4f3, 0x471b, 0x99, 0xb4, \
+                0x0b, 0x3d, 0xa5, 0x49, 0xce, 0x13)
  #ifndef CONFIG_SPL_BUILD
  
  #define ENV_MEM_LAYOUT_SETTINGS \
   * is known yet.
   * H6 has SRAM A1 at 0x00020000.
   */
 -#define CONFIG_SYS_INIT_RAM_ADDR      CONFIG_SUNXI_SRAM_ADDRESS
 +#define CFG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
  /* FIXME: this may be larger on some SoCs */
 -#define CONFIG_SYS_INIT_RAM_SIZE      0x8000 /* 32 KiB */
 +#define CFG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
  
 -#define PHYS_SDRAM_0                  CONFIG_SYS_SDRAM_BASE
 +#define PHYS_SDRAM_0                  CFG_SYS_SDRAM_BASE
  #define PHYS_SDRAM_0_SIZE             0x80000000 /* 2 GiB */
  
- /* mmc config */
- #define CONFIG_MMC_SUNXI_SLOT         0
 -#ifdef CONFIG_NAND_SUNXI
 -#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
 -#endif
--
  /*
   * Miscellaneous configurable options
   */
diff --cc lib/Kconfig
Simple merge
@@@ -112,10 -152,16 +112,9 @@@ CONFIG_MII_DEFAULT_TSE
  CONFIG_MIU_2BIT_21_7_INTERLEAVED
  CONFIG_MIU_2BIT_INTERLEAVED
  CONFIG_MMC_DEFAULT_DEV
- CONFIG_MMC_SUNXI_SLOT
  CONFIG_MONITOR_IS_IN_RAM
 -CONFIG_MPC85XX_FEC
 -CONFIG_MPC85XX_FEC_NAME
  CONFIG_MTD_NAND_VERIFY_WRITE
 -CONFIG_MTD_PARTITION
  CONFIG_MVGBE_PORTS
 -CONFIG_MVS
 -CONFIG_MX27
 -CONFIG_MX27_CLK32
  CONFIG_MXC_GPT_HCLK
  CONFIG_MXC_NAND_HWECC
  CONFIG_MXC_NAND_IP_REGS_BASE