net: fec_mxc: Drop CONFIG_FEC_XCV_TYPE
authorTom Rini <trini@konsulko.com>
Fri, 11 Mar 2022 14:12:10 +0000 (09:12 -0500)
committerTom Rini <trini@konsulko.com>
Fri, 18 Mar 2022 16:48:17 +0000 (12:48 -0400)
With all boards now using DM_ETH we determine the value for
CONFIG_FEC_XCV_TYPE at run time, except in the case of the default
fall-back.  Set the fallback directly now.

Cc: Fabio Estevam <festevam@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
47 files changed:
doc/README.fec_mxc
drivers/net/fec_mxc.c
include/configs/apalis-imx8x.h
include/configs/aristainetos2.h
include/configs/brppt2.h
include/configs/capricorn-common.h
include/configs/cgtqmx8.h
include/configs/cl-som-imx7.h
include/configs/cm_fx6.h
include/configs/dh_imx6.h
include/configs/imx6_logic.h
include/configs/imx8mm-cl-iot-gate.h
include/configs/imx8mm_beacon.h
include/configs/imx8mm_evk.h
include/configs/imx8mm_venice.h
include/configs/imx8mn_beacon.h
include/configs/imx8mn_var_som.h
include/configs/imx8mn_venice.h
include/configs/imx8mp_evk.h
include/configs/imx8mp_rsb3720.h
include/configs/imx8mq_evk.h
include/configs/imx8mq_phanbell.h
include/configs/imx8qm_mek.h
include/configs/imx8qm_rom7720.h
include/configs/imx8qxp_mek.h
include/configs/imx8ulp_evk.h
include/configs/kontron_pitx_imx8m.h
include/configs/liteboard.h
include/configs/m53menlo.h
include/configs/mx6sxsabreauto.h
include/configs/mx6sxsabresd.h
include/configs/mx6ul_14x14_evk.h
include/configs/mxs.h
include/configs/nitrogen6x.h
include/configs/npi_imx6ull.h
include/configs/o4-imx6ull-nano.h
include/configs/pico-imx6.h
include/configs/pico-imx6ul.h
include/configs/pico-imx8mq.h
include/configs/somlabs_visionsom_6ull.h
include/configs/tqma6_mba6.h
include/configs/tqma6_wru4.h
include/configs/verdin-imx8mm.h
include/configs/verdin-imx8mp.h
include/configs/vf610twr.h
include/configs/vining_2000.h
include/configs/xpress.h

index 9ca6ac2..d17dfb6 100644 (file)
@@ -7,11 +7,6 @@ CONFIG_FEC_MXC
 CONFIG_MII
        Must be defined if CONFIG_FEC_MXC is defined.
 
-CONFIG_FEC_XCV_TYPE
-       Defaults to MII100 for 100 Base-tx.
-       RGMII selects 1000 Base-tx reduced pin count interface.
-       RMII selects 100 Base-tx reduced pin count interface.
-
 CONFIG_FEC_MXC_SWAP_PACKET
        Forced on iff MX28.
        Swaps the bytes order of all words(4 byte units) in the packet.
index a269275..e8ebef0 100644 (file)
@@ -54,10 +54,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #error "CONFIG_MII has to be defined!"
 #endif
 
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE MII100
-#endif
-
 /*
  * The i.MX28 operates with packets in big endian. We need to swap them before
  * sending and after receiving.
@@ -1269,9 +1265,9 @@ static int fecmxc_probe(struct udevice *dev)
                priv->xcv_type = RGMII;
                break;
        default:
-               priv->xcv_type = CONFIG_FEC_XCV_TYPE;
-               printf("Unsupported interface type %d defaulting to %d\n",
-                      priv->interface, priv->xcv_type);
+               priv->xcv_type = MII100;
+               printf("Unsupported interface type %d defaulting to MII100\n",
+                      priv->interface);
                break;
        }
 
index f43e166..71a80f3 100644 (file)
 #define CONFIG_FEC_ENET_DEV 0
 #define IMX_FEC_BASE                   0x5b040000
 #define CONFIG_FEC_MXC_PHYADDR          0x4
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define PHY_ANEG_TIMEOUT 20000
 
 #endif /* __APALIS_IMX8X_H */
index 9679202..fcf364b 100644 (file)
@@ -21,8 +21,6 @@
 #define CONSOLE_DEV    "ttymxc0"
 #endif
 
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 /* Framebuffer */
 #define CONFIG_SYS_LDB_CLOCK   28341000
 
index 4f89f9d..92f69ba 100644 (file)
@@ -87,7 +87,6 @@ BUR_COMMON_ENV \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Ethernet */
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_FIXED_SPEED         _1000BASET
 
 /* USB Configs */
index c521ddd..58d7a3a 100644 (file)
@@ -32,9 +32,6 @@
 
 #define CONFIG_FACTORYSET
 
-/* ENET Config */
-#define CONFIG_FEC_XCV_TYPE            RMII
-
 /* ENET1 connects to base board and MUX with ESAI */
 #define CONFIG_FEC_ENET_DEV            1
 #define CONFIG_FEC_MXC_PHYADDR         0x0
index ce36b2e..bd5c072 100644 (file)
 
 /* Networking */
 #define CONFIG_FEC_MXC_PHYADDR         -1
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define FEC_QUIRK_ENET_MAC
 
 #endif /* __CGTQMX8_H */
index 0b059d7..8af80f5 100644 (file)
@@ -13,7 +13,6 @@
 #define CONFIG_MXC_UART_BASE            UART1_IPS_BASE_ADDR
 
 /* Network */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 
 /* ENET1 */
index e41c76b..90720c2 100644 (file)
 
 /* Ethernet */
 #define CONFIG_FEC_MXC_PHYADDR         0
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 
 /* USB */
index 804dfb4..3d3fab5 100644 (file)
@@ -32,7 +32,6 @@
 
 /* FEC ethernet */
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         7
 
 /* MMC Configs */
index e6fc65e..65f8944 100644 (file)
@@ -23,7 +23,6 @@
 
 
 /* Ethernet Configs */
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR         0
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
index c97223e..cd1eafd 100644 (file)
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         0
 #define FEC_QUIRK_ENET_MAC
 
index 2c568a6..e480595 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* FEC*/
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 #define IMX_FEC_BASE                   0x30BE0000
index 4f5fe6a..32c937a 100644 (file)
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 374b476..1ec27f4 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* FEC */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 227cfda..7fed9a3 100644 (file)
 
 /* ENET Config */
 #if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR 0
 #define FEC_QUIRK_ENET_MAC
 #define IMX_FEC_BASE                   0x30BE0000
index 1540e4b..318289b 100644 (file)
 
 #include <config_distro_bootcmd.h>
 
-/* ENET */
-#if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE            RGMII
-#endif /* CONFIG_FEC_MXC */
-
 #define MEM_LAYOUT_ENV_SETTINGS \
        "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
        "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
index 1476431..c01a590 100644 (file)
@@ -97,7 +97,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* FEC */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index f08193a..fe07a3c 100644 (file)
@@ -33,7 +33,6 @@
 #endif
 
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          1
 #define FEC_QUIRK_ENET_MAC
 
index 287782b..62e06d2 100644 (file)
@@ -41,7 +41,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          4
 #define FEC_QUIRK_ENET_MAC
 
index 4140dd7..8fff3bf 100644 (file)
@@ -38,7 +38,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 9d56e33..6919f6d 100644 (file)
@@ -32,7 +32,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index c12f383..0fe38e6 100644 (file)
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY              8000000 /* 8MHz */
 
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 #endif /* __IMX8QM_MEK_H */
index 5fcc963..7532c6e 100644 (file)
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY              8000000 /* 8MHz */
 
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 #include <linux/stringify.h>
 #endif /* __IMX8QM_ROM7720_H */
index b1c51e7..beb35c9 100644 (file)
 #define CONFIG_PCA953X
 #endif
 
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 /* Misc configuration */
 #define CONFIG_SYS_CBSIZE      2048
 #define CONFIG_SYS_MAXARGS     64
index 07d8d65..ddb3d44 100644 (file)
@@ -31,7 +31,6 @@
 #if defined(CONFIG_FEC_MXC)
 #define PHY_ANEG_TIMEOUT               20000
 
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR         1
 
 #define IMX_FEC_BASE                   0x29950000
index e2c14c7..2c0ad96 100644 (file)
@@ -32,7 +32,6 @@
 
 /* ENET1 Config */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 #define FEC_QUIRK_ENET_MAC
 
index 8d062aa..d0960bc 100644 (file)
 
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x0
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #endif
index 9ec2497..dd803e7 100644 (file)
@@ -72,7 +72,6 @@
 #define IMX_FEC_BASE                   FEC_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x0
 #define CONFIG_DISCOVER_PHY
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #define CONFIG_SYS_RTC_BUS_NUM         1 /* I2C2 */
index c2cf1f3..372cf8d 100644 (file)
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x0
 
-#define CONFIG_FEC_XCV_TYPE             RGMII
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
index 7ab641f..a46f515 100644 (file)
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x1
 
-#define CONFIG_FEC_XCV_TYPE             RGMII
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
index fdea1cb..4be5d78 100644 (file)
 #if (CONFIG_FEC_ENET_DEV == 0)
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x2
-#define CONFIG_FEC_XCV_TYPE             RMII
 #elif (CONFIG_FEC_ENET_DEV == 1)
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 #endif
 
index 7a513c1..8dcc45c 100644 (file)
 #define CONFIG_PL01x_PORTS             { (void *)MXS_UARTDBG_BASE }
 /* Default baudrate can be overridden by board! */
 
-/* FEC Ethernet on SoC */
-#ifdef CONFIG_FEC_MXC
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE            RMII
-#endif
-#endif
-
 /* NAND */
 #ifdef CONFIG_CMD_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
index d082fbd..afa4ca5 100644 (file)
@@ -29,7 +29,6 @@
 #endif
 
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         6
 
 /* USB Configs */
index 31cf63d..1e40fad 100644 (file)
@@ -48,7 +48,6 @@
 #ifdef CONFIG_CMD_NET
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #define CONFIG_FEC_ENET_DEV            1
index 72515a3..7777935 100644 (file)
 #      define CONFIG_MXC_USB_PORTSC            (PORT_PTS_UTMI | PORT_PTS_PTW)
 #endif /* CONFIG_CMD_USB */
 
-#if IS_ENABLED(CONFIG_FEC_MXC)
-#      define CONFIG_FEC_XCV_TYPE      RMII
-#endif /* CONFIG_FEC_MXC */
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "mmcdev=0\0" \
        "mmcpart=2\0" \
index 4f9a0f0..63f6b14 100644 (file)
 
 /* Ethernet Configuration */
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         1
 
 /* Framebuffer */
index d87bcf4..f63ebb4 100644 (file)
@@ -29,7 +29,6 @@
 
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 
 #define CONFIG_MXC_UART_BASE           UART6_BASE_ADDR
 
index 85f6129..26946cd 100644 (file)
@@ -32,7 +32,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         1
 #define FEC_QUIRK_ENET_MAC
 
index a9e8c26..9946fe9 100644 (file)
@@ -80,7 +80,6 @@
 #ifdef CONFIG_CMD_NET
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR         0x1
-#define CONFIG_FEC_XCV_TYPE            RMII
 #endif
 
 #endif
index 4233ecd..899c218 100644 (file)
@@ -9,8 +9,6 @@
 #ifndef __CONFIG_TQMA6_MBA6_H
 #define __CONFIG_TQMA6_MBA6_H
 
-#define CONFIG_FEC_XCV_TYPE            RGMII
-
 #define CONFIG_FEC_MXC_PHYADDR         0x03
 
 #define CONFIG_MXC_UART_BASE           UART2_BASE
index 88a652e..90db965 100644 (file)
@@ -7,7 +7,6 @@
 #define __CONFIG_TQMA6_WRU4_H
 
 /* Ethernet */
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR         0x01
 
 /* UART */
index 4811e98..de84e3b 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
 
 /* ENET */
-#define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_FEC_MXC_PHYADDR          7
 #define FEC_QUIRK_ENET_MAC
 #define IMX_FEC_BASE                   0x30BE0000
index 6bfc121..9a7dedf 100644 (file)
@@ -35,7 +35,6 @@
 /* ENET Config */
 /* ENET1 */
 #if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE            RGMII
 #define CONFIG_FEC_MXC_PHYADDR         7
 #define FEC_QUIRK_ENET_MAC
 
index d90c2fa..ebae822 100644 (file)
@@ -24,7 +24,6 @@
 #define CONFIG_SYS_FSL_ESDHC_NUM       1
 
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE            RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 
 /* I2C Configs */
index 521f325..e101739 100644 (file)
@@ -47,8 +47,6 @@
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x0
 
-#define CONFIG_FEC_XCV_TYPE             RMII
-
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
index 91f6d67..13cfa2c 100644 (file)
@@ -45,7 +45,6 @@
 #define CONFIG_FEC_ENET_DEV            0
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x0
-#define CONFIG_FEC_XCV_TYPE             RMII
 
 #define CONFIG_UBOOT_SECTOR_START      0x2
 #define CONFIG_UBOOT_SECTOR_COUNT      0x3fe