rpi5: add initial memory map for bcm2712

This includes:
* 1GB of RAM (from 4GB or 8GB total)
* AXI ranges (main peripherals)

When HDMI cable is plugged in at boot time firmware will
insert "simple-framebuffer" device into devicetree and will
shrink first memory region to 0x3f800000UL. Board setup then
will properly reserve framebuffer region.

When no HDMI cable is plugged in the size of the region will
be 0x3fc00000UL.

Signed-off-by: Dmitry Malkin <dmitry@bedrocksystems.com>
Tested-by: Jens Maus <mail@jens-maus.de>
Tested-by: Darko Alavanja <darko.alavanja@konsulko.com>
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
[backport of the commit a5a27eafc422b7a57de904b73152fc9a860c7640 from mainline]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I2b0bbf11932c5d44a8a0fe41b3464f9575c6c4dc

diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index 183650a..1ee2899 100644 (file)
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -68,6 +68,36 @@ static struct mm_region bcm2711_mem_map[MEM_MAP_MAX_ENTRIES] = {
        }
 };
 
+static struct mm_region bcm2712_mem_map[MEM_MAP_MAX_ENTRIES] = {
+       {
+               /* First 1GB of DRAM */
+               .virt = 0x00000000UL,
+               .phys = 0x00000000UL,
+               .size = 0x40000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                        PTE_BLOCK_INNER_SHARE
+       }, {
+               /* Beginning of AXI bus where uSD controller lives */
+               .virt = 0x1000000000UL,
+               .phys = 0x1000000000UL,
+               .size = 0x0002000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* SoC bus */
+               .virt = 0x107c000000UL,
+               .phys = 0x107c000000UL,
+               .size = 0x0004000000UL,
+               .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+                        PTE_BLOCK_NON_SHARE |
+                        PTE_BLOCK_PXN | PTE_BLOCK_UXN
+       }, {
+               /* List terminator */
+               0,
+       }
+};
+
 struct mm_region *mem_map = bcm283x_mem_map;
 
 /*
@@ -78,6 +108,7 @@ static const struct udevice_id board_ids[] = {
        { .compatible = "brcm,bcm2837", .data = (ulong)&bcm283x_mem_map},
        { .compatible = "brcm,bcm2838", .data = (ulong)&bcm2711_mem_map},
        { .compatible = "brcm,bcm2711", .data = (ulong)&bcm2711_mem_map},
+       { .compatible = "brcm,bcm2712", .data = (ulong)&bcm2712_mem_map},
        { },
 };