MPC5xxx: Change names of defines related to IPB and PCI clocks.

[platform/kernel/u-boot.git] / include / configs / o2dnt.h

diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h
index 5c05a74..63d0da7 100644 (file)
--- a/include/configs/o2dnt.h
+++ b/include/configs/o2dnt.h
@@ -137,17 +137,17 @@
 /*
  * IPB Bus clocking configuration.
  */
-#define CFG_IPBSPEED_133               /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK               /* define for 133MHz speed */
 
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
 /*
  * PCI Bus clocking configuration
  *
  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ *  of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
  */
-#define CFG_PCISPEED_66                        /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2  /* define for 66MHz speed */
 #endif
 #endif
 
@@ -276,7 +276,7 @@
 #define CFG_BOOTCS_START       CFG_FLASH_BASE
 #define CFG_BOOTCS_SIZE                CFG_FLASH_SIZE
 
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
 /*
  * For 66 MHz PCI clock additional Wait State is needed for CS0 (flash).
  */