Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
[platform/kernel/u-boot.git] / include / dt-bindings / clock / snps,hsdk-cgu.h
1 /*
2  * Synopsys HSDK SDP CGU clock driver dts bindings
3  *
4  * Copyright (C) 2017 Synopsys
5  * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
6  *
7  * This file is licensed under the terms of the GNU General Public
8  * License version 2. This program is licensed "as is" without any
9  * warranty of any kind, whether express or implied.
10  */
11
12 #ifndef __DT_BINDINGS_CLK_HSDK_CGU_H_
13 #define __DT_BINDINGS_CLK_HSDK_CGU_H_
14
15 #define CLK_ARC_PLL             0
16 #define CLK_ARC                 1
17 #define CLK_DDR_PLL             2
18 #define CLK_SYS_PLL             3
19 #define CLK_SYS_APB             4
20 #define CLK_SYS_AXI             5
21 #define CLK_SYS_ETH             6
22 #define CLK_SYS_USB             7
23 #define CLK_SYS_SDIO            8
24 #define CLK_SYS_HDMI            9
25 #define CLK_SYS_GFX_CORE        10
26 #define CLK_SYS_GFX_DMA         11
27 #define CLK_SYS_GFX_CFG         12
28 #define CLK_SYS_DMAC_CORE       13
29 #define CLK_SYS_DMAC_CFG        14
30 #define CLK_SYS_SDIO_REF        15
31 #define CLK_SYS_SPI_REF         16
32 #define CLK_SYS_I2C_REF         17
33 #define CLK_SYS_UART_REF        18
34 #define CLK_SYS_EBI_REF         19
35 #define CLK_TUN_PLL             20
36 #define CLK_TUN_TUN             21
37 #define CLK_TUN_ROM             22
38 #define CLK_TUN_PWM             23
39 #define CLK_HDMI_PLL            24
40 #define CLK_HDMI                25
41
42 #endif /* __DT_BINDINGS_CLK_HSDK_CGU_H_ */