1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (c) 2011 Graf-Syteco, Matthias Weisser
6 * Configuation settings for the zmx25 board
12 #include <asm/arch/imx-regs.h>
14 #define CONFIG_SYS_TIMER_RATE 32768
15 #define CONFIG_SYS_TIMER_COUNTER \
16 (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
19 * Environment settings
21 #define CONFIG_EXTRA_ENV_SETTINGS \
22 "gs_fast_boot=setenv bootdelay 5\0" \
23 "gs_slow_boot=setenv bootdelay 10\0" \
24 "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
25 "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
26 "bootm 0x81000000; bootelf 0x81000000\0"
35 #define CONFIG_MXC_UART_BASE UART2_BASE
40 #define CONFIG_FEC_MXC
41 #define CONFIG_FEC_MXC_PHYADDR 0x00
46 #define CONFIG_BOOTP_BOOTFILESIZE
52 #define CONFIG_USB_EHCI_MXC
53 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
54 #define CONFIG_MXC_USB_PORT 1
55 #define CONFIG_MXC_USB_PORTSC PORT_PTS_SERIAL
56 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
57 #define CONFIG_EHCI_IS_TDI
58 #endif /* CONFIG_CMD_USB */
61 #define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */
62 #define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
64 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
65 #define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */
68 * FLASH and environment organization
70 #define CONFIG_SYS_FLASH_BASE 0xA0000000
71 #define CONFIG_SYS_MAX_FLASH_BANKS 1
72 #define CONFIG_SYS_MAX_FLASH_SECT 256
75 * CFI FLASH driver setup
78 #endif /* __CONFIG_H */