1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2011 The Chromium OS Authors.
5 * Graeme Russ, graeme.russ@gmail.com.
10 #ifndef __CONFIG_X86_COMMON_H
11 #define __CONFIG_X86_COMMON_H
14 * High Level Configuration Options
17 #define CONFIG_SYS_BOOTM_LEN (16 << 20)
19 /* Generic TPM interfaced through LPC bus */
20 #define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
22 /*-----------------------------------------------------------------------
23 * Real Time Clock Configuration
25 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
26 #define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS
28 /*-----------------------------------------------------------------------
29 * Serial Configuration
31 #define CONFIG_SYS_NS16550_PORT_MAPPED
34 * Miscellaneous configurable options
37 /*-----------------------------------------------------------------------
41 #define CONFIG_SYS_STACK_SIZE (32 * 1024)
43 /*-----------------------------------------------------------------------
44 * Environment configuration
47 /*-----------------------------------------------------------------------
51 /* Default environment */
52 #define CONFIG_ROOTPATH "/opt/nfsroot"
53 #define CONFIG_HOSTNAME "x86"
54 #define CONFIG_RAMDISK_ADDR 0x4000000
55 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB)
56 #define CONFIG_OTHBOOTARGS "othbootargs=\0"
58 #define CONFIG_OTHBOOTARGS "othbootargs=acpi=off\0"
61 #if defined(CONFIG_DISTRO_DEFAULTS)
62 #define DISTRO_BOOTENV BOOTENV
64 #define DISTRO_BOOTENV
67 #ifndef SPLASH_SETTINGS
68 #define SPLASH_SETTINGS
71 #define CONFIG_EXTRA_ENV_SETTINGS \
73 CONFIG_STD_DEVICES_SETTINGS \
77 "consoledev=ttyS0\0" \
79 "scriptaddr=0x7000000\0" \
80 "kernel_addr_r=0x1000000\0" \
81 "ramdisk_addr_r=0x4000000\0" \
82 "ramdiskfile=initramfs.gz\0"
85 #endif /* __CONFIG_H */