include/configs/x600.h

   1 /*
   2  * Copyright (C) 2009, STMicroelectronics - All Rights Reserved
   3  * Author(s): Vipin Kumar, <vipin.kumar@st.com> for STMicroelectronics.
   4  *
   5  * Copyright (C) 2012, 2015 Stefan Roese <sr@denx.de>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 /*
  14  * High Level Configuration Options
  15  * (easy to change)
  16  */
  17 #define CONFIG_SPEAR600                         /* SPEAr600 SoC */
  18 #define CONFIG_X600                             /* on X600 board */
  19
  20 #include <asm/arch/hardware.h>
  21
  22 /* Timer, HZ specific defines */
  23 #define CONFIG_SYS_HZ_CLOCK                     8300000
  24
  25 #define CONFIG_SYS_FLASH_BASE                   0xf8000000
  26 /* Reserve 8KiB for SPL */
  27 #define CONFIG_SPL_PAD_TO                       8192    /* decimal for 'dd' */
  28 #define CONFIG_SYS_SPL_LEN                      CONFIG_SPL_PAD_TO
  29 #define CONFIG_SYS_UBOOT_BASE                   (CONFIG_SYS_FLASH_BASE + \
  30                                                  CONFIG_SYS_SPL_LEN)
  31 #define CONFIG_SYS_UBOOT_START                  CONFIG_SYS_TEXT_BASE
  32 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_FLASH_BASE
  33 #define CONFIG_SYS_MONITOR_LEN                  0x60000
  34
  35 /* Serial Configuration (PL011) */
  36 #define CONFIG_SYS_SERIAL0                      0xD0000000
  37 #define CONFIG_SYS_SERIAL1                      0xD0080000
  38 #define CONFIG_PL01x_PORTS                      { (void *)CONFIG_SYS_SERIAL0, \
  39                                                 (void *)CONFIG_SYS_SERIAL1 }
  40 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
  41 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
  42                                                   57600, 115200 }
  43 #define CONFIG_SYS_LOADS_BAUD_CHANGE
  44
  45 /* NOR FLASH config options */
  46 #define CONFIG_ST_SMI
  47 #define CONFIG_SYS_MAX_FLASH_BANKS              1
  48 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
  49 #define CONFIG_SYS_FLASH_ADDR_BASE              { CONFIG_SYS_FLASH_BASE }
  50 #define CONFIG_SYS_MAX_FLASH_SECT               128
  51 #define CONFIG_SYS_FLASH_EMPTY_INFO
  52 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
  53 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
  54
  55 /* NAND FLASH config options */
  56 #define CONFIG_NAND_FSMC
  57 #define CONFIG_SYS_NAND_SELF_INIT
  58 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  59 #define CONFIG_SYS_NAND_BASE                    CONFIG_FSMC_NAND_BASE
  60 #define CONFIG_MTD_ECC_SOFT
  61 #define CONFIG_SYS_FSMC_NAND_8BIT
  62 #define CONFIG_SYS_NAND_ONFI_DETECTION
  63 #define CONFIG_NAND_ECC_BCH
  64
  65 /* UBI/UBI config options */
  66 #define CONFIG_MTD_DEVICE
  67 #define CONFIG_MTD_PARTITIONS
  68
  69 /* Ethernet config options */
  70 #define CONFIG_MII
  71 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
  72
  73 #define CONFIG_SPEAR_GPIO
  74
  75 /* I2C config options */
  76 #define CONFIG_SYS_I2C
  77 #define CONFIG_SYS_I2C_BASE                     0xD0200000
  78 #define CONFIG_SYS_I2C_SPEED                    400000
  79 #define CONFIG_SYS_I2C_SLAVE                    0x02
  80 #define CONFIG_I2C_CHIPADDRESS                  0x50
  81
  82 #define CONFIG_RTC_M41T62       1
  83 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
  84
  85 /* FPGA config options */
  86 #define CONFIG_FPGA_COUNT       1
  87
  88 /* USB EHCI options */
  89 #define CONFIG_USB_EHCI_SPEAR
  90 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  91
  92 /*
  93  * U-Boot Environment placing definitions.
  94  */
  95 #define CONFIG_ENV_SECT_SIZE                    0x00010000
  96 #define CONFIG_ENV_ADDR                         (CONFIG_SYS_MONITOR_BASE + \
  97                                                  CONFIG_SYS_MONITOR_LEN)
  98 #define CONFIG_ENV_SIZE                         0x02000
  99 #define CONFIG_ENV_ADDR_REDUND                  (CONFIG_ENV_ADDR + \
 100                                                  CONFIG_ENV_SECT_SIZE)
 101 #define CONFIG_ENV_SIZE_REDUND                  (CONFIG_ENV_SIZE)
 102
 103 /* Miscellaneous configurable options */
 104 #define CONFIG_ARCH_CPU_INIT
 105 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
 106 #define CONFIG_CMDLINE_TAG
 107 #define CONFIG_SETUP_MEMORY_TAGS
 108 #define CONFIG_MISC_INIT_R
 109 #define CONFIG_MX_CYCLIC                /* enable mdc/mwc commands      */
 110
 111 #define CONFIG_SYS_MEMTEST_START                0x00800000
 112 #define CONFIG_SYS_MEMTEST_END                  0x04000000
 113 #define CONFIG_SYS_MALLOC_LEN                   (8 << 20)
 114 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
 115
 116 #define CONFIG_HOSTNAME                         "x600"
 117 #define CONFIG_UBI_PART                         ubi0
 118 #define CONFIG_UBIFS_VOLUME                     rootfs
 119
 120 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 121         "u-boot_addr=1000000\0"                                         \
 122         "u-boot=" CONFIG_HOSTNAME "/u-boot.spr\0"               \
 123         "load=tftp ${u-boot_addr} ${u-boot}\0"                          \
 124         "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 125                 " +${filesize};"                                        \
 126                 "erase " __stringify(CONFIG_SYS_MONITOR_BASE) " +${filesize};" \
 127                 "cp.b ${u-boot_addr} " __stringify(CONFIG_SYS_MONITOR_BASE) \
 128                 " ${filesize};"                                         \
 129                 "protect on " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 130                 " +${filesize}\0"                                       \
 131         "upd=run load update\0"                                         \
 132         "ubifs=" CONFIG_HOSTNAME "/ubifs.img\0"         \
 133         "part=" __stringify(CONFIG_UBI_PART) "\0"                       \
 134         "vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0"                    \
 135         "load_ubifs=tftp ${kernel_addr} ${ubifs}\0"                     \
 136         "update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
 137                 " ${filesize}\0"                                        \
 138         "upd_ubifs=run load_ubifs update_ubifs\0"                       \
 139         "init_ubifs=nand erase.part ubi0;ubi part ${part};"             \
 140                 "ubi create ${vol} 4000000\0"                           \
 141         "netdev=eth0\0"                                                 \
 142         "rootpath=/opt/eldk-4.2/arm\0"                                  \
 143         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 144                 "nfsroot=${serverip}:${rootpath}\0"                     \
 145         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 146         "boot_part=0\0"                                                 \
 147         "altbootcmd=if test $boot_part -eq 0;then "                     \
 148                         "echo Switching to partition 1!;"               \
 149                         "setenv boot_part 1;"                           \
 150                 "else; "                                                \
 151                         "echo Switching to partition 0!;"               \
 152                         "setenv boot_part 0;"                           \
 153                 "fi;"                                                   \
 154                 "saveenv;boot\0"                                        \
 155         "ubifsargs=set bootargs ubi.mtd=ubi${boot_part} "               \
 156                 "root=ubi0:rootfs rootfstype=ubifs\0"                   \
 157         "kernel=" CONFIG_HOSTNAME "/uImage\0"           \
 158         "kernel_fs=/boot/uImage \0"                                     \
 159         "kernel_addr=1000000\0"                                         \
 160         "dtb=" CONFIG_HOSTNAME "/"                              \
 161                 CONFIG_HOSTNAME ".dtb\0"                        \
 162         "dtb_fs=/boot/" CONFIG_HOSTNAME ".dtb\0"                \
 163         "dtb_addr=1800000\0"                                            \
 164         "load_kernel=tftp ${kernel_addr} ${kernel}\0"                   \
 165         "load_dtb=tftp ${dtb_addr} ${dtb}\0"                            \
 166         "addip=setenv bootargs ${bootargs} "                            \
 167                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 168                 ":${hostname}:${netdev}:off panic=1\0"                  \
 169         "addcon=setenv bootargs ${bootargs} console=ttyAMA0,"           \
 170                 "${baudrate}\0"                                         \
 171         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 172         "net_nfs=run load_dtb load_kernel; "                            \
 173                 "run nfsargs addip addcon addmtd addmisc;"              \
 174                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
 175         "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"                                    \
 176         "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"                                \
 177         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip"         \
 178                 " addcon addmisc addmtd;"                               \
 179                 "bootm ${kernel_addr} - ${dtb_addr}\0"                  \
 180         "ubifs_mount=ubi part ubi${boot_part};ubifsmount ubi:rootfs\0"  \
 181         "ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};"             \
 182                 "ubifsload ${dtb_addr} ${dtb_fs};\0"                    \
 183         "nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
 184                 "addmtd addmisc;bootm ${kernel_addr} - ${dtb_addr}\0"   \
 185         "bootcmd=run nand_ubifs\0"                                      \
 186         "\0"
 187
 188 /* Physical Memory Map */
 189 #define CONFIG_NR_DRAM_BANKS                    1
 190 #define PHYS_SDRAM_1                            0x00000000
 191 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
 192
 193 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
 194 #define CONFIG_SRAM_BASE                        0xd2800000
 195 /* Preserve the last 2 lwords for the boot-counter */
 196 #define CONFIG_SRAM_SIZE                        ((8 << 10) - 0x8)
 197 #define CONFIG_SYS_INIT_RAM_ADDR                CONFIG_SRAM_BASE
 198 #define CONFIG_SYS_INIT_RAM_SIZE                CONFIG_SRAM_SIZE
 199
 200 #define CONFIG_SYS_INIT_SP_OFFSET               \
 201         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 202
 203 #define CONFIG_SYS_INIT_SP_ADDR                 \
 204         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 205
 206 /*
 207  * SPL related defines
 208  */
 209 #define CONFIG_SPL_TEXT_BASE            0xd2800b00
 210 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SRAM_SIZE - 0xb00)
 211 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear"
 212
 213 /*
 214  * Please select/define only one of the following
 215  * Each definition corresponds to a supported DDR chip.
 216  * DDR configuration is based on the following selection
 217  */
 218 #define CONFIG_DDR_MT47H64M16           1
 219 #define CONFIG_DDR_MT47H32M16           0
 220 #define CONFIG_DDR_MT47H128M8           0
 221
 222 /*
 223  * Synchronous/Asynchronous operation of DDR
 224  *
 225  * Select CONFIG_DDR_2HCLK for DDR clk = 333MHz, synchronous operation
 226  * Select CONFIG_DDR_HCLK for DDR clk = 166MHz, synchronous operation
 227  * Select CONFIG_DDR_PLL2 for DDR clk = PLL2, asynchronous operation
 228  */
 229 #define CONFIG_DDR_2HCLK                1
 230 #define CONFIG_DDR_HCLK                 0
 231 #define CONFIG_DDR_PLL2                 0
 232
 233 /*
 234  * xxx_BOOT_SUPPORTED macro defines whether a booting type is supported
 235  * or not. Modify/Add to only these macros to define new boot types
 236  */
 237 #define USB_BOOT_SUPPORTED              0
 238 #define PCIE_BOOT_SUPPORTED             0
 239 #define SNOR_BOOT_SUPPORTED             1
 240 #define NAND_BOOT_SUPPORTED             1
 241 #define PNOR_BOOT_SUPPORTED             0
 242 #define TFTP_BOOT_SUPPORTED             0
 243 #define UART_BOOT_SUPPORTED             0
 244 #define SPI_BOOT_SUPPORTED              0
 245 #define I2C_BOOT_SUPPORTED              0
 246 #define MMC_BOOT_SUPPORTED              0
 247
 248 #endif  /* __CONFIG_H */