include/configs/vexpress_aemv8a.h

   1 /*
   2  * Configuration for Versatile Express. Parts were derived from other ARM
   3  *   configurations.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __VEXPRESS_AEMV8A_H
   9 #define __VEXPRESS_AEMV8A_H
  10
  11 #define CONFIG_DM
  12
  13 /* We use generic board for v8 Versatile Express */
  14 #define CONFIG_SYS_GENERIC_BOARD
  15
  16 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
  17 #ifndef CONFIG_SEMIHOSTING
  18 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
  19 #endif
  20 #define CONFIG_ARMV8_SWITCH_TO_EL1
  21 #endif
  22
  23 #define CONFIG_REMAKE_ELF
  24
  25 #define CONFIG_SUPPORT_RAW_INITRD
  26
  27 /* Cache Definitions */
  28 #define CONFIG_SYS_DCACHE_OFF
  29 #define CONFIG_SYS_ICACHE_OFF
  30
  31 #define CONFIG_IDENT_STRING             " vexpress_aemv8a"
  32 #define CONFIG_BOOTP_VCI_STRING         "U-boot.armv8.vexpress_aemv8a"
  33
  34 /* Link Definitions */
  35 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
  36 /* ATF loads u-boot here for BASE_FVP model */
  37 #define CONFIG_SYS_TEXT_BASE            0x88000000
  38 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
  39 #elif CONFIG_TARGET_VEXPRESS64_JUNO
  40 #define CONFIG_SYS_TEXT_BASE            0xe0000000
  41 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  42 #else
  43 #error "Unknown board variant"
  44 #endif
  45
  46 /* Flat Device Tree Definitions */
  47 #define CONFIG_OF_LIBFDT
  48
  49 /* CS register bases for the original memory map. */
  50 #define V2M_PA_CS0                      0x00000000
  51 #define V2M_PA_CS1                      0x14000000
  52 #define V2M_PA_CS2                      0x18000000
  53 #define V2M_PA_CS3                      0x1c000000
  54 #define V2M_PA_CS4                      0x0c000000
  55 #define V2M_PA_CS5                      0x10000000
  56
  57 #define V2M_PERIPH_OFFSET(x)            (x << 16)
  58 #define V2M_SYSREGS                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
  59 #define V2M_SYSCTL                      (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
  60 #define V2M_SERIAL_BUS_PCI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
  61
  62 #define V2M_BASE                        0x80000000
  63
  64 /* Common peripherals relative to CS7. */
  65 #define V2M_AACI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
  66 #define V2M_MMCI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
  67 #define V2M_KMI0                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
  68 #define V2M_KMI1                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
  69
  70 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  71 #define V2M_UART0                       0x7ff80000
  72 #define V2M_UART1                       0x7ff70000
  73 #else /* Not Juno */
  74 #define V2M_UART0                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
  75 #define V2M_UART1                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
  76 #define V2M_UART2                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
  77 #define V2M_UART3                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
  78 #endif
  79
  80 #define V2M_WDT                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
  81
  82 #define V2M_TIMER01                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
  83 #define V2M_TIMER23                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
  84
  85 #define V2M_SERIAL_BUS_DVI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
  86 #define V2M_RTC                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
  87
  88 #define V2M_CF                          (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
  89
  90 #define V2M_CLCD                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
  91
  92 /* System register offsets. */
  93 #define V2M_SYS_CFGDATA                 (V2M_SYSREGS + 0x0a0)
  94 #define V2M_SYS_CFGCTRL                 (V2M_SYSREGS + 0x0a4)
  95 #define V2M_SYS_CFGSTAT                 (V2M_SYSREGS + 0x0a8)
  96
  97 /* Generic Timer Definitions */
  98 #define COUNTER_FREQUENCY               (0x1800000)     /* 24MHz */
  99
 100 /* Generic Interrupt Controller Definitions */
 101 #ifdef CONFIG_GICV3
 102 #define GICD_BASE                       (0x2f000000)
 103 #define GICR_BASE                       (0x2f100000)
 104 #else
 105
 106 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
 107 #define GICD_BASE                       (0x2f000000)
 108 #define GICC_BASE                       (0x2c000000)
 109 #elif CONFIG_TARGET_VEXPRESS64_JUNO
 110 #define GICD_BASE                       (0x2C010000)
 111 #define GICC_BASE                       (0x2C02f000)
 112 #else
 113 #error "Unknown board variant"
 114 #endif
 115 #endif /* !CONFIG_GICV3 */
 116
 117 #define CONFIG_SYS_MEMTEST_START        V2M_BASE
 118 #define CONFIG_SYS_MEMTEST_END          (V2M_BASE + 0x80000000)
 119
 120 /* Size of malloc() pool */
 121 #define CONFIG_SYS_MALLOC_F_LEN         0x2000
 122 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (8 << 20))
 123
 124 /* Ethernet Configuration */
 125 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 126 /* The real hardware Versatile express uses SMSC9118 */
 127 #define CONFIG_SMC911X                  1
 128 #define CONFIG_SMC911X_32_BIT           1
 129 #define CONFIG_SMC911X_BASE             (0x018000000)
 130 #else
 131 /* The Vexpress64 simulators use SMSC91C111 */
 132 #define CONFIG_SMC91111                 1
 133 #define CONFIG_SMC91111_BASE            (0x01A000000)
 134 #endif
 135
 136 /* PL011 Serial Configuration */
 137 #define CONFIG_BAUDRATE                 115200
 138 #ifdef CONFIG_DM
 139 #define CONFIG_DM_SERIAL
 140 #define CONFIG_PL01X_SERIAL
 141 #else
 142 #define CONFIG_SYS_SERIAL0              V2M_UART0
 143 #define CONFIG_SYS_SERIAL1              V2M_UART1
 144 #define CONFIG_CONS_INDEX               0
 145 #define CONFIG_PL011_SERIAL
 146 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 147 #define CONFIG_PL011_CLOCK              7273800
 148 #else
 149 #define CONFIG_PL011_CLOCK              24000000
 150 #endif
 151 #define CONFIG_PL01x_PORTS              {(void *)CONFIG_SYS_SERIAL0, \
 152                                          (void *)CONFIG_SYS_SERIAL1}
 153 #endif
 154
 155 #define CONFIG_BAUDRATE                 115200
 156 #define CONFIG_SYS_SERIAL0              V2M_UART0
 157 #define CONFIG_SYS_SERIAL1              V2M_UART1
 158
 159 /* Command line configuration */
 160 #define CONFIG_MENU
 161 /*#define CONFIG_MENU_SHOW*/
 162 #define CONFIG_CMD_CACHE
 163 #define CONFIG_CMD_BDI
 164 #define CONFIG_CMD_BOOTI
 165 #define CONFIG_CMD_UNZIP
 166 #define CONFIG_CMD_DHCP
 167 #define CONFIG_CMD_PXE
 168 #define CONFIG_CMD_ENV
 169 #define CONFIG_CMD_IMI
 170 #define CONFIG_CMD_LOADB
 171 #define CONFIG_CMD_MEMORY
 172 #define CONFIG_CMD_MII
 173 #define CONFIG_CMD_NET
 174 #define CONFIG_CMD_PING
 175 #define CONFIG_CMD_SAVEENV
 176 #define CONFIG_CMD_RUN
 177 #define CONFIG_CMD_BOOTD
 178 #define CONFIG_CMD_ECHO
 179 #define CONFIG_CMD_SOURCE
 180 #define CONFIG_CMD_FAT
 181 #define CONFIG_DOS_PARTITION
 182
 183 /* BOOTP options */
 184 #define CONFIG_BOOTP_BOOTFILESIZE
 185 #define CONFIG_BOOTP_BOOTPATH
 186 #define CONFIG_BOOTP_GATEWAY
 187 #define CONFIG_BOOTP_HOSTNAME
 188 #define CONFIG_BOOTP_PXE
 189 #define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
 190
 191 /* Miscellaneous configurable options */
 192 #define CONFIG_SYS_LOAD_ADDR            (V2M_BASE + 0x10000000)
 193
 194 /* Physical Memory Map */
 195 #define CONFIG_NR_DRAM_BANKS            1
 196 #define PHYS_SDRAM_1                    (V2M_BASE)      /* SDRAM Bank #1 */
 197 #define PHYS_SDRAM_1_SIZE               0x80000000      /* 2048 MB */
 198 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 199
 200 /* Initial environment variables */
 201 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
 202 #define CONFIG_EXTRA_ENV_SETTINGS       \
 203                                 "kernel_name=uImage\0"          \
 204                                 "kernel_addr=0x80000000\0"      \
 205                                 "initrd_name=ramdisk.img\0"     \
 206                                 "initrd_addr=0x88000000\0"      \
 207                                 "fdt_name=devtree.dtb\0"        \
 208                                 "fdt_addr=0x83000000\0"         \
 209                                 "fdt_high=0xffffffffffffffff\0" \
 210                                 "initrd_high=0xffffffffffffffff\0"
 211
 212 #define CONFIG_BOOTARGS         "console=ttyAMA0 earlyprintk=pl011,"\
 213                                 "0x1c090000 debug user_debug=31 "\
 214                                 "loglevel=9"
 215
 216 #define CONFIG_BOOTCOMMAND      "smhload ${kernel_name} ${kernel_addr}; " \
 217                                 "smhload ${fdt_name} $fdt_addr; " \
 218                                 "smhload ${initrd_name} $initrd_addr initrd_end; " \
 219                                 "fdt addr $fdt_addr; fdt resize; " \
 220                                 "fdt chosen $initrd_addr $initrd_end; " \
 221                                 "bootm $kernel_addr - $fdt_addr"
 222
 223 #define CONFIG_BOOTDELAY                1
 224
 225 #else
 226 #error "Unknown board variant"
 227 #endif
 228
 229 /* Do not preserve environment */
 230 #define CONFIG_ENV_IS_NOWHERE           1
 231 #define CONFIG_ENV_SIZE                 0x1000
 232
 233 /* Monitor Command Prompt */
 234 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 235 #define CONFIG_SYS_PROMPT               "VExpress64# "
 236 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 237                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 238 #define CONFIG_SYS_HUSH_PARSER
 239 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 240 #define CONFIG_SYS_LONGHELP
 241 #define CONFIG_CMDLINE_EDITING
 242 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 243
 244 /* Flash memory is available on the Juno board only */
 245 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO
 246 #define CONFIG_SYS_NO_FLASH
 247 #else
 248 #define CONFIG_CMD_FLASH
 249 #define CONFIG_SYS_FLASH_CFI            1
 250 #define CONFIG_FLASH_CFI_DRIVER         1
 251 #define CONFIG_SYS_FLASH_BASE           0x08000000
 252 #define CONFIG_SYS_FLASH_SIZE           0x04000000 /* 64 MiB */
 253 #define CONFIG_SYS_MAX_FLASH_BANKS      2
 254
 255 /* Timeout values in ticks */
 256 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2 * CONFIG_SYS_HZ) /* Erase Timeout */
 257 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2 * CONFIG_SYS_HZ) /* Write Timeout */
 258
 259 /* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
 260 #define CONFIG_SYS_MAX_FLASH_SECT       259             /* Max sectors */
 261 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
 262 #define CONFIG_SYS_FLASH_PROTECTION     /* The devices have real protection */
 263 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* flinfo indicates empty blocks */
 264
 265 #endif
 266
 267 #endif /* __VEXPRESS_AEMV8A_H */