include/configs/vexpress_aemv8.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuration for Versatile Express. Parts were derived from other ARM
   4  *   configurations.
   5  */
   6
   7 #ifndef __VEXPRESS_AEMV8_H
   8 #define __VEXPRESS_AEMV8_H
   9
  10 #include <linux/stringify.h>
  11
  12 /* Link Definitions */
  13 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  14 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  15 #else
  16 /* ATF loads u-boot here for BASE_FVP model */
  17 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
  18 #endif
  19
  20 #define CONFIG_SYS_BOOTM_LEN (64 << 20)      /* Increase max gunzip size */
  21
  22 /* CS register bases for the original memory map. */
  23 #define V2M_BASE                        0x80000000
  24 #define V2M_PA_BASE                     0x00000000
  25
  26 #define V2M_PA_CS0                      (V2M_PA_BASE + 0x00000000)
  27 #define V2M_PA_CS1                      (V2M_PA_BASE + 0x14000000)
  28 #define V2M_PA_CS2                      (V2M_PA_BASE + 0x18000000)
  29 #define V2M_PA_CS3                      (V2M_PA_BASE + 0x1c000000)
  30 #define V2M_PA_CS4                      (V2M_PA_BASE + 0x0c000000)
  31 #define V2M_PA_CS5                      (V2M_PA_BASE + 0x10000000)
  32
  33 #define V2M_PERIPH_OFFSET(x)            (x << 16)
  34 #define V2M_SYSREGS                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
  35 #define V2M_SYSCTL                      (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
  36 #define V2M_SERIAL_BUS_PCI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
  37
  38 /* Common peripherals relative to CS7. */
  39 #define V2M_AACI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
  40 #define V2M_MMCI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
  41 #define V2M_KMI0                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
  42 #define V2M_KMI1                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
  43
  44 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  45 #define V2M_UART0                       0x7ff80000
  46 #define V2M_UART1                       0x7ff70000
  47 #else /* Not Juno */
  48 #define V2M_UART0                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
  49 #define V2M_UART1                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
  50 #define V2M_UART2                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
  51 #define V2M_UART3                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
  52 #endif
  53
  54 #define V2M_WDT                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
  55
  56 #define V2M_TIMER01                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
  57 #define V2M_TIMER23                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
  58
  59 #define V2M_SERIAL_BUS_DVI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
  60 #define V2M_RTC                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
  61
  62 #define V2M_CF                          (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
  63
  64 #define V2M_CLCD                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
  65
  66 /* System register offsets. */
  67 #define V2M_SYS_CFGDATA                 (V2M_SYSREGS + 0x0a0)
  68 #define V2M_SYS_CFGCTRL                 (V2M_SYSREGS + 0x0a4)
  69 #define V2M_SYS_CFGSTAT                 (V2M_SYSREGS + 0x0a8)
  70
  71 /* Generic Timer Definitions */
  72 #define COUNTER_FREQUENCY               24000000        /* 24MHz */
  73
  74 /* Generic Interrupt Controller Definitions */
  75 #ifdef CONFIG_GICV3
  76 #define GICD_BASE                       (V2M_PA_BASE + 0x2f000000)
  77 #define GICR_BASE                       (V2M_PA_BASE + 0x2f100000)
  78 #else
  79
  80 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  81 #define GICD_BASE                       (0x2C010000)
  82 #define GICC_BASE                       (0x2C02f000)
  83 #else
  84 #define GICD_BASE                       (V2M_PA_BASE + 0x2f000000)
  85 #define GICC_BASE                       (V2M_PA_BASE + 0x2c000000)
  86 #endif
  87 #endif /* !CONFIG_GICV3 */
  88
  89 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH)
  90 /* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */
  91 #define CONFIG_SMC91111                 1
  92 #define CONFIG_SMC91111_BASE            (V2M_PA_BASE + 0x01A000000)
  93 #endif
  94
  95 /* PL011 Serial Configuration */
  96 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  97 #define CONFIG_PL011_CLOCK              7372800
  98 #else
  99 #define CONFIG_PL011_CLOCK              24000000
 100 #endif
 101
 102 /* BOOTP options */
 103 #define CONFIG_BOOTP_BOOTFILESIZE
 104
 105 /* Miscellaneous configurable options */
 106
 107 /* Physical Memory Map */
 108 #define PHYS_SDRAM_1                    (V2M_BASE)      /* SDRAM Bank #1 */
 109 /* Top 16MB reserved for secure world use */
 110 #define DRAM_SEC_SIZE           0x01000000
 111 #define PHYS_SDRAM_1_SIZE       0x80000000 - DRAM_SEC_SIZE
 112 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
 113
 114 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 115 #define PHYS_SDRAM_2                    (0x880000000)
 116 #define PHYS_SDRAM_2_SIZE               0x180000000
 117 #elif CONFIG_NR_DRAM_BANKS == 2
 118 #define PHYS_SDRAM_2                    (0x880000000)
 119 #define PHYS_SDRAM_2_SIZE               0x80000000
 120 #endif
 121
 122 /* Enable memtest */
 123
 124 /* Initial environment variables */
 125 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 126 /* Copy the kernel and FDT to DRAM memory and boot */
 127 #define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \
 128         "bootcmd_afs="                                                  \
 129                 "afs load ${kernel_name} ${kernel_addr_r} ;"\
 130                 "if test $? -eq 1; then "\
 131                 "  echo Loading ${kernel_alt_name} instead of ${kernel_name}; "\
 132                 "  afs load ${kernel_alt_name} ${kernel_addr_r};"\
 133                 "fi ; "\
 134                 "afs load ${fdtfile} ${fdt_addr_r} ;"\
 135                 "if test $? -eq 1; then "\
 136                 "  echo Loading ${fdt_alt_name} instead of ${fdtfile}; "\
 137                 "  afs load ${fdt_alt_name} ${fdt_addr_r}; "\
 138                 "fi ; "\
 139                 "fdt addr ${fdt_addr_r}; fdt resize; " \
 140                 "if afs load  ${ramdisk_name} ${ramdisk_addr_r} ; "\
 141                 "then "\
 142                 "  setenv ramdisk_param ${ramdisk_addr_r}; "\
 143                 "else "\
 144                 "  setenv ramdisk_param -; "\
 145                 "fi ; " \
 146                 "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0"
 147 #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs "
 148
 149 #define BOOT_TARGET_DEVICES(func)       \
 150         func(USB, usb, 0)               \
 151         func(SATA, sata, 0)             \
 152         func(SATA, sata, 1)             \
 153         func(PXE, pxe, na)              \
 154         func(DHCP, dhcp, na)            \
 155         func(AFS, afs, na)
 156
 157 #include <config_distro_bootcmd.h>
 158
 159 /*
 160  * Defines where the kernel and FDT exist in NOR flash and where it will
 161  * be copied into DRAM
 162  */
 163 #define CONFIG_EXTRA_ENV_SETTINGS       \
 164                                 "kernel_name=norkern\0" \
 165                                 "kernel_alt_name=Image\0"       \
 166                                 "kernel_addr_r=0x80080000\0" \
 167                                 "ramdisk_name=ramdisk.img\0"    \
 168                                 "ramdisk_addr_r=0x88000000\0"   \
 169                                 "fdtfile=board.dtb\0" \
 170                                 "fdt_alt_name=juno\0" \
 171                                 "fdt_addr_r=0x80000000\0" \
 172                                 BOOTENV
 173
 174 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
 175
 176 #define VEXPRESS_KERNEL_ADDR    0x80080000
 177 #define VEXPRESS_FDT_ADDR       0x8fc00000
 178 #define VEXPRESS_BOOT_ADDR      0x8fd00000
 179 #define VEXPRESS_RAMDISK_ADDR   0x8fe00000
 180
 181 #define CONFIG_EXTRA_ENV_SETTINGS       \
 182                                 "kernel_name=Image\0"           \
 183                                 "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \
 184                                 "ramdisk_name=ramdisk.img\0"    \
 185                                 "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \
 186                                 "fdtfile=devtree.dtb\0" \
 187                                 "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0"       \
 188                                 "boot_name=boot.img\0" \
 189                                 "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0"
 190
 191 #endif
 192
 193 /* Monitor Command Prompt */
 194 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 195 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 196
 197 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 198 #define CONFIG_SYS_FLASH_BASE           0x08000000
 199 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
 200 #define CONFIG_SYS_MAX_FLASH_SECT       259
 201 /* Store environment at top of flash in the same location as blank.img */
 202 /* in the Juno firmware. */
 203 #else
 204 #define CONFIG_SYS_FLASH_BASE           (V2M_PA_BASE + 0x0C000000)
 205 /* 256 x 256KiB sectors */
 206 #define CONFIG_SYS_MAX_FLASH_SECT       256
 207 /* Store environment at top of flash */
 208 #endif
 209
 210 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_32BIT
 211
 212 #ifdef CONFIG_USB_EHCI_HCD
 213 #define CONFIG_USB_OHCI_NEW
 214 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
 215 #endif
 216
 217 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* flinfo indicates empty blocks */
 218 #define FLASH_MAX_SECTOR_SIZE           0x00040000
 219
 220 #endif /* __VEXPRESS_AEMV8_H */