1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2022 Toradex
6 #ifndef __VERDIN_IMX8MP_H
7 #define __VERDIN_IMX8MP_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #define CONFIG_SYS_MONITOR_LEN SZ_512K
13 #define CONFIG_SYS_UBOOT_BASE \
14 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
16 #ifdef CONFIG_SPL_BUILD
17 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
18 #define CONFIG_SPL_STACK 0x960000
19 #define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
20 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
21 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
23 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
24 #define CONFIG_MALLOC_F_ADDR 0x184000
25 /* For RAW image gives a error info not panic */
26 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
28 #define CONFIG_POWER_PCA9450
30 #define CONFIG_SYS_I2C
31 #endif /* CONFIG_SPL_BUILD */
35 #if defined(CONFIG_CMD_NET)
36 #define CONFIG_FEC_MXC_PHYADDR 7
38 #define PHY_ANEG_TIMEOUT 20000
39 #endif /* CONFIG_CMD_NET */
41 #define MEM_LAYOUT_ENV_SETTINGS \
42 "fdt_addr_r=0x43000000\0" \
43 "kernel_addr_r=0x40000000\0" \
44 "ramdisk_addr_r=0x46400000\0" \
45 "scriptaddr=0x46000000\0"
47 /* Enable Distro Boot */
48 #ifndef CONFIG_SPL_BUILD
49 #define BOOT_TARGET_DEVICES(func) \
53 #include <config_distro_bootcmd.h>
58 #if defined(CONFIG_TDX_EASY_INSTALLER)
59 # define BOOT_SCRIPT "boot-tezi.scr"
61 # define BOOT_SCRIPT "boot.scr"
64 /* Initial environment variables */
65 #define CONFIG_EXTRA_ENV_SETTINGS \
67 MEM_LAYOUT_ENV_SETTINGS \
68 "bootcmd_mfg=fastboot 0\0" \
70 "boot_scripts=" BOOT_SCRIPT "\0" \
71 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
74 "initrd_addr=0x43800000\0" \
75 "initrd_high=0xffffffffffffffff\0" \
76 "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \
77 "consoleblank=0 earlycon\0" \
78 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
79 "if test \"$confirm\" = \"y\"; then " \
80 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
81 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
84 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
85 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
87 #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
89 /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
90 #define CONFIG_SYS_SDRAM_BASE 0x40000000
91 #define PHYS_SDRAM 0x40000000
92 #define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
93 #define PHYS_SDRAM_2 0x100000000
94 #define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
97 #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
99 #endif /* __VERDIN_IMX8MP_H */