Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig
[platform/kernel/u-boot.git] / include / configs / uniphier.h
1 /*
2  * Copyright (C) 2012-2015 Panasonic Corporation
3  * Copyright (C) 2015-2016 Socionext Inc.
4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 /* U-Boot - Common settings for UniPhier Family */
10
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__
13
14 #define CONFIG_ARMV7_PSCI_1_0
15
16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
17
18 /*-----------------------------------------------------------------------
19  * MMU and Cache Setting
20  *----------------------------------------------------------------------*/
21
22 /* Comment out the following to enable L1 cache */
23 /* #define CONFIG_SYS_ICACHE_OFF */
24 /* #define CONFIG_SYS_DCACHE_OFF */
25
26 #define CONFIG_BOARD_LATE_INIT
27
28 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
29
30 #define CONFIG_TIMESTAMP
31
32 /* FLASH related */
33 #define CONFIG_MTD_DEVICE
34
35 #define CONFIG_SMC911X_32_BIT
36 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
37 #define CONFIG_SMC911X_BASE     0
38
39 #ifdef CONFIG_MICRO_SUPPORT_CARD
40 #define CONFIG_SMC911X
41 #else
42 #define CONFIG_SYS_NO_FLASH
43 #endif
44
45 #define CONFIG_FLASH_CFI_DRIVER
46 #define CONFIG_SYS_FLASH_CFI
47
48 #define CONFIG_SYS_MAX_FLASH_SECT       256
49 #define CONFIG_SYS_MONITOR_BASE         0
50 #define CONFIG_SYS_MONITOR_LEN          0x00080000      /* 512KB */
51 #define CONFIG_SYS_FLASH_BASE           0
52
53 /*
54  * flash_toggle does not work for our support card.
55  * We need to use flash_status_poll.
56  */
57 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
58
59 #define CONFIG_FLASH_SHOW_PROGRESS      45 /* count down from 45/5: 9..1 */
60
61 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
62
63 /* serial console configuration */
64 #define CONFIG_BAUDRATE                 115200
65
66 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
67
68 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
69 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
70 /* Print Buffer Size */
71 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
72 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
73 /* Boot Argument Buffer Size */
74 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
75
76 #define CONFIG_CONS_INDEX               1
77
78 /* #define CONFIG_ENV_IS_NOWHERE */
79 /* #define CONFIG_ENV_IS_IN_NAND */
80 #define CONFIG_ENV_IS_IN_MMC
81 #define CONFIG_ENV_OFFSET                       0x80000
82 #define CONFIG_ENV_SIZE                         0x2000
83 /* #define CONFIG_ENV_OFFSET_REDUND     (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
84
85 #define CONFIG_SYS_MMC_ENV_DEV          0
86 #define CONFIG_SYS_MMC_ENV_PART         1
87
88 #ifdef CONFIG_ARM64
89 #define CPU_RELEASE_ADDR                        0x80000000
90 #define COUNTER_FREQUENCY                       50000000
91 #define CONFIG_GICV3
92 #define GICD_BASE                               0x5fe00000
93 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
94 #define GICR_BASE                               0x5fe40000
95 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
96 #define GICR_BASE                               0x5fe80000
97 #endif
98 #else
99 /* Time clock 1MHz */
100 #define CONFIG_SYS_TIMER_RATE                   1000000
101 #endif
102
103
104 #define CONFIG_SYS_MAX_NAND_DEVICE                      1
105 #define CONFIG_SYS_NAND_MAX_CHIPS                       2
106 #define CONFIG_SYS_NAND_ONFI_DETECTION
107
108 #define CONFIG_NAND_DENALI_ECC_SIZE                     1024
109
110 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
111 #define CONFIG_SYS_NAND_REGS_BASE                       0xf8100000
112 #define CONFIG_SYS_NAND_DATA_BASE                       0xf8000000
113 #else
114 #define CONFIG_SYS_NAND_REGS_BASE                       0x68100000
115 #define CONFIG_SYS_NAND_DATA_BASE                       0x68000000
116 #endif
117
118 #define CONFIG_SYS_NAND_BASE            (CONFIG_SYS_NAND_DATA_BASE + 0x10)
119
120 #define CONFIG_SYS_NAND_USE_FLASH_BBT
121 #define CONFIG_SYS_NAND_BAD_BLOCK_POS                   0
122
123 /* USB */
124 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      4
125 #define CONFIG_FAT_WRITE
126 #define CONFIG_DOS_PARTITION
127
128 /* SD/MMC */
129 #define CONFIG_SUPPORT_EMMC_BOOT
130 #define CONFIG_GENERIC_MMC
131
132 /* memtest works on */
133 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
134 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x01000000)
135
136 /*
137  * Network Configuration
138  */
139 #define CONFIG_SERVERIP                 192.168.11.1
140 #define CONFIG_IPADDR                   192.168.11.10
141 #define CONFIG_GATEWAYIP                192.168.11.1
142 #define CONFIG_NETMASK                  255.255.255.0
143
144 #define CONFIG_LOADADDR                 0x84000000
145 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
146
147 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
148
149 #define CONFIG_BOOTCOMMAND              "run $bootmode"
150
151 #define CONFIG_ROOTPATH                 "/nfs/root/path"
152 #define CONFIG_NFSBOOTCOMMAND                                           \
153         "setenv bootargs $bootargs root=/dev/nfs rw "                   \
154         "nfsroot=$serverip:$rootpath "                                  \
155         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
156                 "run __nfsboot"
157
158 #ifdef CONFIG_FIT
159 #define CONFIG_BOOTFILE                 "fitImage"
160 #define LINUXBOOT_ENV_SETTINGS \
161         "fit_addr=0x00100000\0" \
162         "fit_addr_r=0x84100000\0" \
163         "fit_size=0x00f00000\0" \
164         "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
165                 "bootm $fit_addr\0" \
166         "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
167                 "bootm $fit_addr_r\0" \
168         "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
169                 "bootm $fit_addr_r\0" \
170         "__nfsboot=run tftpboot\0"
171 #else
172 #ifdef CONFIG_ARM64
173 #define CONFIG_BOOTFILE                 "Image"
174 #define LINUXBOOT_CMD                   "booti"
175 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80080000\0"
176 #define KERNEL_SIZE                     "kernel_size=0x00c00000\0"
177 #define RAMDISK_ADDR                    "ramdisk_addr=0x00e00000\0"
178 #else
179 #define CONFIG_BOOTFILE                 "zImage"
180 #define LINUXBOOT_CMD                   "bootz"
181 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80208000\0"
182 #define KERNEL_SIZE                     "kernel_size=0x00800000\0"
183 #define RAMDISK_ADDR                    "ramdisk_addr=0x00a00000\0"
184 #endif
185 #define LINUXBOOT_ENV_SETTINGS \
186         "fdt_addr=0x00100000\0" \
187         "fdt_addr_r=0x84100000\0" \
188         "fdt_size=0x00008000\0" \
189         "kernel_addr=0x00200000\0" \
190         KERNEL_ADDR_R \
191         KERNEL_SIZE \
192         RAMDISK_ADDR \
193         "ramdisk_addr_r=0x84a00000\0" \
194         "ramdisk_size=0x00600000\0" \
195         "ramdisk_file=rootfs.cpio.uboot\0" \
196         "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \
197                 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
198         "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
199                 "setexpr kernel_size $kernel_size / 4 &&" \
200                 "cp $kernel_addr $kernel_addr_r $kernel_size &&" \
201                 "setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \
202                 "setexpr fdt_addr_r $nor_base + $fdt_addr &&" \
203                 "run boot_common\0" \
204         "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
205                 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
206                 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
207                 "run boot_common\0" \
208         "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
209                 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
210                 "tftpboot $fdt_addr_r $fdt_file &&" \
211                 "run boot_common\0" \
212         "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \
213                 "tftpboot $fdt_addr_r $fdt_file &&" \
214                 "setenv ramdisk_addr_r - &&" \
215                 "run boot_common\0"
216 #endif
217
218 #define CONFIG_EXTRA_ENV_SETTINGS                               \
219         "netdev=eth0\0"                                         \
220         "verify=n\0"                                            \
221         "nor_base=0x42000000\0"                                 \
222         "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"    \
223                 "tftpboot $tmp_addr u-boot-spl.bin &&"          \
224                 "setexpr tmp_addr $nor_base + 0x60000 &&"       \
225                 "tftpboot $tmp_addr u-boot.bin\0"               \
226         "emmcupdate=mmcsetn &&"                                 \
227                 "mmc partconf $mmc_first_dev 0 1 1 &&"          \
228                 "tftpboot u-boot-spl.bin &&"                    \
229                 "mmc write $loadaddr 0 80 &&"                   \
230                 "tftpboot u-boot.bin &&"                        \
231                 "mmc write $loadaddr 80 780\0"                  \
232         "nandupdate=nand erase 0 0x00100000 &&"                 \
233                 "tftpboot u-boot-spl.bin &&"                    \
234                 "nand write $loadaddr 0 0x00010000 &&"          \
235                 "tftpboot u-boot.bin &&"                        \
236                 "nand write $loadaddr 0x00010000 0x000f0000\0"  \
237         LINUXBOOT_ENV_SETTINGS
238
239 #define CONFIG_SYS_BOOTMAPSZ                    0x20000000
240
241 #define CONFIG_SYS_SDRAM_BASE           0x80000000
242 #define CONFIG_NR_DRAM_BANKS            2
243 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
244 #define CONFIG_SYS_MEM_TOP_HIDE         64
245
246 #if defined(CONFIG_ARM64)
247 #define CONFIG_SPL_TEXT_BASE            0x30000000
248 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
249         defined(CONFIG_ARCH_UNIPHIER_LD4) || \
250         defined(CONFIG_ARCH_UNIPHIER_SLD8)
251 #define CONFIG_SPL_TEXT_BASE            0x00040000
252 #else
253 #define CONFIG_SPL_TEXT_BASE            0x00100000
254 #endif
255
256 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
257 #define CONFIG_SPL_STACK                (0x30014c00)
258 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
259 #define CONFIG_SPL_STACK                (0x3001c000)
260 #else
261 #define CONFIG_SPL_STACK                (0x00100000)
262 #endif
263 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE)
264
265 #define CONFIG_PANIC_HANG
266
267 #define CONFIG_SPL_FRAMEWORK
268 #ifdef CONFIG_ARM64
269 #define CONFIG_SPL_BOARD_LOAD_IMAGE
270 #endif
271
272 #define CONFIG_SPL_BOARD_INIT
273
274 #define CONFIG_SYS_NAND_U_BOOT_OFFS             0x10000
275
276 /* subtract sizeof(struct image_header) */
277 #define CONFIG_SYS_UBOOT_BASE                   (0x60000 - 0x40)
278
279 #define CONFIG_SPL_TARGET                       "u-boot-with-spl.bin"
280 #define CONFIG_SPL_MAX_FOOTPRINT                0x10000
281 #define CONFIG_SPL_MAX_SIZE                     0x10000
282 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
283 #define CONFIG_SPL_BSS_START_ADDR               0x30012000
284 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
285 #define CONFIG_SPL_BSS_START_ADDR               0x30016000
286 #endif
287 #define CONFIG_SPL_BSS_MAX_SIZE                 0x2000
288
289 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */