pxa: fixing get_timer to return time in miliseconds.
[platform/kernel/u-boot.git] / include / configs / trizepsiv.h
1 /*
2  * (C) Copyright 2007
3  * Stefano Babic, DENX Gmbh, sbabic@denx.de
4  *
5  * (C) Copyright 2004
6  * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
7  *
8  * (C) Copyright 2002
9  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
10  *
11  * (C) Copyright 2002
12  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13  * Marius Groeger <mgroeger@sysgo.de>
14  *
15  * Configuation settings for the LUBBOCK board.
16  *
17  * See file CREDITS for list of people who contributed to this
18  * project.
19  *
20  * This program is free software; you can redistribute it and/or
21  * modify it under the terms of the GNU General Public License as
22  * published by the Free Software Foundation; either version 2 of
23  * the License, or (at your option) any later version.
24  *
25  * This program is distributed in the hope that it will be useful,
26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
28  * GNU General Public License for more details.
29  *
30  * You should have received a copy of the GNU General Public License
31  * along with this program; if not, write to the Free Software
32  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33  * MA 02111-1307 USA
34  */
35
36 #ifndef __CONFIG_H
37 #define __CONFIG_H
38
39 /*
40  * High Level Configuration Options
41  * (easy to change)
42  */
43 #define CONFIG_PXA27X           1       /* This is an PXA27x CPU    */
44
45 #define CONFIG_MMC              1
46 #define BOARD_LATE_INIT         1
47
48 #undef CONFIG_USE_IRQ                   /* we don't need IRQ/FIQ stuff */
49
50 #define RTC
51
52 /*
53  * Size of malloc() pool
54  */
55 #define CONFIG_SYS_MALLOC_LEN       (CONFIG_ENV_SIZE + 128*1024)
56 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* size in bytes reserved for initial data */
57
58 /*
59  * Hardware drivers
60  */
61
62 /*
63  * select serial console configuration
64  */
65 #define CONFIG_SERIAL_MULTI
66 #define CONFIG_FFUART          1       /* we use FFUART on Conxs */
67 #define CONFIG_BTUART          1       /* we use BTUART on Conxs */
68 #define CONFIG_STUART          1       /* we use STUART on Conxs */
69
70 /* allow to overwrite serial and ethaddr */
71 #define CONFIG_ENV_OVERWRITE
72
73 #define CONFIG_BAUDRATE        38400
74
75 #define CONFIG_DOS_PARTITION   1
76
77 /*
78  * Command line configuration.
79  */
80 #include <config_cmd_default.h>
81
82 #define CONFIG_CMD_MMC
83 #define CONFIG_CMD_FAT
84 #define CONFIG_CMD_IMLS
85 #define CONFIG_CMD_PING
86 #define CONFIG_CMD_USB
87
88 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
89
90 #undef CONFIG_SHOW_BOOT_PROGRESS
91
92 #define CONFIG_BOOTDELAY        3
93 #define CONFIG_SERVERIP         192.168.1.99
94 #define CONFIG_BOOTCOMMAND      "run boot_flash"
95 #define CONFIG_BOOTARGS         "console=ttyS0,38400 ramdisk_size=12288"\
96                                 " rw root=/dev/ram initrd=0xa0800000,5m"
97
98 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
99         "program_boot_mmc="                                             \
100                         "mw.b 0xa0010000 0xff 0x20000; "                \
101                         "if      mmcinit && "                           \
102                                 "fatload mmc 0 0xa0010000 u-boot.bin; " \
103                         "then "                                         \
104                                 "protect off 0x0 0x1ffff; "             \
105                                 "erase 0x0 0x1ffff; "                   \
106                                 "cp.b 0xa0010000 0x0 0x20000; "         \
107                         "fi\0"                                          \
108         "program_uzImage_mmc="                                          \
109                         "mw.b 0xa0010000 0xff 0x180000; "               \
110                         "if      mmcinit && "                           \
111                                 "fatload mmc 0 0xa0010000 uzImage; "    \
112                         "then "                                         \
113                                 "protect off 0x40000 0x1bffff; "        \
114                                 "erase 0x40000 0x1bffff; "              \
115                                 "cp.b 0xa0010000 0x40000 0x180000; "    \
116                         "fi\0"                                          \
117         "program_ramdisk_mmc="                                          \
118                         "mw.b 0xa0010000 0xff 0x500000; "               \
119                         "if      mmcinit && "                           \
120                                 "fatload mmc 0 0xa0010000 ramdisk.gz; " \
121                         "then "                                         \
122                                 "protect off 0x1c0000 0x6bffff; "       \
123                                 "erase 0x1c0000 0x6bffff; "             \
124                                 "cp.b 0xa0010000 0x1c0000 0x500000; "   \
125                         "fi\0"                                          \
126         "boot_mmc="                                                     \
127                         "if      mmcinit && "                           \
128                                 "fatload mmc 0 0xa0030000 uzImage && "  \
129                                 "fatload mmc 0 0xa0800000 ramdisk.gz; " \
130                         "then "                                         \
131                                 "bootm 0xa0030000; "                    \
132                         "fi\0"                                          \
133         "boot_flash="                                                   \
134                         "cp.b 0x1c0000 0xa0800000 0x500000; "           \
135                         "bootm 0x40000\0"                               \
136
137 #define CONFIG_SETUP_MEMORY_TAGS 1
138 #define CONFIG_CMDLINE_TAG       1      /* enable passing of ATAGs      */
139 /* #define CONFIG_INITRD_TAG     1 */
140
141 #if defined(CONFIG_CMD_KGDB)
142 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
143 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
144 #endif
145
146 /*
147  * Miscellaneous configurable options
148  */
149 #define CONFIG_SYS_HUSH_PARSER          1
150 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
151
152 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
153 #ifdef CONFIG_SYS_HUSH_PARSER
154 #define CONFIG_SYS_PROMPT               "$ "            /* Monitor Command Prompt */
155 #else
156 #define CONFIG_SYS_PROMPT               "=> "           /* Monitor Command Prompt */
157 #endif
158 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
159 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
160 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
161 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
162 #define CONFIG_SYS_DEVICE_NULLDEV       1
163
164 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on     */
165 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM   */
166
167 #undef  CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
168
169 #define CONFIG_SYS_LOAD_ADDR            0xa1000000      /* default load address */
170
171 #define CONFIG_SYS_HZ                   1000
172 #define CONFIG_SYS_CPUSPEED             0x207           /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
173
174                                                 /* valid baudrates */
175 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
176
177 #define CONFIG_SYS_MMC_BASE             0xF0000000
178
179 /*
180  * Stack sizes
181  *
182  * The stack sizes are set up in start.S using the settings below
183  */
184 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
185 #ifdef CONFIG_USE_IRQ
186 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
187 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
188 #endif
189
190 /*
191  * Physical Memory Map
192  */
193 #define CONFIG_NR_DRAM_BANKS    4          /* we have 2 banks of DRAM */
194 #define PHYS_SDRAM_1            0xa0000000 /* SDRAM Bank #1 */
195 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
196 #define PHYS_SDRAM_2            0xa4000000 /* SDRAM Bank #2 */
197 #define PHYS_SDRAM_2_SIZE       0x00000000 /* 0 MB */
198 #define PHYS_SDRAM_3            0xa8000000 /* SDRAM Bank #3 */
199 #define PHYS_SDRAM_3_SIZE       0x00000000 /* 0 MB */
200 #define PHYS_SDRAM_4            0xac000000 /* SDRAM Bank #4 */
201 #define PHYS_SDRAM_4_SIZE       0x00000000 /* 0 MB */
202
203 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #1 */
204
205 #define CONFIG_SYS_DRAM_BASE            0xa0000000
206 #define CONFIG_SYS_DRAM_SIZE            0x04000000
207
208 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
209
210 /*
211  * GPIO settings
212  */
213 #define CONFIG_SYS_GPSR0_VAL            0x00018000
214 #define CONFIG_SYS_GPSR1_VAL            0x00000000
215 #define CONFIG_SYS_GPSR2_VAL            0x400dc000
216 #define CONFIG_SYS_GPSR3_VAL            0x00000000
217 #define CONFIG_SYS_GPCR0_VAL            0x00000000
218 #define CONFIG_SYS_GPCR1_VAL            0x00000000
219 #define CONFIG_SYS_GPCR2_VAL            0x00000000
220 #define CONFIG_SYS_GPCR3_VAL            0x00000000
221 #define CONFIG_SYS_GPDR0_VAL            0x00018000
222 #define CONFIG_SYS_GPDR1_VAL            0x00028801
223 #define CONFIG_SYS_GPDR2_VAL            0x520dc000
224 #define CONFIG_SYS_GPDR3_VAL            0x0001E000
225 #define CONFIG_SYS_GAFR0_L_VAL          0x801c0000
226 #define CONFIG_SYS_GAFR0_U_VAL          0x00000013
227 #define CONFIG_SYS_GAFR1_L_VAL          0x6990100A
228 #define CONFIG_SYS_GAFR1_U_VAL          0x00000008
229 #define CONFIG_SYS_GAFR2_L_VAL          0xA0000000
230 #define CONFIG_SYS_GAFR2_U_VAL          0x010900F2
231 #define CONFIG_SYS_GAFR3_L_VAL          0x54000003
232 #define CONFIG_SYS_GAFR3_U_VAL          0x00002401
233 #define CONFIG_SYS_GRER0_VAL            0x00000000
234 #define CONFIG_SYS_GRER1_VAL            0x00000000
235 #define CONFIG_SYS_GRER2_VAL            0x00000000
236 #define CONFIG_SYS_GRER3_VAL            0x00000000
237 #define CONFIG_SYS_GFER0_VAL            0x00000000
238 #define CONFIG_SYS_GFER1_VAL            0x00000000
239 #define CONFIG_SYS_GFER2_VAL            0x00000000
240 #define CONFIG_SYS_GFER3_VAL            0x00000020
241
242
243 #define CONFIG_SYS_PSSR_VAL             0x20    /* CHECK */
244
245 /*
246  * Clock settings
247  */
248 #define CONFIG_SYS_CKEN         0x01FFFFFF      /* CHECK */
249 #define CONFIG_SYS_CCCR         0x02000290 /*   520Mhz */
250
251 /*
252  * Memory settings
253  */
254
255 #define CONFIG_SYS_MSC0_VAL             0x4df84df0
256 #define CONFIG_SYS_MSC1_VAL             0x7ff87ff4
257 #define CONFIG_SYS_MSC2_VAL             0xa26936d4
258 #define CONFIG_SYS_MDCNFG_VAL           0x880009C9
259 #define CONFIG_SYS_MDREFR_VAL           0x20ca201e
260 #define CONFIG_SYS_MDMRS_VAL            0x00220022
261
262 #define CONFIG_SYS_FLYCNFG_VAL          0x00000000
263 #define CONFIG_SYS_SXCNFG_VAL           0x40044004
264
265 /*
266  * PCMCIA and CF Interfaces
267  */
268 #define CONFIG_SYS_MECR_VAL             0x00000001
269 #define CONFIG_SYS_MCMEM0_VAL           0x00004204
270 #define CONFIG_SYS_MCMEM1_VAL           0x00010204
271 #define CONFIG_SYS_MCATT0_VAL           0x00010504
272 #define CONFIG_SYS_MCATT1_VAL           0x00010504
273 #define CONFIG_SYS_MCIO0_VAL            0x00008407
274 #define CONFIG_SYS_MCIO1_VAL            0x0000c108
275
276 #define CONFIG_DRIVER_DM9000            1
277 #define CONFIG_DM9000_BASE      0x08000000
278 #define DM9000_IO                       CONFIG_DM9000_BASE
279 #define DM9000_DATA                     (CONFIG_DM9000_BASE+0x8004)
280
281 #define CONFIG_USB_OHCI_NEW     1
282 #define CONFIG_SYS_USB_OHCI_BOARD_INIT  1
283 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      3
284 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x4C000000
285 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "trizepsiv"
286 #define CONFIG_USB_STORAGE      1
287 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
288
289 /*
290  * FLASH and environment organization
291  */
292
293 #define CONFIG_SYS_FLASH_CFI
294 #define CONFIG_FLASH_CFI_DRIVER 1
295
296 #define CONFIG_SYS_MONITOR_BASE 0
297 #define CONFIG_SYS_MONITOR_LEN          0x40000
298
299 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
300 #define CONFIG_SYS_MAX_FLASH_SECT       4 + 255  /* max number of sectors on one chip   */
301
302 /* timeout values are in ticks */
303 #define CONFIG_SYS_FLASH_ERASE_TOUT     (25*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
304 #define CONFIG_SYS_FLASH_WRITE_TOUT     (25*CONFIG_SYS_HZ) /* Timeout for Flash Write */
305
306 /* write flash less slowly */
307 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
308
309 /* Flash environment locations */
310 #define CONFIG_ENV_IS_IN_FLASH  1
311 #define CONFIG_ENV_ADDR         (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) /* Addr of Environment Sector   */
312 #define CONFIG_ENV_SIZE         0x40000 /* Total Size of Environment            */
313 #define CONFIG_ENV_SECT_SIZE    0x40000 /* Total Size of Environment Sector     */
314
315 /* Address and size of Redundant Environment Sector     */
316 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE)
317 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
318
319 #endif  /* __CONFIG_H */