include/configs/trats2.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2013 Samsung Electronics
   4  * Sanghee Kim <sh0130.kim@samsung.com>
   5  * Piotr Wilczek <p.wilczek@samsung.com>
   6  *
   7  * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
   8  */
   9
  10 #ifndef __CONFIG_TRATS2_H
  11 #define __CONFIG_TRATS2_H
  12
  13 #include <configs/exynos4-common.h>
  14
  15 #define CONFIG_TIZEN                    /* TIZEN lib */
  16
  17 #define CONFIG_SYS_L2CACHE_OFF
  18 #ifndef CONFIG_SYS_L2CACHE_OFF
  19 #define CONFIG_SYS_L2_PL310
  20 #define CONFIG_SYS_PL310_BASE   0x10502000
  21 #endif
  22
  23 /* TRATS2 has 4 banks of DRAM */
  24 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  25 #define PHYS_SDRAM_1                    CONFIG_SYS_SDRAM_BASE
  26 #define SDRAM_BANK_SIZE                 (256 << 20)     /* 256 MB */
  27
  28 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
  29                                         - GENERATED_GBL_DATA_SIZE)
  30
  31 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)       /* ram console */
  32
  33 #define CONFIG_SYS_MONITOR_BASE 0x00000000
  34
  35 /* Tizen - partitions definitions */
  36 #define PARTS_CSA               "csa-mmc"
  37 #define PARTS_BOOT              "boot"
  38 #define PARTS_QBOOT             "qboot"
  39 #define PARTS_CSC               "csc"
  40 #define PARTS_ROOT              "platform"
  41 #define PARTS_DATA              "data"
  42 #define PARTS_UMS               "ums"
  43
  44 #define PARTS_DEFAULT \
  45         "uuid_disk=${uuid_gpt_disk};" \
  46         "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
  47         "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
  48         "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
  49         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
  50         "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
  51         "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
  52         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
  53
  54 #define CONFIG_DFU_ALT \
  55         "u-boot raw 0x80 0x800;" \
  56         "/uImage ext4 0 2;" \
  57         "/modem.bin ext4 0 2;" \
  58         "/exynos4412-trats2.dtb ext4 0 2;" \
  59         ""PARTS_CSA" part 0 1;" \
  60         ""PARTS_BOOT" part 0 2;" \
  61         ""PARTS_QBOOT" part 0 3;" \
  62         ""PARTS_CSC" part 0 4;" \
  63         ""PARTS_ROOT" part 0 5;" \
  64         ""PARTS_DATA" part 0 6;" \
  65         ""PARTS_UMS" part 0 7;" \
  66         "params.bin raw 0x38 0x8;" \
  67         "/Image.itb ext4 0 2\0"
  68
  69 #define CONFIG_EXTRA_ENV_SETTINGS \
  70         "bootk=" \
  71                 "run loaduimage;" \
  72                 "if run loaddtb; then " \
  73                         "bootm 0x40007FC0 - ${fdtaddr};" \
  74                 "fi;" \
  75                 "bootm 0x40007FC0;\0" \
  76         "updatebackup=" \
  77                 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
  78                 " mmc dev 0 0\0" \
  79         "updatebootb=" \
  80                 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
  81         "mmcboot=" \
  82                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
  83                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
  84                 "run bootk\0" \
  85         "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
  86         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
  87         "verify=n\0" \
  88         "rootfstype=ext4\0" \
  89         "console=console=ttySAC2,115200n8\0" \
  90         "kernelname=uImage\0" \
  91         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
  92                 "${kernelname}\0" \
  93         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
  94                 "${fdtfile}\0" \
  95         "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
  96         "mmcbootpart=2\0" \
  97         "mmcrootpart=5\0" \
  98         "opts=always_resume=1\0" \
  99         "partitions=" PARTS_DEFAULT \
 100         "dfu_alt_info=" CONFIG_DFU_ALT \
 101         "uartpath=ap\0" \
 102         "usbpath=ap\0" \
 103         "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
 104         "consoleoff=set console console=ram; save; reset\0" \
 105         "spladdr=0x40000100\0" \
 106         "splsize=0x200\0" \
 107         "splfile=falcon.bin\0" \
 108         "spl_export=" \
 109                    "setexpr spl_imgsize ${splsize} + 8 ;" \
 110                    "setenv spl_imgsize 0x${spl_imgsize};" \
 111                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
 112                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
 113                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
 114                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 115                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
 116                    "spl export atags 0x40007FC0;" \
 117                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
 118                    "mw.l ${spl_addr_tmp} ${splsize};" \
 119                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
 120                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
 121                    "setenv spl_imgsize;" \
 122                    "setenv spl_imgaddr;" \
 123                    "setenv spl_addr_tmp;\0" \
 124         ENV_ITB \
 125         "fdtaddr=40800000\0" \
 126
 127 /* GPT */
 128
 129 /* Security subsystem - enable hw_rand() */
 130 #define CONFIG_EXYNOS_ACE_SHA
 131
 132 /* Common misc for Samsung */
 133 #define CONFIG_MISC_COMMON
 134
 135 /* Download menu - Samsung common */
 136 #define CONFIG_LCD_MENU
 137
 138 /* Download menu - definitions for check keys */
 139 #ifndef __ASSEMBLY__
 140
 141 #define KEY_PWR_PMIC_NAME               "MAX77686_PMIC"
 142 #define KEY_PWR_STATUS_REG              MAX77686_REG_PMIC_STATUS1
 143 #define KEY_PWR_STATUS_MASK             (1 << 0)
 144 #define KEY_PWR_INTERRUPT_REG           MAX77686_REG_PMIC_INT1
 145 #define KEY_PWR_INTERRUPT_MASK          (1 << 1)
 146
 147 #define KEY_VOL_UP_GPIO                 EXYNOS4X12_GPIO_X22
 148 #define KEY_VOL_DOWN_GPIO               EXYNOS4X12_GPIO_X33
 149 #endif /* __ASSEMBLY__ */
 150
 151 /* LCD console */
 152 #define LCD_BPP                 LCD_COLOR16
 153
 154 /* LCD */
 155 #define CONFIG_FB_ADDR          0x52504000
 156 #define CONFIG_EXYNOS_MIPI_DSIM
 157 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
 158
 159 #endif  /* __CONFIG_H */