include/configs/trats.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2011 Samsung Electronics
   4  * Heungjun Kim <riverful.kim@samsung.com>
   5  *
   6  * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
   7  */
   8
   9 #ifndef __CONFIG_TRATS_H
  10 #define __CONFIG_TRATS_H
  11
  12 #include <configs/exynos4-common.h>
  13
  14 #define CONFIG_TRATS
  15
  16 #define CONFIG_TIZEN                    /* TIZEN lib */
  17
  18 #define CONFIG_SYS_L2CACHE_OFF
  19 #ifndef CONFIG_SYS_L2CACHE_OFF
  20 #define CONFIG_SYS_L2_PL310
  21 #define CONFIG_SYS_PL310_BASE   0x10502000
  22 #endif
  23
  24 /* TRATS has 4 banks of DRAM */
  25 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  26 #define PHYS_SDRAM_1                    CONFIG_SYS_SDRAM_BASE
  27 #define SDRAM_BANK_SIZE                 (256 << 20)     /* 256 MB */
  28
  29 /* memtest works on */
  30 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x4800000)
  31
  32 /* select serial console configuration */
  33
  34 #define CONFIG_MACH_TYPE                MACH_TYPE_TRATS
  35
  36 #define CONFIG_BOOTCOMMAND              "run autoboot"
  37 #define CONFIG_DEFAULT_CONSOLE          "console=ttySAC2,115200n8\0"
  38
  39 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
  40                                         - GENERATED_GBL_DATA_SIZE)
  41
  42 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)       /* ram console */
  43
  44 #define CONFIG_SYS_MONITOR_BASE 0x00000000
  45
  46 #define CONFIG_BOOTBLOCK                "10"
  47 #define CONFIG_ENV_COMMON_BOOT          "${console} ${meminfo}"
  48
  49 /* Tizen - partitions definitions */
  50 #define PARTS_CSA               "csa-mmc"
  51 #define PARTS_BOOT              "boot"
  52 #define PARTS_QBOOT             "qboot"
  53 #define PARTS_CSC               "csc"
  54 #define PARTS_ROOT              "platform"
  55 #define PARTS_DATA              "data"
  56 #define PARTS_UMS               "ums"
  57
  58 #define PARTS_DEFAULT \
  59         "uuid_disk=${uuid_gpt_disk};" \
  60         "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
  61         "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
  62         "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
  63         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
  64         "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
  65         "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
  66         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
  67
  68 #define CONFIG_DFU_ALT \
  69         "u-boot raw 0x80 0x400;" \
  70         "/uImage ext4 0 2;" \
  71         "/modem.bin ext4 0 2;" \
  72         "/exynos4210-trats.dtb ext4 0 2;" \
  73         ""PARTS_CSA" part 0 1;" \
  74         ""PARTS_BOOT" part 0 2;" \
  75         ""PARTS_QBOOT" part 0 3;" \
  76         ""PARTS_CSC" part 0 4;" \
  77         ""PARTS_ROOT" part 0 5;" \
  78         ""PARTS_DATA" part 0 6;" \
  79         ""PARTS_UMS" part 0 7;" \
  80         "params.bin raw 0x38 0x8;" \
  81         "/Image.itb ext4 0 2\0"
  82
  83 #define CONFIG_EXTRA_ENV_SETTINGS \
  84         "bootk=" \
  85                 "run loaduimage;" \
  86                 "if run loaddtb; then " \
  87                         "bootm 0x40007FC0 - ${fdtaddr};" \
  88                 "fi;" \
  89                 "bootm 0x40007FC0;\0" \
  90         "updatebackup=" \
  91                 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
  92                 "mmc dev 0 0\0" \
  93         "updatebootb=" \
  94                 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
  95         "lpj=lpj=3981312\0" \
  96         "nfsboot=" \
  97                 "setenv bootargs root=/dev/nfs rw " \
  98                 "nfsroot=${nfsroot},nolock,tcp " \
  99                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 100                 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
 101                 "; run bootk\0" \
 102         "ramfsboot=" \
 103                 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
 104                 "${console} ${meminfo} " \
 105                 "initrd=0x43000000,8M ramdisk=8192\0" \
 106         "mmcboot=" \
 107                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 108                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
 109                 "run bootk\0" \
 110         "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
 111         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
 112         "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
 113         "verify=n\0" \
 114         "rootfstype=ext4\0" \
 115         "console=" CONFIG_DEFAULT_CONSOLE \
 116         "meminfo=crashkernel=32M@0x50000000\0" \
 117         "nfsroot=/nfsroot/arm\0" \
 118         "bootblock=" CONFIG_BOOTBLOCK "\0" \
 119         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
 120         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
 121                 "${fdtfile}\0" \
 122         "mmcdev=0\0" \
 123         "mmcbootpart=2\0" \
 124         "mmcrootpart=5\0" \
 125         "opts=always_resume=1\0" \
 126         "partitions=" PARTS_DEFAULT \
 127         "dfu_alt_info=" CONFIG_DFU_ALT \
 128         "spladdr=0x40000100\0" \
 129         "splsize=0x200\0" \
 130         "splfile=falcon.bin\0" \
 131         "spl_export=" \
 132                    "setexpr spl_imgsize ${splsize} + 8 ;" \
 133                    "setenv spl_imgsize 0x${spl_imgsize};" \
 134                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
 135                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
 136                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
 137                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
 138                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
 139                    "spl export atags 0x40007FC0;" \
 140                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
 141                    "mw.l ${spl_addr_tmp} ${splsize};" \
 142                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
 143                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
 144                    "setenv spl_imgsize;" \
 145                    "setenv spl_imgaddr;" \
 146                    "setenv spl_addr_tmp;\0" \
 147         CONFIG_EXTRA_ENV_ITB \
 148         "fdtaddr=40800000\0" \
 149
 150 /* Falcon mode definitions */
 151 #define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
 152
 153 /* GPT */
 154
 155 /* Security subsystem - enable hw_rand() */
 156 #define CONFIG_EXYNOS_ACE_SHA
 157
 158 /* Common misc for Samsung */
 159 #define CONFIG_MISC_COMMON
 160
 161 /* Download menu - Samsung common */
 162 #define CONFIG_LCD_MENU
 163
 164 /* Download menu - definitions for check keys */
 165 #ifndef __ASSEMBLY__
 166
 167 #define KEY_PWR_PMIC_NAME               "MAX8997_PMIC"
 168 #define KEY_PWR_STATUS_REG              MAX8997_REG_STATUS1
 169 #define KEY_PWR_STATUS_MASK             (1 << 0)
 170 #define KEY_PWR_INTERRUPT_REG           MAX8997_REG_INT1
 171 #define KEY_PWR_INTERRUPT_MASK          (1 << 0)
 172
 173 #define KEY_VOL_UP_GPIO                 EXYNOS4_GPIO_X20
 174 #define KEY_VOL_DOWN_GPIO               EXYNOS4_GPIO_X21
 175 #endif /* __ASSEMBLY__ */
 176
 177 /* LCD console */
 178 #define LCD_BPP                 LCD_COLOR16
 179
 180 /* LCD */
 181 #define CONFIG_BMP_16BPP
 182 #define CONFIG_FB_ADDR          0x52504000
 183 #define CONFIG_EXYNOS_MIPI_DSIM
 184 #define CONFIG_VIDEO_BMP_GZIP
 185 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
 186
 187 #endif  /* __CONFIG_H */