Merge tag 'v2022.01-rc4' into next
[platform/kernel/u-boot.git] / include / configs / trats.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011 Samsung Electronics
4  * Heungjun Kim <riverful.kim@samsung.com>
5  *
6  * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
7  */
8
9 #ifndef __CONFIG_TRATS_H
10 #define __CONFIG_TRATS_H
11
12 #include <configs/exynos4-common.h>
13
14 #define CONFIG_TRATS
15
16 #define CONFIG_TIZEN                    /* TIZEN lib */
17
18 #define CONFIG_SYS_L2CACHE_OFF
19 #ifndef CONFIG_SYS_L2CACHE_OFF
20 #define CONFIG_SYS_L2_PL310
21 #define CONFIG_SYS_PL310_BASE   0x10502000
22 #endif
23
24 /* TRATS has 4 banks of DRAM */
25 #define CONFIG_SYS_SDRAM_BASE           0x40000000
26 #define PHYS_SDRAM_1                    CONFIG_SYS_SDRAM_BASE
27 #define SDRAM_BANK_SIZE                 (256 << 20)     /* 256 MB */
28
29 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
30                                         - GENERATED_GBL_DATA_SIZE)
31
32 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)       /* ram console */
33
34 #define CONFIG_SYS_MONITOR_BASE 0x00000000
35
36 /* Tizen - partitions definitions */
37 #define PARTS_CSA               "csa-mmc"
38 #define PARTS_BOOT              "boot"
39 #define PARTS_QBOOT             "qboot"
40 #define PARTS_CSC               "csc"
41 #define PARTS_ROOT              "platform"
42 #define PARTS_DATA              "data"
43 #define PARTS_UMS               "ums"
44
45 #define PARTS_DEFAULT \
46         "uuid_disk=${uuid_gpt_disk};" \
47         "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
48         "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
49         "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
50         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
51         "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
52         "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
53         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
54
55 #define CONFIG_DFU_ALT \
56         "u-boot raw 0x80 0x400;" \
57         "/uImage ext4 0 2;" \
58         "/modem.bin ext4 0 2;" \
59         "/exynos4210-trats.dtb ext4 0 2;" \
60         ""PARTS_CSA" part 0 1;" \
61         ""PARTS_BOOT" part 0 2;" \
62         ""PARTS_QBOOT" part 0 3;" \
63         ""PARTS_CSC" part 0 4;" \
64         ""PARTS_ROOT" part 0 5;" \
65         ""PARTS_DATA" part 0 6;" \
66         ""PARTS_UMS" part 0 7;" \
67         "params.bin raw 0x38 0x8;" \
68         "/Image.itb ext4 0 2\0"
69
70 #define CONFIG_EXTRA_ENV_SETTINGS \
71         "bootk=" \
72                 "run loaduimage;" \
73                 "if run loaddtb; then " \
74                         "bootm 0x40007FC0 - ${fdtaddr};" \
75                 "fi;" \
76                 "bootm 0x40007FC0;\0" \
77         "updatebackup=" \
78                 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
79                 "mmc dev 0 0\0" \
80         "updatebootb=" \
81                 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
82         "lpj=lpj=3981312\0" \
83         "nfsboot=" \
84                 "setenv bootargs root=/dev/nfs rw " \
85                 "nfsroot=${nfsroot},nolock,tcp " \
86                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
87                 "${netmask}:generic:usb0:off ${console} ${meminfo}" \
88                 "; run bootk\0" \
89         "ramfsboot=" \
90                 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
91                 "${console} ${meminfo} " \
92                 "initrd=0x43000000,8M ramdisk=8192\0" \
93         "mmcboot=" \
94                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
95                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
96                 "run bootk\0" \
97         "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
98         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
99         "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
100         "verify=n\0" \
101         "rootfstype=ext4\0" \
102         "console=console=ttySAC2,115200n8\0" \
103         "meminfo=crashkernel=32M@0x50000000\0" \
104         "nfsroot=/nfsroot/arm\0" \
105         "bootblock=10\0" \
106         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
107         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
108                 "${fdtfile}\0" \
109         "mmcdev=0\0" \
110         "mmcbootpart=2\0" \
111         "mmcrootpart=5\0" \
112         "opts=always_resume=1\0" \
113         "partitions=" PARTS_DEFAULT \
114         "dfu_alt_info=" CONFIG_DFU_ALT \
115         "spladdr=0x40000100\0" \
116         "splsize=0x200\0" \
117         "splfile=falcon.bin\0" \
118         "spl_export=" \
119                    "setexpr spl_imgsize ${splsize} + 8 ;" \
120                    "setenv spl_imgsize 0x${spl_imgsize};" \
121                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
122                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
123                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
124                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
125                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
126                    "spl export atags 0x40007FC0;" \
127                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
128                    "mw.l ${spl_addr_tmp} ${splsize};" \
129                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
130                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
131                    "setenv spl_imgsize;" \
132                    "setenv spl_imgaddr;" \
133                    "setenv spl_addr_tmp;\0" \
134         ENV_ITB \
135         "fdtaddr=40800000\0" \
136
137 /* Falcon mode definitions */
138 #define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
139
140 /* GPT */
141
142 /* Security subsystem - enable hw_rand() */
143 #define CONFIG_EXYNOS_ACE_SHA
144
145 /* Common misc for Samsung */
146 #define CONFIG_MISC_COMMON
147
148 /* Download menu - Samsung common */
149 #define CONFIG_LCD_MENU
150
151 /* Download menu - definitions for check keys */
152 #ifndef __ASSEMBLY__
153
154 #define KEY_PWR_PMIC_NAME               "MAX8997_PMIC"
155 #define KEY_PWR_STATUS_REG              MAX8997_REG_STATUS1
156 #define KEY_PWR_STATUS_MASK             (1 << 0)
157 #define KEY_PWR_INTERRUPT_REG           MAX8997_REG_INT1
158 #define KEY_PWR_INTERRUPT_MASK          (1 << 0)
159
160 #define KEY_VOL_UP_GPIO                 EXYNOS4_GPIO_X20
161 #define KEY_VOL_DOWN_GPIO               EXYNOS4_GPIO_X21
162 #endif /* __ASSEMBLY__ */
163
164 /* LCD console */
165 #define LCD_BPP                 LCD_COLOR16
166
167 /* LCD */
168 #define CONFIG_FB_ADDR          0x52504000
169 #define CONFIG_EXYNOS_MIPI_DSIM
170 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
171
172 #endif  /* __CONFIG_H */