Merge tag 'xilinx-for-v2022.07-rc1' of https://source.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / include / configs / tb100.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems
4  */
5
6 #ifndef _CONFIG_TB100_H_
7 #define _CONFIG_TB100_H_
8
9 #include <linux/sizes.h>
10
11 /*
12  * Memory configuration
13  */
14 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
15
16 #define CONFIG_SYS_DDR_SDRAM_BASE       0x80000000
17 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
18 #define CONFIG_SYS_SDRAM_SIZE           SZ_128M
19
20 #define CONFIG_SYS_INIT_SP_ADDR         \
21         (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
22
23 #define CONFIG_SYS_BOOTM_LEN            SZ_32M
24
25 /*
26  * UART configuration
27  */
28 #define CONFIG_SYS_NS16550_SERIAL
29 #define CONFIG_SYS_NS16550_CLK          166666666
30
31 /*
32  * Even though the board houses Realtek RTL8211E PHY
33  * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
34  * In particular "parse_status" reports link is down.
35  *
36  * Until Realtek PHY driver is fixed fall back to generic PHY driver
37  * which implements all required functionality and behaves much more stable.
38  *
39  *
40  */
41
42 /*
43  * Ethernet configuration
44  */
45 #define ETH0_BASE_ADDRESS               0xFE100000
46 #define ETH1_BASE_ADDRESS               0xFE110000
47
48 /*
49  * Console configuration
50  */
51
52 #endif /* _CONFIG_TB100_H_ */