include/configs/taurus.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
   4  * (C) Copyright 2013 Siemens AG
   5  *
   6  * Based on:
   7  * U-Boot file: include/configs/at91sam9260ek.h
   8  *
   9  * (C) Copyright 2007-2008
  10  * Stelian Pop <stelian@popies.net>
  11  * Lead Tech Design <www.leadtechdesign.com>
  12  */
  13
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 /*
  18  * SoC must be defined first, before hardware.h is included.
  19  * In this case SoC is defined in boards.cfg.
  20  */
  21 #include <asm/hardware.h>
  22 #include <linux/sizes.h>
  23
  24 /*
  25  * Warning: changing CONFIG_SYS_TEXT_BASE requires
  26  * adapting the initial boot program.
  27  * Since the linker has to swallow that define, we must use a pure
  28  * hex number here!
  29  */
  30
  31 /* ARM asynchronous clock */
  32 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  33 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* main clock xtal */
  34
  35 /* Misc CPU related */
  36 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  37 #define CONFIG_SETUP_MEMORY_TAGS
  38 #define CONFIG_INITRD_TAG
  39
  40 /* general purpose I/O */
  41 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  42 #define CONFIG_AT91_GPIO_PULLUP 1       /* keep pullups on peripheral pins */
  43
  44 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
  45 #define CONFIG_USART_ID                 ATMEL_ID_SYS
  46
  47 /*
  48  * SDRAM: 1 bank, min 32, max 128 MB
  49  * Initialized before u-boot gets started.
  50  */
  51 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS1
  52 #define CONFIG_SYS_SDRAM_SIZE           (128 * SZ_1M)
  53
  54 /*
  55  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  56  * leaving the correct space for initial global data structure above
  57  * that address while providing maximum stack area below.
  58  */
  59 #define CONFIG_SYS_INIT_SP_ADDR \
  60         (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
  61
  62 /* NAND flash */
  63 #ifdef CONFIG_CMD_NAND
  64 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  65 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  66 #define CONFIG_SYS_NAND_DBW_8
  67 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  68 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  69 #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PC14
  70 #define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PC13
  71 #endif
  72
  73 /* Ethernet */
  74 #define CONFIG_MACB
  75 #define CONFIG_RMII
  76 #define CONFIG_AT91_WANTS_COMMON_PHY
  77
  78 /* USB */
  79 #if defined(CONFIG_BOARD_TAURUS)
  80 #define CONFIG_USB_ATMEL
  81 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  82 #define CONFIG_USB_OHCI_NEW
  83 #define CONFIG_SYS_USB_OHCI_CPU_INIT
  84 #define CONFIG_SYS_USB_OHCI_REGS_BASE           0x00500000
  85 #define CONFIG_SYS_USB_OHCI_SLOT_NAME           "at91sam9260"
  86 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
  87
  88 /* USB DFU support */
  89
  90 #define CONFIG_USB_GADGET_AT91
  91
  92 /* DFU class support */
  93 #define DFU_MANIFEST_POLL_TIMEOUT       25000
  94 #endif
  95
  96 /* SPI EEPROM */
  97 #define TAURUS_SPI_MASK (1 << 4)
  98
  99 #if defined(CONFIG_SPL_BUILD)
 100 /* SPL related */
 101 #endif
 102
 103 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
 104
 105 #ifndef CONFIG_SPL_BUILD
 106 #if defined(CONFIG_BOARD_AXM)
 107 #define CONFIG_EXTRA_ENV_SETTINGS \
 108         "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
 109                 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
 110         "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
 111         "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
 112         "boot_retries=0\0" \
 113         "ethact=macb0\0" \
 114         "flash_nfs=run nand_kernel;run nfsargs;run addip;" \
 115                 "upgrade_available;bootm ${kernel_ram};reset\0" \
 116         "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
 117                 "bootm ${kernel_ram};reset\0" \
 118         "flash_self_test=run nand_kernel;run setbootargs addtest;" \
 119                 "upgrade_available;bootm ${kernel_ram};reset\0" \
 120         "hostname=systemone\0" \
 121         "kernel_Off=0x00200000\0" \
 122         "kernel_Off_fallback=0x03800000\0" \
 123         "kernel_ram=0x21500000\0" \
 124         "kernel_size=0x00400000\0" \
 125         "kernel_size_fallback=0x00400000\0" \
 126         "loads_echo=1\0" \
 127         "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
 128                 "${kernel_size}\0" \
 129         "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
 130                 "run nfsargs;run addip;upgrade_available;" \
 131                 "bootm ${kernel_ram};reset\0" \
 132         "netdev=eth0\0" \
 133         "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
 134                 "rw nfsroot=${serverip}:${rootpath} " \
 135                 "at91sam9_wdt.wdt_timeout=16\0" \
 136         "partitionset_active=A\0" \
 137         "preboot=echo;echo Type 'run flash_self' to use kernel and root " \
 138                 "filesystem on memory;echo Type 'run flash_nfs' to use " \
 139                 "kernel from memory and root filesystem over NFS;echo Type " \
 140                 "'run net_nfs' to get Kernel over TFTP and mount root " \
 141                 "filesystem over NFS;echo\0" \
 142         "project_dir=systemone\0" \
 143         "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
 144         "rootfs=/dev/mtdblock5\0" \
 145         "rootfs_fallback=/dev/mtdblock7\0" \
 146         "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
 147                 "root=${rootfs} rootfstype=jffs2 panic=7 " \
 148                 "at91sam9_wdt.wdt_timeout=16\0" \
 149         "stderr=serial\0" \
 150         "stdin=serial\0" \
 151         "stdout=serial\0" \
 152         "upgrade_available=0\0"
 153 #endif
 154 #endif /* #ifndef CONFIG_SPL_BUILD */
 155 /*
 156  * Size of malloc() pool
 157  */
 158 #define CONFIG_SYS_MALLOC_LEN \
 159         ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
 160
 161 /* Defines for SPL */
 162 #define CONFIG_SPL_MAX_SIZE             (31 * SZ_512)
 163 #define CONFIG_SPL_STACK                (ATMEL_BASE_SRAM1 + SZ_16K)
 164 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
 165                                         CONFIG_SYS_MALLOC_LEN)
 166 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
 167
 168 #define CONFIG_SPL_BSS_START_ADDR       CONFIG_SPL_MAX_SIZE
 169 #define CONFIG_SPL_BSS_MAX_SIZE         (3 * SZ_512)
 170
 171 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL  (2*32 + 14)
 172 #define CONFIG_SYS_USE_NANDFLASH        1
 173 #define CONFIG_SPL_NAND_RAW_ONLY
 174 #define CONFIG_SPL_NAND_SOFTECC
 175 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 176 #define CONFIG_SYS_NAND_U_BOOT_SIZE     SZ_512K
 177 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 178 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 179 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 180
 181 #define CONFIG_SYS_NAND_SIZE            (256 * SZ_1M)
 182 #define CONFIG_SYS_NAND_PAGE_SIZE       SZ_2K
 183 #define CONFIG_SYS_NAND_BLOCK_SIZE      (SZ_128K)
 184 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 185                                          CONFIG_SYS_NAND_PAGE_SIZE)
 186 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 187 #define CONFIG_SYS_NAND_ECCSIZE         256
 188 #define CONFIG_SYS_NAND_ECCBYTES        3
 189 #define CONFIG_SYS_NAND_OOBSIZE         64
 190 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
 191                                           48, 49, 50, 51, 52, 53, 54, 55, \
 192                                           56, 57, 58, 59, 60, 61, 62, 63, }
 193
 194 #define CONFIG_SPL_ATMEL_SIZE
 195 #define CONFIG_SYS_MASTER_CLOCK         132096000
 196 #define AT91_PLL_LOCK_TIMEOUT           1000000
 197 #define CONFIG_SYS_AT91_PLLA            0x202A3F01
 198 #define CONFIG_SYS_MCKR                 0x1300
 199 #define CONFIG_SYS_MCKR_CSS             (0x02 | CONFIG_SYS_MCKR)
 200 #define CONFIG_SYS_AT91_PLLB            0x10193F05
 201
 202 #define CONFIG_SPL_PAD_TO               CONFIG_SYS_NAND_U_BOOT_OFFS
 203 #define CONFIG_SYS_SPL_LEN              CONFIG_SPL_PAD_TO
 204
 205 #endif