include/configs/tam3517-common.h

   1 /*
   2  * Copyright (C) 2011
   3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   4  *
   5  * Copyright (C) 2009 TechNexion Ltd.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __TAM3517_H
  11 #define __TAM3517_H
  12
  13 /*
  14  * High Level Configuration Options
  15  */
  16 #define CONFIG_OMAP             /* in a TI OMAP core */
  17 #define CONFIG_OMAP_GPIO
  18 #define CONFIG_OMAP_COMMON
  19 /* Common ARM Erratas */
  20 #define CONFIG_ARM_ERRATA_454179
  21 #define CONFIG_ARM_ERRATA_430973
  22 #define CONFIG_ARM_ERRATA_621766
  23
  24 #define CONFIG_SYS_TEXT_BASE 0x80008000
  25
  26 #define CONFIG_SYS_CACHELINE_SIZE       64
  27
  28 #define CONFIG_EMIF4    /* The chip has EMIF4 controller */
  29
  30 #include <asm/arch/cpu.h>               /* get chip and board defs */
  31 #include <asm/arch/omap.h>
  32
  33 /*
  34  * Display CPU and Board information
  35  */
  36 #define CONFIG_DISPLAY_CPUINFO
  37 #define CONFIG_DISPLAY_BOARDINFO
  38
  39 /* Clock Defines */
  40 #define V_OSCK                  26000000        /* Clock output from T2 */
  41 #define V_SCLK                  (V_OSCK >> 1)
  42
  43 #define CONFIG_MISC_INIT_R
  44
  45 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  46 #define CONFIG_SETUP_MEMORY_TAGS
  47 #define CONFIG_INITRD_TAG
  48 #define CONFIG_REVISION_TAG
  49
  50 /*
  51  * Size of malloc() pool
  52  */
  53 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  54 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10) + \
  55                                         2 * 1024 * 1024)
  56 /*
  57  * DDR related
  58  */
  59 #define CONFIG_OMAP3_MICRON_DDR         /* Micron DDR */
  60 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  61
  62 /*
  63  * Hardware drivers
  64  */
  65
  66 /*
  67  * NS16550 Configuration
  68  */
  69 #define CONFIG_SYS_NS16550_SERIAL
  70 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  71 #define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
  72
  73 /*
  74  * select serial console configuration
  75  */
  76 #define CONFIG_CONS_INDEX               1
  77 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  78 #define CONFIG_SERIAL1                  /* UART1 */
  79
  80 /* allow to overwrite serial and ethaddr */
  81 #define CONFIG_ENV_OVERWRITE
  82 #define CONFIG_BAUDRATE                 115200
  83 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  84                                         115200}
  85 #define CONFIG_MMC
  86 #define CONFIG_OMAP_HSMMC
  87 #define CONFIG_GENERIC_MMC
  88 #define CONFIG_DOS_PARTITION
  89
  90 /* EHCI */
  91 #define CONFIG_OMAP3_GPIO_5
  92 #define CONFIG_USB_EHCI
  93 #define CONFIG_USB_EHCI_OMAP
  94 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        25
  95 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
  96 #define CONFIG_USB_STORAGE
  97
  98 /* commands to include */
  99 #define CONFIG_CMD_NAND         /* NAND support                 */
 100 #define CONFIG_CMD_EEPROM
 101
 102 #define CONFIG_SYS_NO_FLASH
 103 #define CONFIG_SYS_I2C
 104 #define CONFIG_SYS_OMAP24_I2C_SPEED     400000
 105 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 106 #define CONFIG_SYS_I2C_OMAP34XX
 107 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50            /* base address */
 108 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1               /* bytes of address */
 109 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
 110
 111 /*
 112  * Board NAND Info.
 113  */
 114 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 115                                                         /* to access */
 116                                                         /* nand at CS0 */
 117
 118 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
 119                                                         /* NAND devices */
 120
 121 #define CONFIG_AUTO_COMPLETE
 122
 123 /*
 124  * Miscellaneous configurable options
 125  */
 126 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 127 #define CONFIG_CMDLINE_EDITING
 128 #define CONFIG_AUTO_COMPLETE
 129 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 130
 131 /* Print Buffer Size */
 132 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 133                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 134 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
 135                                                 /* args */
 136 /* Boot Argument Buffer Size */
 137 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 138 /* memtest works on */
 139 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
 140 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 141                                         0x01F00000) /* 31MB */
 142
 143 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
 144                                                                 /* address */
 145
 146 /*
 147  * AM3517 has 12 GP timers, they can be driven by the system clock
 148  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 149  * This rate is divided by a local divisor.
 150  */
 151 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 152 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 153
 154 /*
 155  * Physical Memory Map
 156  */
 157 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 158 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 159 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 160
 161 /*
 162  * FLASH and environment organization
 163  */
 164
 165 /* **** PISMO SUPPORT *** */
 166 #define CONFIG_NAND
 167 #define CONFIG_NAND_OMAP_GPMC
 168 #define CONFIG_ENV_IS_IN_NAND
 169 #define SMNAND_ENV_OFFSET               0x180000 /* environment starts here */
 170
 171 /* Redundant Environment */
 172 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 173 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 174 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 175 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
 176                                                 2 * CONFIG_SYS_ENV_SECT_SIZE)
 177 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 178
 179 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 180 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 181 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 182 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 183                                          CONFIG_SYS_INIT_RAM_SIZE - \
 184                                          GENERATED_GBL_DATA_SIZE)
 185
 186 /*
 187  * ethernet support, EMAC
 188  *
 189  */
 190 #define CONFIG_DRIVER_TI_EMAC
 191 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 192 #define CONFIG_MII
 193 #define CONFIG_EMAC_MDIO_PHY_NUM        0
 194 #define CONFIG_BOOTP_DNS
 195 #define CONFIG_BOOTP_DNS2
 196 #define CONFIG_BOOTP_SEND_HOSTNAME
 197 #define CONFIG_NET_RETRY_COUNT 10
 198
 199 /* Defines for SPL */
 200 #define CONFIG_SPL_FRAMEWORK
 201 #define CONFIG_SPL_BOARD_INIT
 202 #define CONFIG_SPL_CONSOLE
 203 #define CONFIG_SPL_NAND_SIMPLE
 204 #define CONFIG_SPL_NAND_SOFTECC
 205 #define CONFIG_SPL_NAND_WORKSPACE       0x8f07f000 /* below BSS */
 206
 207 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 208 #define CONFIG_SPL_LIBDISK_SUPPORT
 209 #define CONFIG_SPL_I2C_SUPPORT
 210 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 211 #define CONFIG_SPL_SERIAL_SUPPORT
 212 #define CONFIG_SPL_GPIO_SUPPORT
 213 #define CONFIG_SPL_POWER_SUPPORT
 214 #define CONFIG_SPL_NAND_SUPPORT
 215 #define CONFIG_SPL_NAND_BASE
 216 #define CONFIG_SPL_NAND_DRIVERS
 217 #define CONFIG_SPL_NAND_ECC
 218 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 219
 220 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 221 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
 222
 223 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
 224 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 225 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
 226 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 227
 228 /* NAND boot config */
 229 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
 230 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 231 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 232 #define CONFIG_SYS_NAND_OOBSIZE         64
 233 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 234 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 235 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 236 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
 237                                          48, 49, 50, 51, 52, 53, 54, 55,\
 238                                          56, 57, 58, 59, 60, 61, 62, 63}
 239 #define CONFIG_SYS_NAND_ECCSIZE         256
 240 #define CONFIG_SYS_NAND_ECCBYTES        3
 241 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
 242 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
 243
 244 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 245
 246 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 247 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 248
 249 #define CONFIG_CMD_UBI
 250 #define CONFIG_CMD_UBIFS
 251 #define CONFIG_RBTREE
 252 #define CONFIG_LZO
 253 #define CONFIG_MTD_PARTITIONS
 254 #define CONFIG_MTD_DEVICE
 255 #define CONFIG_CMD_MTDPARTS
 256
 257 /* Setup MTD for NAND on the SOM */
 258 #define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
 259 #define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:512k(MLO)," \
 260                                 "1m(u-boot),256k(env1)," \
 261                                 "256k(env2),6m(kernel),-(rootfs)"
 262
 263 #define CONFIG_TAM3517_SETTINGS                                         \
 264         "netdev=eth0\0"                                                 \
 265         "nandargs=setenv bootargs root=${nandroot} "                    \
 266                 "rootfstype=${nandrootfstype}\0"                        \
 267         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 268                 "nfsroot=${serverip}:${rootpath}\0"                     \
 269         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 270         "addip_sta=setenv bootargs ${bootargs} "                        \
 271                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 272                 ":${hostname}:${netdev}:off panic=1\0"                  \
 273         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 274         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 275                 "else run addip_sta;fi\0"                               \
 276         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 277         "addtty=setenv bootargs ${bootargs}"                            \
 278                 " console=ttyO0,${baudrate}\0"                          \
 279         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 280         "loadaddr=82000000\0"                                           \
 281         "kernel_addr_r=82000000\0"                                      \
 282         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
 283         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 284         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 285                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 286         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 287                 "bootm ${kernel_addr}\0"                                \
 288         "nandboot=run nandargs addip addtty addmtd addmisc;"            \
 289                 "nand read ${kernel_addr_r} kernel\0"                   \
 290                 "bootm ${kernel_addr_r}\0"                              \
 291         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 292                 "run nfsargs addip addtty addmtd addmisc;"              \
 293                 "bootm ${kernel_addr_r}\0"                              \
 294         "net_self=if run net_self_load;then "                           \
 295                 "run ramargs addip addtty addmtd addmisc;"              \
 296                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
 297                 "else echo Images not loades;fi\0"                      \
 298         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0"          \
 299         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 300         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
 301         "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0"                    \
 302         "uboot_addr=0x80000\0"                                          \
 303         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
 304                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
 305         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
 306                 "nand write ${loadaddr} 0 20000\0"                      \
 307         "upd=if run load;then echo Updating u-boot;if run update;"      \
 308                 "then echo U-Boot updated;"                             \
 309                         "else echo Error updating u-boot !;"            \
 310                         "echo Board without bootloader !!;"             \
 311                 "fi;"                                                   \
 312                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 313
 314 /*
 315  * this is common code for all TAM3517 boards.
 316  * MAC address is stored from manufacturer in
 317  * I2C EEPROM
 318  */
 319 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 320 /*
 321  * The I2C EEPROM on the TAM3517 contains
 322  * mac address and production data
 323  */
 324 struct tam3517_module_info {
 325         char customer[48];
 326         char product[48];
 327
 328         /*
 329          * bit 0~47  : sequence number
 330          * bit 48~55 : week of year, from 0.
 331          * bit 56~63 : year
 332          */
 333         unsigned long long sequence_number;
 334
 335         /*
 336          * bit 0~7   : revision fixed
 337          * bit 8~15  : revision major
 338          * bit 16~31 : TNxxx
 339          */
 340         unsigned int revision;
 341         unsigned char eth_addr[4][8];
 342         unsigned char _rev[100];
 343 };
 344
 345 #define TAM3517_READ_EEPROM(info, ret) \
 346 do {                                                            \
 347         i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
 348         if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,          \
 349                 (void *)info, sizeof(*info)))                   \
 350                 ret = 1;                                        \
 351         else                                                    \
 352                 ret = 0;                                        \
 353 } while (0)
 354
 355 #define TAM3517_READ_MAC_FROM_EEPROM(info)                      \
 356 do {                                                            \
 357         char buf[80], ethname[20];                              \
 358         int i;                                                  \
 359         memset(buf, 0, sizeof(buf));                            \
 360         for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {   \
 361                 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",   \
 362                         (info)->eth_addr[i][5],                 \
 363                         (info)->eth_addr[i][4],                 \
 364                         (info)->eth_addr[i][3],                 \
 365                         (info)->eth_addr[i][2],                 \
 366                         (info)->eth_addr[i][1],                 \
 367                         (info)->eth_addr[i][0]);                        \
 368                                                                 \
 369                 if (i)                                          \
 370                         sprintf(ethname, "eth%daddr", i);       \
 371                 else                                            \
 372                         strcpy(ethname, "ethaddr");             \
 373                 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
 374                 setenv(ethname, buf);                           \
 375         }                                                       \
 376 } while (0)
 377
 378 /* The following macros are taken from Technexion's documentation */
 379 #define TAM3517_sequence_number(info) \
 380         ((info)->sequence_number % 0x1000000000000LL)
 381 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
 382 #define TAM3517_year(info) ((info)->sequence_number >> 56)
 383 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
 384 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
 385 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
 386
 387 #define TAM3517_PRINT_SOM_INFO(info)                            \
 388 do {                                                            \
 389         printf("Vendor:%s\n", (info)->customer);                \
 390         printf("SOM:   %s\n", (info)->product);                 \
 391         printf("SeqNr: %02llu%02llu%012llu\n",                  \
 392                 TAM3517_year(info),                             \
 393                 TAM3517_week_of_year(info),                     \
 394                 TAM3517_sequence_number(info));                 \
 395         printf("Rev:   TN%u %u.%u\n",                           \
 396                 TAM3517_revision_tn(info),                      \
 397                 TAM3517_revision_major(info),                   \
 398                 TAM3517_revision_fixed(info));                  \
 399 } while (0)
 400
 401 #endif
 402
 403 #endif /* __TAM3517_H */