include/configs/spear-common.h

   1 /*
   2  * (C) Copyright 2009
   3  * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _SPEAR_COMMON_H
   9 #define _SPEAR_COMMON_H
  10 /*
  11  * Common configurations used for both spear3xx as well as spear6xx
  12  */
  13
  14 /* U-Boot Load Address */
  15 #define CONFIG_SYS_TEXT_BASE                    0x00700000
  16
  17 /* Ethernet driver configuration */
  18 #define CONFIG_MII
  19 #define CONFIG_PHY_RESET_DELAY                  10000           /* in usec */
  20
  21 /* USBD driver configuration */
  22 #if defined(CONFIG_SPEAR_USBTTY)
  23 #define CONFIG_DW_UDC
  24 #define CONFIG_USB_DEVICE
  25 #define CONFIG_USBD_HS
  26 #define CONFIG_USB_TTY
  27
  28 #define CONFIG_USBD_PRODUCT_NAME                "SPEAr SoC"
  29 #define CONFIG_USBD_MANUFACTURER                "ST Microelectronics"
  30
  31 #endif
  32
  33 #define CONFIG_EXTRA_ENV_USBTTY                 "usbtty=cdc_acm\0"
  34
  35 /* I2C driver configuration */
  36 #define CONFIG_SYS_I2C
  37 #if defined(CONFIG_SPEAR600)
  38 #define CONFIG_SYS_I2C_BASE                     0xD0200000
  39 #elif defined(CONFIG_SPEAR300)
  40 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  41 #elif defined(CONFIG_SPEAR310)
  42 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  43 #elif defined(CONFIG_SPEAR320)
  44 #define CONFIG_SYS_I2C_BASE                     0xD0180000
  45 #endif
  46 #define CONFIG_SYS_I2C_SPEED                    400000
  47 #define CONFIG_SYS_I2C_SLAVE                    0x02
  48
  49 #define CONFIG_I2C_CHIPADDRESS                  0x50
  50
  51 /* Timer, HZ specific defines */
  52
  53 /* Flash configuration */
  54 #if defined(CONFIG_FLASH_PNOR)
  55 #define CONFIG_SPEAR_EMI
  56 #else
  57 #define CONFIG_ST_SMI
  58 #endif
  59
  60 #if defined(CONFIG_ST_SMI)
  61
  62 #define CONFIG_SYS_MAX_FLASH_BANKS              2
  63 #define CONFIG_SYS_FLASH_BASE                   0xF8000000
  64 #define CONFIG_SYS_CS1_FLASH_BASE               0xF9000000
  65 #define CONFIG_SYS_FLASH_BANK_SIZE              0x01000000
  66 #define CONFIG_SYS_FLASH_ADDR_BASE              {CONFIG_SYS_FLASH_BASE, \
  67                                                 CONFIG_SYS_CS1_FLASH_BASE}
  68 #define CONFIG_SYS_MAX_FLASH_SECT               128
  69
  70 #define CONFIG_SYS_FLASH_ERASE_TOUT             (3 * CONFIG_SYS_HZ)
  71 #define CONFIG_SYS_FLASH_WRITE_TOUT             (3 * CONFIG_SYS_HZ)
  72
  73 #endif
  74
  75 /*
  76  * Serial Configuration (PL011)
  77  * CONFIG_PL01x_PORTS is defined in specific files
  78  */
  79 #define CONFIG_PL011_SERIAL
  80 #define CONFIG_PL011_CLOCK                      (48 * 1000 * 1000)
  81 #define CONFIG_CONS_INDEX                       0
  82 #define CONFIG_SYS_BAUDRATE_TABLE               { 9600, 19200, 38400, \
  83                                                 57600, 115200 }
  84
  85 #define CONFIG_SYS_LOADS_BAUD_CHANGE
  86
  87 /* NAND FLASH Configuration */
  88 #define CONFIG_SYS_NAND_SELF_INIT
  89 #define CONFIG_MTD_DEVICE
  90 #define CONFIG_MTD_PARTITIONS
  91 #define CONFIG_NAND_FSMC
  92 #define CONFIG_SYS_MAX_NAND_DEVICE              1
  93 #define CONFIG_SYS_NAND_ONFI_DETECTION
  94
  95 /*
  96  * Default Environment Varible definitions
  97  */
  98 #define CONFIG_ENV_OVERWRITE
  99
 100 /*
 101  * U-Boot Environment placing definitions.
 102  */
 103 #if defined(CONFIG_ENV_IS_IN_FLASH)
 104 #ifdef CONFIG_ST_SMI
 105 /*
 106  * Environment is in serial NOR flash
 107  */
 108 #define CONFIG_SYS_MONITOR_LEN                  0x00040000
 109 #define CONFIG_ENV_SECT_SIZE                    0x00010000
 110 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
 111
 112 #define CONFIG_BOOTCOMMAND                      "bootm 0xf8050000"
 113
 114 #elif defined(CONFIG_SPEAR_EMI)
 115 /*
 116  * Environment is in parallel NOR flash
 117  */
 118 #define CONFIG_SYS_MONITOR_LEN                  0x00060000
 119 #define CONFIG_ENV_SECT_SIZE                    0x00020000
 120 #define CONFIG_FSMTDBLK                         "/dev/mtdblock3 "
 121
 122 #define CONFIG_BOOTCOMMAND                      "cp.b 0x50080000 0x1600000 " \
 123                                                 "0x4C0000; bootm 0x1600000"
 124 #endif
 125
 126 #define CONFIG_ENV_ADDR                         (CONFIG_SYS_FLASH_BASE + \
 127                                                 CONFIG_SYS_MONITOR_LEN)
 128 #elif defined(CONFIG_ENV_IS_IN_NAND)
 129 /*
 130  * Environment is in NAND
 131  */
 132
 133 #define CONFIG_ENV_OFFSET                       0x60000
 134 #define CONFIG_ENV_RANGE                        0x10000
 135 #define CONFIG_FSMTDBLK                         "/dev/mtdblock7 "
 136
 137 #define CONFIG_BOOTCOMMAND                      "nand read.jffs2 0x1600000 " \
 138                                                 "0x80000 0x4C0000; " \
 139                                                 "bootm 0x1600000"
 140 #endif
 141
 142 #define CONFIG_BOOTARGS                         "console=ttyAMA0,115200 " \
 143                                                 "mem=128M " \
 144                                                 "root="CONFIG_FSMTDBLK \
 145                                                 "rootfstype=jffs2"
 146
 147 #define CONFIG_NFSBOOTCOMMAND                                           \
 148         "bootp; "                                                       \
 149         "setenv bootargs root=/dev/nfs rw "                             \
 150         "nfsroot=$(serverip):$(rootpath) "                              \
 151         "ip=$(ipaddr):$(serverip):$(gatewayip):"                        \
 152                         "$(netmask):$(hostname):$(netdev):off "         \
 153                         "console=ttyAMA0,115200 $(othbootargs);"        \
 154         "bootm; "
 155
 156 #define CONFIG_RAMBOOTCOMMAND                                           \
 157         "setenv bootargs root=/dev/ram rw "                             \
 158                 "console=ttyAMA0,115200 $(othbootargs);"                \
 159         CONFIG_BOOTCOMMAND
 160
 161 #define CONFIG_ENV_SIZE                         0x02000
 162 #define CONFIG_SYS_MONITOR_BASE                 CONFIG_SYS_TEXT_BASE
 163
 164 /* Miscellaneous configurable options */
 165 #define CONFIG_ARCH_CPU_INIT
 166 #define CONFIG_BOOT_PARAMS_ADDR                 0x00000100
 167 #define CONFIG_CMDLINE_TAG
 168 #define CONFIG_SETUP_MEMORY_TAGS
 169 #define CONFIG_MISC_INIT_R
 170
 171 #define CONFIG_SYS_MEMTEST_START                0x00800000
 172 #define CONFIG_SYS_MEMTEST_END                  0x04000000
 173 #define CONFIG_SYS_MALLOC_LEN                   (1024*1024)
 174 #define CONFIG_SYS_LONGHELP
 175 #define CONFIG_CMDLINE_EDITING
 176 #define CONFIG_SYS_CBSIZE                       256
 177 #define CONFIG_SYS_PBSIZE                       (CONFIG_SYS_CBSIZE + \
 178                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
 179 #define CONFIG_SYS_MAXARGS                      16
 180 #define CONFIG_SYS_BARGSIZE                     CONFIG_SYS_CBSIZE
 181 #define CONFIG_SYS_LOAD_ADDR                    0x00800000
 182
 183 #define CONFIG_SYS_FLASH_EMPTY_INFO
 184
 185 /* Physical Memory Map */
 186 #define CONFIG_NR_DRAM_BANKS                    1
 187 #define PHYS_SDRAM_1                            0x00000000
 188 #define PHYS_SDRAM_1_MAXSIZE                    0x40000000
 189
 190 #define CONFIG_SYS_SDRAM_BASE                   PHYS_SDRAM_1
 191 #define CONFIG_SYS_INIT_RAM_ADDR                0xD2800000
 192 #define CONFIG_SYS_INIT_RAM_SIZE                0x2000
 193
 194 #define CONFIG_SYS_INIT_SP_OFFSET               \
 195         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 196
 197 #define CONFIG_SYS_INIT_SP_ADDR                 \
 198         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 199
 200 #endif