include/configs/px30_common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2017 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #ifndef __CONFIG_PX30_COMMON_H
   7 #define __CONFIG_PX30_COMMON_H
   8
   9 #include "rockchip-common.h"
  10
  11 #define CONFIG_SYS_NS16550_MEM32
  12
  13 /* FIXME: ff020000 is pmu_mem (10k), while ff0e0000 is regular int_mem */
  14 #define CONFIG_IRAM_BASE                0xff020000
  15
  16 #define CONFIG_SYS_INIT_SP_ADDR         0x00400000
  17 #define CONFIG_SPL_STACK                0x00400000
  18 #define CONFIG_SPL_BSS_START_ADDR       0x4000000
  19 #define CONFIG_SPL_BSS_MAX_SIZE         0x4000
  20 #define CONFIG_SYS_BOOTM_LEN            (64 << 20)      /* 64M */
  21
  22 #define GICD_BASE                       0xff131000
  23 #define GICC_BASE                       0xff132000
  24
  25 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* 64M */
  26
  27 #define CONFIG_SYS_SDRAM_BASE           0
  28 #define SDRAM_MAX_SIZE                  0xff000000
  29 #define SDRAM_BANK_SIZE                 (2UL << 30)
  30
  31 #ifndef CONFIG_SPL_BUILD
  32
  33 #define ENV_MEM_LAYOUT_SETTINGS \
  34         "scriptaddr=0x00500000\0" \
  35         "pxefile_addr_r=0x00600000\0" \
  36         "fdt_addr_r=0x08300000\0" \
  37         "kernel_addr_r=0x00280000\0" \
  38         "kernel_addr_c=0x03e80000\0" \
  39         "ramdisk_addr_r=0x0a200000\0"
  40
  41 #include <config_distro_bootcmd.h>
  42 #define CONFIG_EXTRA_ENV_SETTINGS \
  43         ENV_MEM_LAYOUT_SETTINGS \
  44         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  45         "partitions=" PARTS_DEFAULT \
  46         ROCKCHIP_DEVICE_SETTINGS \
  47         BOOTENV
  48
  49 #endif
  50
  51 #endif