1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) Stefano Babic <sbabic@denx.de>
7 #ifndef __PCM058_CONFIG_H
8 #define __PCM058_CONFIG_H
11 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x10000
15 #include "mx6_common.h"
18 #define CONFIG_IMX_THERMAL
21 #define CONFIG_MXC_UART
22 #define CONFIG_MXC_UART_BASE UART2_BASE
23 #define CONSOLE_DEV "ttymxc1"
25 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
30 /* Size of malloc() pool */
31 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M)
34 #define CONFIG_FEC_MXC
35 #define IMX_FEC_BASE ENET_BASE_ADDR
36 #define CONFIG_FEC_XCV_TYPE RGMII
37 #define CONFIG_ETHPRIME "FEC"
38 #define CONFIG_FEC_MXC_PHYADDR 3
43 #define CONFIG_SYS_I2C
44 #define CONFIG_SYS_I2C_MXC
45 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */
46 #define CONFIG_SYS_I2C_SPEED 100000
48 #ifndef CONFIG_SPL_BUILD
49 /* Enable NAND support */
50 #define CONFIG_SYS_MAX_NAND_DEVICE 1
51 #define CONFIG_SYS_NAND_BASE 0x40000000
52 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
53 #define CONFIG_SYS_NAND_ONFI_DETECTION
56 /* DMA stuff, needed for GPMI/MXS NAND support */
58 /* Filesystem support */
60 /* Physical Memory Map */
61 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
63 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
64 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
65 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
67 #define CONFIG_SYS_INIT_SP_OFFSET \
68 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
69 #define CONFIG_SYS_INIT_SP_ADDR \
70 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
73 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
74 #define CONFIG_SYS_FSL_USDHC_NUM 1
76 /* Environment organization */
77 #define CONFIG_ENV_SIZE (16 * 1024)
78 #define CONFIG_ENV_OFFSET (1024 * SZ_1K)
79 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
80 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
81 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
83 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
85 #ifdef CONFIG_ENV_IS_IN_NAND
86 #define CONFIG_ENV_OFFSET (0x1E0000)
87 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)