include/configs/pcm052.h

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Configuration settings for the phytec PCM-052 SoM.
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include <asm/arch/imx-regs.h>
  13
  14 #define CONFIG_VF610
  15
  16 #define CONFIG_DISPLAY_BOARDINFO
  17 #define CONFIG_SYS_THUMB_BUILD
  18
  19 #define CONFIG_SKIP_LOWLEVEL_INIT
  20
  21 /* Enable passing of ATAGs */
  22 #define CONFIG_CMDLINE_TAG
  23
  24 /* Size of malloc() pool */
  25 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  26
  27 #define CONFIG_BOARD_EARLY_INIT_F
  28
  29 /* Allow to overwrite serial and ethaddr */
  30 #define CONFIG_ENV_OVERWRITE
  31 #define CONFIG_BAUDRATE                 115200
  32
  33 /* NAND support */
  34 #define CONFIG_CMD_NAND
  35 #define CONFIG_CMD_NAND_TRIMFFS
  36 #define CONFIG_SYS_NAND_ONFI_DETECTION
  37
  38 #ifdef CONFIG_CMD_NAND
  39 #define CONFIG_USE_ARCH_MEMCPY
  40 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  41 #define CONFIG_SYS_NAND_BASE            NFC_BASE_ADDR
  42
  43 #define CONFIG_JFFS2_NAND
  44
  45 /* UBI */
  46 #define CONFIG_CMD_UBIFS
  47 #define CONFIG_RBTREE
  48 #define CONFIG_LZO
  49
  50 /* Dynamic MTD partition support */
  51 #define CONFIG_CMD_MTDPARTS
  52 #define CONFIG_MTD_PARTITIONS
  53 #define CONFIG_MTD_DEVICE
  54
  55 #ifndef MTDIDS_DEFAULT
  56 #define MTDIDS_DEFAULT                  "nand0=NAND"
  57 #endif
  58
  59 #ifndef MTDPARTS_DEFAULT
  60 #define MTDPARTS_DEFAULT                "mtdparts=NAND:640k(bootloader)"\
  61                                         ",128k(env1)"\
  62                                         ",128k(env2)"\
  63                                         ",128k(dtb)"\
  64                                         ",6144k(kernel)"\
  65                                         ",-(root)"
  66 #endif
  67
  68 #endif
  69
  70 #define CONFIG_MMC
  71 #define CONFIG_FSL_ESDHC
  72 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
  73 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  74
  75 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
  76 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135
  77 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
  78 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
  79
  80 #define CONFIG_GENERIC_MMC
  81 #define CONFIG_DOS_PARTITION
  82
  83 #define CONFIG_FEC_MXC
  84 #define CONFIG_MII
  85 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  86 #define CONFIG_FEC_XCV_TYPE             RMII
  87 #define CONFIG_FEC_MXC_PHYADDR          0
  88 #define CONFIG_PHYLIB
  89 #define CONFIG_PHY_MICREL
  90
  91 /* QSPI Configs*/
  92
  93 #ifdef CONFIG_FSL_QSPI
  94 #define FSL_QSPI_FLASH_SIZE             (1 << 24)
  95 #define FSL_QSPI_FLASH_NUM              2
  96 #define CONFIG_SYS_FSL_QSPI_LE
  97 #endif
  98
  99 /* I2C Configs */
 100 #define CONFIG_SYS_I2C
 101 #define CONFIG_SYS_I2C_MXC_I2C3
 102 #define CONFIG_SYS_I2C_MXC
 103
 104 /* RTC (actually an RV-4162 but M41T62-compatible) */
 105 #define CONFIG_CMD_DATE
 106 #define CONFIG_RTC_M41T62
 107 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 108 #define CONFIG_SYS_RTC_BUS_NUM 2
 109
 110 /* EEPROM (24FC256) */
 111 #define CONFIG_CMD_EEPROM
 112 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
 113 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
 114 #define CONFIG_SYS_I2C_EEPROM_BUS 2
 115
 116
 117 #define CONFIG_LOADADDR                 0x82000000
 118
 119 /* We boot from the gfxRAM area of the OCRAM. */
 120 #define CONFIG_SYS_TEXT_BASE            0x3f408000
 121 #define CONFIG_BOARD_SIZE_LIMIT         524288
 122
 123 /* if no target-specific extra environment settings were defined by the
 124    target, define an empty one */
 125 #ifndef PCM052_EXTRA_ENV_SETTINGS
 126 #define PCM052_EXTRA_ENV_SETTINGS
 127 #endif
 128
 129 /* if no target-specific boot command was defined by the target,
 130    define an empty one */
 131 #ifndef PCM052_BOOTCOMMAND
 132 #define PCM052_BOOTCOMMAND
 133 #endif
 134
 135 /* if no target-specific extra environment settings were defined by the
 136    target, define an empty one */
 137 #ifndef PCM052_NET_INIT
 138 #define PCM052_NET_INIT
 139 #endif
 140
 141 /* boot command, including the target-defined one if any */
 142 #define CONFIG_BOOTCOMMAND      PCM052_BOOTCOMMAND "run bootcmd_nand"
 143
 144 /* Extra env settings (including the target-defined ones if any) */
 145 #define CONFIG_EXTRA_ENV_SETTINGS \
 146         PCM052_EXTRA_ENV_SETTINGS \
 147         "autoload=no\0" \
 148         "fdt_high=0xffffffff\0" \
 149         "initrd_high=0xffffffff\0" \
 150         "blimg_file=u-boot.vyb\0" \
 151         "blimg_addr=0x81000000\0" \
 152         "kernel_file=zImage\0" \
 153         "kernel_addr=0x82000000\0" \
 154         "fdt_file=zImage.dtb\0" \
 155         "fdt_addr=0x81000000\0" \
 156         "ram_file=uRamdisk\0" \
 157         "ram_addr=0x83000000\0" \
 158         "filesys=rootfs.ubifs\0" \
 159         "sys_addr=0x81000000\0" \
 160         "tftploc=/path/to/tftp/directory/\0" \
 161         "nfs_root=/path/to/nfs/root\0" \
 162         "tftptimeout=1000\0" \
 163         "tftptimeoutcountmax=1000000\0" \
 164         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 165         "bootargs_base=setenv bootargs rw " \
 166                 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
 167                 "console=ttyLP1,115200n8\0" \
 168         "bootargs_sd=setenv bootargs ${bootargs} " \
 169                 "root=/dev/mmcblk0p2 rootwait\0" \
 170         "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
 171                 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
 172         "bootargs_nand=setenv bootargs ${bootargs} " \
 173                 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
 174         "bootargs_ram=setenv bootargs ${bootargs} " \
 175                 "root=/dev/ram rw initrd=${ram_addr}\0" \
 176         "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
 177         "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
 178                 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
 179                 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
 180                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 181         "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
 182                 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
 183                 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
 184                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 185         "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
 186                 "nand read ${fdt_addr} dtb; " \
 187                 "nand read ${kernel_addr} kernel; " \
 188                 "bootz ${kernel_addr} - ${fdt_addr}\0" \
 189         "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
 190                 "nand read ${fdt_addr} dtb; " \
 191                 "nand read ${kernel_addr} kernel; " \
 192                 "nand read ${ram_addr} root; " \
 193                 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
 194         "update_bootloader_from_tftp=" PCM052_NET_INIT \
 195                 "if tftp ${blimg_addr} "\
 196                 "${tftpdir}${blimg_file}; then " \
 197                 "mtdparts default; " \
 198                 "nand erase.part bootloader; " \
 199                 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
 200         "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
 201                 "${kernel_file}; " \
 202                 "then mtdparts default; " \
 203                 "nand erase.part kernel; " \
 204                 "nand write ${kernel_addr} kernel ${filesize}; " \
 205                 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
 206                 "nand erase.part dtb; " \
 207                 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
 208         "update_kernel_from_tftp=" PCM052_NET_INIT \
 209                 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
 210                 "then setenv fdtsize ${filesize}; " \
 211                 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
 212                 "mtdparts default; " \
 213                 "nand erase.part dtb; " \
 214                 "nand write ${fdt_addr} dtb ${fdtsize}; " \
 215                 "nand erase.part kernel; " \
 216                 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
 217         "update_rootfs_from_tftp=" PCM052_NET_INIT \
 218                 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \
 219                 "then mtdparts default; " \
 220                 "nand erase.part root; " \
 221                 "ubi part root; " \
 222                 "ubi create rootfs; " \
 223                 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
 224         "update_ramdisk_from_tftp=" PCM052_NET_INIT \
 225                 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
 226                 "then mtdparts default; " \
 227                 "nand erase.part root; " \
 228                 "nand write ${ram_addr} root ${filesize}; fi\0"
 229
 230 /* Miscellaneous configurable options */
 231 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 232 #define CONFIG_AUTO_COMPLETE
 233 #define CONFIG_CMDLINE_EDITING
 234 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 235 #define CONFIG_SYS_PBSIZE               \
 236                         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 237 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 238 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 239
 240 #define CONFIG_SYS_MEMTEST_START        0x80010000
 241 #define CONFIG_SYS_MEMTEST_END          0x87C00000
 242
 243 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 244
 245 /*
 246  * Stack sizes
 247  * The stack sizes are set up in start.S using the settings below
 248  */
 249 #define CONFIG_STACKSIZE                (128 * 1024)    /* regular stack */
 250
 251 /* Physical memory map */
 252 #define CONFIG_NR_DRAM_BANKS            1
 253 #define PHYS_SDRAM                      (0x80000000)
 254 #define PHYS_SDRAM_SIZE                 (CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
 255
 256 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 257 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 258 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 259
 260 #define CONFIG_SYS_INIT_SP_OFFSET \
 261         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 262 #define CONFIG_SYS_INIT_SP_ADDR \
 263         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 264
 265 /* FLASH and environment organization */
 266 #define CONFIG_SYS_NO_FLASH
 267
 268 #ifdef CONFIG_ENV_IS_IN_MMC
 269 #define CONFIG_ENV_SIZE                 (8 * 1024)
 270
 271 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
 272 #define CONFIG_SYS_MMC_ENV_DEV          0
 273 #endif
 274
 275 #ifdef CONFIG_ENV_IS_IN_NAND
 276 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
 277 #define CONFIG_ENV_SIZE                 (8 * 1024)
 278 #define CONFIG_ENV_OFFSET               0xA0000
 279 #define CONFIG_ENV_SIZE_REDUND          (8 * 1024)
 280 #define CONFIG_ENV_OFFSET_REDUND        0xC0000
 281 #endif
 282
 283 #endif