8ed5602bc9ca4591bfe5403f9aa421af91ced079
[platform/kernel/u-boot.git] / include / configs / omap3_evm.h
1 /*
2  * Configuration settings for the TI OMAP3 EVM board.
3  *
4  * Copyright (C) 2006-2011 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * Author :
7  *      Manikandan Pillai <mani.pillai@ti.com>
8  * Derived from Beagle Board and 3430 SDP code by
9  *      Richard Woodruff <r-woodruff2@ti.com>
10  *      Syed Mohammed Khasim <khasim@ti.com>
11  *
12  * Manikandan Pillai <mani.pillai@ti.com>
13  *
14  * SPDX-License-Identifier:     GPL-2.0+
15  */
16
17 #ifndef __OMAP3EVM_CONFIG_H
18 #define __OMAP3EVM_CONFIG_H
19
20 #include <asm/arch/cpu.h>
21 #include <asm/arch/omap.h>
22
23 /* ----------------------------------------------------------------------------
24  * Supported U-Boot commands
25  * ----------------------------------------------------------------------------
26  */
27
28 #define CONFIG_CMD_JFFS2
29
30 #define CONFIG_CMD_NAND
31
32 /* ----------------------------------------------------------------------------
33  * Supported U-Boot features
34  * ----------------------------------------------------------------------------
35  */
36 #define CONFIG_SYS_LONGHELP
37
38 /* Allow to overwrite serial and ethaddr */
39 #define CONFIG_ENV_OVERWRITE
40
41 /* Add auto-completion support */
42 #define CONFIG_AUTO_COMPLETE
43
44 /* ----------------------------------------------------------------------------
45  * Supported hardware
46  * ----------------------------------------------------------------------------
47  */
48
49 /* SPL */
50 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
51 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
52
53 /* Partition tables */
54
55 /* USB
56  *
57  * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
58  * Enable CONFIG_USB_MUSB_UDD for Device functionalities.
59  */
60 #define CONFIG_USB_OMAP3
61 #define CONFIG_USB_MUSB_HCD
62 /* #define CONFIG_USB_MUSB_UDC */
63
64 /* NAND SPL */
65 #define CONFIG_SPL_NAND_SIMPLE
66 #define CONFIG_SPL_NAND_BASE
67 #define CONFIG_SPL_NAND_DRIVERS
68 #define CONFIG_SPL_NAND_ECC
69 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
70 #define CONFIG_SYS_NAND_PAGE_COUNT      64
71 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
72 #define CONFIG_SYS_NAND_OOBSIZE         64
73 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
74 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
75 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
76                                                 10, 11, 12, 13}
77 #define CONFIG_SYS_NAND_ECCSIZE         512
78 #define CONFIG_SYS_NAND_ECCBYTES        3
79 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
80 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
81 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
82
83 /*
84  * High level configuration options
85  */
86 #define CONFIG_OMAP                     /* This is TI OMAP core */
87 #define CONFIG_OMAP_GPIO
88 /* Common ARM Erratas */
89 #define CONFIG_ARM_ERRATA_454179
90 #define CONFIG_ARM_ERRATA_430973
91 #define CONFIG_ARM_ERRATA_621766
92
93 #define CONFIG_SDRC                     /* The chip has SDRC controller */
94
95 #define CONFIG_OMAP3_EVM                /* This is a OMAP3 EVM */
96 #define CONFIG_TWL4030_POWER            /* with TWL4030 PMIC */
97
98 /*
99  * Clock related definitions
100  */
101 #define V_OSCK                  26000000        /* Clock output from T2 */
102 #define V_SCLK                  (V_OSCK >> 1)
103
104 /*
105  * OMAP3 has 12 GP timers, they can be driven by the system clock
106  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
107  * This rate is divided by a local divisor.
108  */
109 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
110 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
111
112 /* Size of environment - 128KB */
113 #define CONFIG_ENV_SIZE                 (128 << 10)
114
115 /* Size of malloc pool */
116 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
117
118 /*
119  * Physical Memory Map
120  * Note 1: CS1 may or may not be populated
121  * Note 2: SDRAM size is expected to be at least 32MB
122  */
123 #define CONFIG_NR_DRAM_BANKS            2
124 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
125 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
126
127 /* Limits for memtest */
128 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
129 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
130                                                 0x01F00000) /* 31MB */
131
132 /* Default load address */
133 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)
134
135 /* -----------------------------------------------------------------------------
136  * Hardware drivers
137  * -----------------------------------------------------------------------------
138  */
139
140 /*
141  * NS16550 Configuration
142  */
143 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
144
145 #define CONFIG_SYS_NS16550_SERIAL
146 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
147 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
148
149 /*
150  * select serial console configuration
151  */
152 #define CONFIG_CONS_INDEX               1
153 #define CONFIG_SERIAL1                  1       /* UART1 on OMAP3 EVM */
154 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
155 #define CONFIG_BAUDRATE                 115200
156 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
157                                         115200}
158
159 /*
160  * I2C
161  */
162 #define CONFIG_SYS_I2C
163 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
164 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
165 #define CONFIG_SYS_I2C_OMAP34XX
166
167 /*
168  * PISMO support
169  */
170 /* Monitor at start of flash - Reserve 2 sectors */
171 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
172
173 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
174
175 /* Start location & size of environment */
176 #define ONENAND_ENV_OFFSET              0x260000
177 #define SMNAND_ENV_OFFSET               0x260000
178
179 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
180
181 /*
182  * NAND
183  */
184 /* Physical address to access NAND */
185 #define CONFIG_SYS_NAND_ADDR            NAND_BASE
186
187 /* Physical address to access NAND at CS0 */
188 #define CONFIG_SYS_NAND_BASE            NAND_BASE
189
190 /* Max number of NAND devices */
191 #define CONFIG_SYS_MAX_NAND_DEVICE      1
192 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
193 /* Timeout values (in ticks) */
194 #define CONFIG_SYS_FLASH_ERASE_TOUT     (100 * CONFIG_SYS_HZ)
195 #define CONFIG_SYS_FLASH_WRITE_TOUT     (100 * CONFIG_SYS_HZ)
196
197 /* Flash banks JFFS2 should use */
198 #define CONFIG_SYS_MAX_MTD_BANKS        (CONFIG_SYS_MAX_FLASH_BANKS + \
199                                                 CONFIG_SYS_MAX_NAND_DEVICE)
200
201 #define CONFIG_SYS_JFFS2_MEM_NAND
202 #define CONFIG_SYS_JFFS2_FIRST_BANK     CONFIG_SYS_MAX_FLASH_BANKS
203 #define CONFIG_SYS_JFFS2_NUM_BANKS      1
204
205 #define CONFIG_JFFS2_NAND
206 /* nand device jffs2 lives on */
207 #define CONFIG_JFFS2_DEV                "nand0"
208 /* Start of jffs2 partition */
209 #define CONFIG_JFFS2_PART_OFFSET        0x680000
210 /* Size of jffs2 partition */
211 #define CONFIG_JFFS2_PART_SIZE          0xf980000
212
213 /*
214  * USB
215  */
216 #ifdef CONFIG_USB_OMAP3
217
218 #ifdef CONFIG_USB_MUSB_HCD
219
220 #ifdef CONFIG_USB_KEYBOARD
221 #define CONFIG_SYS_USB_EVENT_POLL
222 #define CONFIG_PREBOOT                  "usb start"
223 #endif /* CONFIG_USB_KEYBOARD */
224
225 #endif /* CONFIG_USB_MUSB_HCD */
226
227 #ifdef CONFIG_USB_MUSB_UDC
228 /* USB device configuration */
229 #define CONFIG_USB_DEVICE
230 #define CONFIG_USB_TTY
231
232 /* Change these to suit your needs */
233 #define CONFIG_USBD_VENDORID            0x0451
234 #define CONFIG_USBD_PRODUCTID           0x5678
235 #define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
236 #define CONFIG_USBD_PRODUCT_NAME        "EVM"
237 #endif /* CONFIG_USB_MUSB_UDC */
238
239 #endif /* CONFIG_USB_OMAP3 */
240
241 /* ----------------------------------------------------------------------------
242  * U-Boot features
243  * ----------------------------------------------------------------------------
244  */
245 #define CONFIG_SYS_MAXARGS              16      /* max args for a command */
246
247 #define CONFIG_MISC_INIT_R
248
249 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
250 #define CONFIG_SETUP_MEMORY_TAGS
251 #define CONFIG_INITRD_TAG
252 #define CONFIG_REVISION_TAG
253
254 /* Size of Console IO buffer */
255 #define CONFIG_SYS_CBSIZE               512
256
257 /* Size of print buffer */
258 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
259                                                 sizeof(CONFIG_SYS_PROMPT) + 16)
260
261 /* Size of bootarg buffer */
262 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
263
264 #define CONFIG_BOOTFILE                 "uImage"
265
266 /*
267  * NAND / OneNAND
268  */
269 #if defined(CONFIG_CMD_NAND)
270 #define CONFIG_SYS_FLASH_BASE           NAND_BASE
271
272 #define CONFIG_NAND_OMAP_GPMC
273 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
274 #elif defined(CONFIG_CMD_ONENAND)
275 #define CONFIG_SYS_FLASH_BASE           ONENAND_MAP
276 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
277 #endif
278
279 #if !defined(CONFIG_ENV_IS_NOWHERE)
280 #if defined(CONFIG_CMD_NAND)
281 #define CONFIG_ENV_IS_IN_NAND
282 #elif defined(CONFIG_CMD_ONENAND)
283 #define CONFIG_ENV_IS_IN_ONENAND
284 #define CONFIG_ENV_OFFSET               ONENAND_ENV_OFFSET
285 #endif
286 #endif /* CONFIG_ENV_IS_NOWHERE */
287
288 #define CONFIG_ENV_ADDR                 CONFIG_ENV_OFFSET
289
290 #if defined(CONFIG_CMD_NET)
291
292 /* Ethernet (SMSC9115 from SMSC9118 family) */
293 #define CONFIG_SMC911X
294 #define CONFIG_SMC911X_32_BIT
295 #define CONFIG_SMC911X_BASE             0x2C000000
296
297 /* BOOTP fields */
298 #define CONFIG_BOOTP_SUBNETMASK         0x00000001
299 #define CONFIG_BOOTP_GATEWAY            0x00000002
300 #define CONFIG_BOOTP_HOSTNAME           0x00000004
301 #define CONFIG_BOOTP_BOOTPATH           0x00000010
302
303 #endif /* CONFIG_CMD_NET */
304
305 /* Support for relocation */
306 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
307 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
308 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
309 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
310                                          CONFIG_SYS_INIT_RAM_SIZE - \
311                                          GENERATED_GBL_DATA_SIZE)
312
313 /* -----------------------------------------------------------------------------
314  * Board specific
315  * -----------------------------------------------------------------------------
316  */
317 #define CONFIG_SYS_NO_FLASH
318
319 /* Uncomment to define the board revision statically */
320 /* #define CONFIG_STATIC_BOARD_REV      OMAP3EVM_BOARD_GEN_2 */
321
322 /* Defines for SPL */
323 #define CONFIG_SPL_FRAMEWORK
324 #define CONFIG_SPL_TEXT_BASE            0x40200800
325 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
326                                          CONFIG_SPL_TEXT_BASE)
327
328 #define CONFIG_SPL_BSS_START_ADDR       0x80000000
329 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
330
331 #define CONFIG_SPL_BOARD_INIT
332 #define CONFIG_SPL_OMAP3_ID_NAND
333 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
334
335 /*
336  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
337  * 64 bytes before this address should be set aside for u-boot.img's
338  * header. That is 0x800FFFC0--0x80100000 should not be used for any
339  * other needs.
340  */
341 #define CONFIG_SYS_TEXT_BASE            0x80100000
342 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
343 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
344
345 /* -----------------------------------------------------------------------------
346  * Default environment
347  * -----------------------------------------------------------------------------
348  */
349
350 #define CONFIG_EXTRA_ENV_SETTINGS \
351         "loadaddr=0x82000000\0" \
352         "usbtty=cdc_acm\0" \
353         "mmcdev=0\0" \
354         "console=ttyO0,115200n8\0" \
355         "mmcargs=setenv bootargs console=${console} " \
356                 "root=/dev/mmcblk0p2 rw " \
357                 "rootfstype=ext3 rootwait\0" \
358         "nandargs=setenv bootargs console=${console} " \
359                 "root=/dev/mtdblock4 rw " \
360                 "rootfstype=jffs2\0" \
361         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
362         "bootscript=echo Running bootscript from mmc ...; " \
363                 "source ${loadaddr}\0" \
364         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
365         "mmcboot=echo Booting from mmc ...; " \
366                 "run mmcargs; " \
367                 "bootm ${loadaddr}\0" \
368         "nandboot=echo Booting from nand ...; " \
369                 "run nandargs; " \
370                 "onenand read ${loadaddr} 280000 400000; " \
371                 "bootm ${loadaddr}\0" \
372
373 #define CONFIG_BOOTCOMMAND \
374         "mmc dev ${mmcdev}; if mmc rescan; then " \
375                 "if run loadbootscript; then " \
376                         "run bootscript; " \
377                 "else " \
378                         "if run loaduimage; then " \
379                                 "run mmcboot; " \
380                         "else run nandboot; " \
381                         "fi; " \
382                 "fi; " \
383         "else run nandboot; fi"
384
385 #endif /* __OMAP3EVM_CONFIG_H */