include/configs/omap3_beagle.h

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Syed Mohammed Khasim <x0khasim@ti.com>
   6  *
   7  * Configuration settings for the TI OMAP3530 Beagle board.
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /*
  32  * High Level Configuration Options
  33  */
  34 #define CONFIG_ARMV7            1       /* This is an ARM V7 CPU core */
  35 #define CONFIG_OMAP             1       /* in a TI OMAP core */
  36 #define CONFIG_OMAP34XX         1       /* which is a 34XX */
  37 #define CONFIG_OMAP3430         1       /* which is in a 3430 */
  38 #define CONFIG_OMAP3_BEAGLE     1       /* working with BEAGLE */
  39
  40 #define CONFIG_SDRC     /* The chip has SDRC controller */
  41
  42 #include <asm/arch/cpu.h>               /* get chip and board defs */
  43 #include <asm/arch/omap3.h>
  44
  45 /*
  46  * Display CPU and Board information
  47  */
  48 #define CONFIG_DISPLAY_CPUINFO          1
  49 #define CONFIG_DISPLAY_BOARDINFO        1
  50
  51 /* Clock Defines */
  52 #define V_OSCK                  26000000        /* Clock output from T2 */
  53 #define V_SCLK                  (V_OSCK >> 1)
  54
  55 #undef CONFIG_USE_IRQ                           /* no support for IRQs */
  56 #define CONFIG_MISC_INIT_R
  57
  58 #define CONFIG_OF_LIBFDT                1
  59
  60 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  61 #define CONFIG_SETUP_MEMORY_TAGS        1
  62 #define CONFIG_INITRD_TAG               1
  63 #define CONFIG_REVISION_TAG             1
  64
  65 /*
  66  * Size of malloc() pool
  67  */
  68 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  69                                                 /* Sector */
  70 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
  71                                                 /* initial data */
  72
  73 /*
  74  * Hardware drivers
  75  */
  76
  77 /*
  78  * NS16550 Configuration
  79  */
  80 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  81
  82 #define CONFIG_SYS_NS16550
  83 #define CONFIG_SYS_NS16550_SERIAL
  84 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  85 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  86
  87 /*
  88  * select serial console configuration
  89  */
  90 #define CONFIG_CONS_INDEX               3
  91 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  92 #define CONFIG_SERIAL3                  3       /* UART3 on Beagle Rev 2 */
  93
  94 /* allow to overwrite serial and ethaddr */
  95 #define CONFIG_ENV_OVERWRITE
  96 #define CONFIG_BAUDRATE                 115200
  97 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  98                                         115200}
  99 #define CONFIG_GENERIC_MMC              1
 100 #define CONFIG_MMC                      1
 101 #define CONFIG_OMAP_HSMMC               1
 102 #define CONFIG_DOS_PARTITION            1
 103
 104 /* Status LED */
 105 #define CONFIG_STATUS_LED               1
 106 #define CONFIG_BOARD_SPECIFIC_LED       1
 107 #define STATUS_LED_BIT                  0x01
 108 #define STATUS_LED_STATE                STATUS_LED_ON
 109 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
 110 #define STATUS_LED_BIT1                 0x02
 111 #define STATUS_LED_STATE1               STATUS_LED_ON
 112 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
 113 #define STATUS_LED_BOOT                 STATUS_LED_BIT
 114 #define STATUS_LED_GREEN                STATUS_LED_BIT1
 115
 116 /* DDR - I use Micron DDR */
 117 #define CONFIG_OMAP3_MICRON_DDR         1
 118
 119 /* USB */
 120 #define CONFIG_MUSB_UDC                 1
 121 #define CONFIG_USB_OMAP3                1
 122 #define CONFIG_TWL4030_USB              1
 123
 124 /* USB device configuration */
 125 #define CONFIG_USB_DEVICE               1
 126 #define CONFIG_USB_TTY                  1
 127 #define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
 128
 129 /* USB EHCI */
 130 #define CONFIG_CMD_USB
 131 #define CONFIG_USB_EHCI
 132 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
 133
 134 /* commands to include */
 135 #include <config_cmd_default.h>
 136
 137 #define CONFIG_CMD_CACHE
 138 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 139 #define CONFIG_CMD_FAT          /* FAT support                  */
 140 #define CONFIG_CMD_JFFS2        /* JFFS2 Support                */
 141 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
 142 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 143 #define MTDIDS_DEFAULT                  "nand0=nand"
 144 #define MTDPARTS_DEFAULT                "mtdparts=nand:512k(x-loader),"\
 145                                         "1920k(u-boot),128k(u-boot-env),"\
 146                                         "4m(kernel),-(fs)"
 147
 148 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
 149 #define CONFIG_CMD_MMC          /* MMC support                  */
 150 #define CONFIG_USB_STORAGE      /* USB storage support          */
 151 #define CONFIG_CMD_NAND         /* NAND support                 */
 152 #define CONFIG_CMD_LED          /* LED support                  */
 153
 154 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 155 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 156 #undef CONFIG_CMD_IMI           /* iminfo                       */
 157 #undef CONFIG_CMD_IMLS          /* List all found images        */
 158 #undef CONFIG_CMD_NET           /* bootp, tftpboot, rarpboot    */
 159 #undef CONFIG_CMD_NFS           /* NFS support                  */
 160
 161 #define CONFIG_SYS_NO_FLASH
 162 #define CONFIG_HARD_I2C                 1
 163 #define CONFIG_SYS_I2C_SPEED            100000
 164 #define CONFIG_SYS_I2C_SLAVE            1
 165 #define CONFIG_SYS_I2C_BUS              0
 166 #define CONFIG_SYS_I2C_BUS_SELECT       1
 167 #define CONFIG_I2C_MULTI_BUS            1
 168 #define CONFIG_DRIVER_OMAP34XX_I2C      1
 169
 170 /*
 171  * TWL4030
 172  */
 173 #define CONFIG_TWL4030_POWER            1
 174 #define CONFIG_TWL4030_LED              1
 175
 176 /*
 177  * Board NAND Info.
 178  */
 179 #define CONFIG_SYS_NAND_QUIET_TEST      1
 180 #define CONFIG_NAND_OMAP_GPMC
 181 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 182                                                         /* to access nand */
 183 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 184                                                         /* to access nand at */
 185                                                         /* CS0 */
 186 #define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 187
 188 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 189                                                         /* devices */
 190 #define CONFIG_JFFS2_NAND
 191 /* nand device jffs2 lives on */
 192 #define CONFIG_JFFS2_DEV                "nand0"
 193 /* start of jffs2 partition */
 194 #define CONFIG_JFFS2_PART_OFFSET        0x680000
 195 #define CONFIG_JFFS2_PART_SIZE          0xf980000       /* size of jffs2 */
 196                                                         /* partition */
 197
 198 /* Environment information */
 199 #define CONFIG_BOOTDELAY                10
 200
 201 #define CONFIG_EXTRA_ENV_SETTINGS \
 202         "loadaddr=0x82000000\0" \
 203         "usbtty=cdc_acm\0" \
 204         "console=ttyS2,115200n8\0" \
 205         "mpurate=auto\0" \
 206         "vram=12M\0" \
 207         "dvimode=1024x768MR-16@60\0" \
 208         "defaultdisplay=dvi\0" \
 209         "mmcdev=0\0" \
 210         "mmcroot=/dev/mmcblk0p2 rw\0" \
 211         "mmcrootfstype=ext3 rootwait\0" \
 212         "nandroot=/dev/mtdblock4 rw\0" \
 213         "nandrootfstype=jffs2\0" \
 214         "mmcargs=setenv bootargs console=${console} " \
 215                 "mpurate=${mpurate} " \
 216                 "vram=${vram} " \
 217                 "omapfb.mode=dvi:${dvimode} " \
 218                 "omapfb.debug=y " \
 219                 "omapdss.def_disp=${defaultdisplay} " \
 220                 "root=${mmcroot} " \
 221                 "rootfstype=${mmcrootfstype}\0" \
 222         "nandargs=setenv bootargs console=${console} " \
 223                 "mpurate=${mpurate} " \
 224                 "vram=${vram} " \
 225                 "omapfb.mode=dvi:${dvimode} " \
 226                 "omapfb.debug=y " \
 227                 "omapdss.def_disp=${defaultdisplay} " \
 228                 "root=${nandroot} " \
 229                 "rootfstype=${nandrootfstype}\0" \
 230         "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
 231         "importbootenv=echo Importing environment from mmc ...; " \
 232                 "env import -t $loadaddr $filesize\0" \
 233         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 234         "mmcboot=echo Booting from mmc ...; " \
 235                 "run mmcargs; " \
 236                 "bootm ${loadaddr}\0" \
 237         "nandboot=echo Booting from nand ...; " \
 238                 "run nandargs; " \
 239                 "nand read ${loadaddr} 280000 400000; " \
 240                 "bootm ${loadaddr}\0" \
 241
 242 #define CONFIG_BOOTCOMMAND \
 243         "if mmc rescan ${mmcdev}; then " \
 244                 "echo SD/MMC found on device ${mmcdev};" \
 245                 "if run loadbootenv; then " \
 246                         "run importbootenv;" \
 247                 "fi;" \
 248                 "if test -n $uenvcmd; then " \
 249                         "echo Running uenvcmd ...;" \
 250                         "run uenvcmd;" \
 251                 "fi;" \
 252                 "if run loaduimage; then " \
 253                         "run mmcboot;" \
 254                 "fi;" \
 255         "fi;" \
 256         "run nandboot;" \
 257
 258 #define CONFIG_AUTO_COMPLETE            1
 259 /*
 260  * Miscellaneous configurable options
 261  */
 262 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 263 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 264 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 265 #define CONFIG_SYS_PROMPT               "OMAP3 beagleboard.org # "
 266 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 267 /* Print Buffer Size */
 268 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 269                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 270 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 271 /* Boot Argument Buffer Size */
 272 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 273
 274 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 275                                                                 /* works on */
 276 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 277                                         0x01F00000) /* 31MB */
 278
 279 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 280                                                         /* load address */
 281
 282 /*
 283  * OMAP3 has 12 GP timers, they can be driven by the system clock
 284  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 285  * This rate is divided by a local divisor.
 286  */
 287 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 288 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 289 #define CONFIG_SYS_HZ                   1000
 290
 291 /*-----------------------------------------------------------------------
 292  * Stack sizes
 293  *
 294  * The stack sizes are set up in start.S using the settings below
 295  */
 296 #define CONFIG_STACKSIZE        (128 << 10)     /* regular stack 128 KiB */
 297 #ifdef CONFIG_USE_IRQ
 298 #define CONFIG_STACKSIZE_IRQ    (4 << 10)       /* IRQ stack 4 KiB */
 299 #define CONFIG_STACKSIZE_FIQ    (4 << 10)       /* FIQ stack 4 KiB */
 300 #endif
 301
 302 /*-----------------------------------------------------------------------
 303  * Physical Memory Map
 304  */
 305 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 306 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 307 #define PHYS_SDRAM_1_SIZE       (32 << 20)      /* at least 32 MiB */
 308 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 309
 310 /* SDRAM Bank Allocation method */
 311 #define SDRC_R_B_C              1
 312
 313 /*-----------------------------------------------------------------------
 314  * FLASH and environment organization
 315  */
 316
 317 /* **** PISMO SUPPORT *** */
 318
 319 /* Configure the PISMO */
 320 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 321 #define PISMO1_ONEN_SIZE                GPMC_SIZE_128M
 322
 323 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 324
 325 #if defined(CONFIG_CMD_NAND)
 326 #define CONFIG_SYS_FLASH_BASE           PISMO1_NAND_BASE
 327 #endif
 328
 329 /* Monitor at start of flash */
 330 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 331 #define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 332
 333 #define CONFIG_ENV_IS_IN_NAND           1
 334 #define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 335 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
 336
 337 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 338 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 339 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 340
 341 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 342 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 343 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 344 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 345                                          CONFIG_SYS_INIT_RAM_SIZE - \
 346                                          GENERATED_GBL_DATA_SIZE)
 347
 348 #define CONFIG_OMAP3_SPI
 349
 350 #endif /* __CONFIG_H */