pci: Move CONFIG_PCI_PNP to Kconfig
[platform/kernel/u-boot.git] / include / configs / o2dnt-common.h
1 /*
2  *  Common configuration options for ifm camera boards
3  *
4  * (C) Copyright 2005
5  * Sebastien Cazaux, ifm electronic gmbh
6  *
7  * (C) Copyright 2012
8  * DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
9  *
10  * SPDX-License-Identifier:     GPL-2.0+
11  */
12
13 #ifndef __O2D_CONFIG_H
14 #define __O2D_CONFIG_H
15
16 /*
17  * High Level Configuration Options
18  */
19 #define CONFIG_MPC5200
20
21 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* running at 33.000000MHz */
22
23 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
24 #if defined(CONFIG_CMD_KGDB)
25 /* log base 2 of the above value */
26 #define CONFIG_SYS_CACHELINE_SHIFT      5
27 #endif
28
29 /*
30 #define CONFIG_POST     (CONFIG_SYS_POST_MEMORY | \
31                          CONFIG_SYS_POST_I2C)
32 */
33
34 #ifdef CONFIG_POST
35 /* preserve space for the post_word at end of on-chip SRAM */
36 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
37 #endif
38
39 /*
40  * Serial console configuration
41  */
42 #define CONFIG_PSC_CONSOLE      5       /* console is on PSC5 */
43 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
44 #define CONFIG_SYS_BAUDRATE_TABLE \
45         { 9600, 19200, 38400, 57600, 115200, 230400 }
46
47 /*
48  * PCI Mapping:
49  * 0x40000000 - 0x4fffffff - PCI Memory
50  * 0x50000000 - 0x50ffffff - PCI IO Space
51  */
52
53 #define CONFIG_PCI_MEM_BUS      0x40000000
54 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
55 #define CONFIG_PCI_MEM_SIZE     0x10000000
56
57 #define CONFIG_PCI_IO_BUS       0x50000000
58 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
59 #define CONFIG_PCI_IO_SIZE      0x01000000
60
61 #define CONFIG_SYS_XLB_PIPELINING       1
62
63 /* Partitions */
64 #define CONFIG_MAC_PARTITION
65 #define CONFIG_DOS_PARTITION
66 #define CONFIG_ISO_PARTITION
67
68 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
69
70 #define CONFIG_SYS_ALT_MEMTEST  /* Much more complex memory test */
71
72 /*
73  * Supported commands
74  */
75 #define CONFIG_CMD_EEPROM
76 #ifdef CONFIG_PCI
77 #define CONFIG_CMD_PCI
78 #endif
79 #ifdef CONFIG_POST
80 #define CONFIG_CMD_DIAG
81 #endif
82
83 #if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000)
84 /* Boot low with 16 or 32 MB Flash */
85 #define CONFIG_SYS_LOWBOOT      1
86 #elif (CONFIG_SYS_TEXT_BASE != 0x00100000)
87 #error "CONFIG_SYS_TEXT_BASE value is invalid"
88 #endif
89
90
91 #define CONFIG_PREBOOT  "run master"
92
93 #undef  CONFIG_BOOTARGS
94
95 #if !defined(CONSOLE_DEV)
96 #define CONSOLE_DEV     "ttyPSC1"
97 #endif
98
99 /*
100  * Default environment for booting old and new kernel versions
101  */
102 #define CONFIG_IFM_DEFAULT_ENV_OLD                                      \
103         "flash_self_old=run ramargs addip addmem;"                      \
104                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
105         "flash_nfs_old=run nfsargs addip addmem;"                       \
106                 "bootm ${kernel_addr}\0"                                \
107         "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};"                \
108                 "run nfsargs addip addmem;"                             \
109                 "bootm ${kernel_addr_r}\0"
110
111 #define CONFIG_IFM_DEFAULT_ENV_NEW                                      \
112         "fdt_addr_r=900000\0"                                           \
113         "fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0"        \
114         "flash_self=run ramargs addip addtty addmisc;"                  \
115                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
116         "flash_nfs=run nfsargs addip addtty addmisc;"                   \
117                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
118         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
119                 "tftp ${fdt_addr_r} ${fdt_file}; "                      \
120                 "run nfsargs addip addtty addmisc;"                     \
121                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
122
123 #define CONFIG_IFM_DEFAULT_ENV_SETTINGS                                 \
124         "IOpin=0x64\0"                                                  \
125         "addip=setenv bootargs ${bootargs} "                            \
126                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
127                 ":${hostname}:${netdev}:off panic=1\0"                  \
128         "addmem=setenv bootargs ${bootargs} ${memlimit}\0"              \
129         "addmisc=sete bootargs ${bootargs} ${miscargs}\0"               \
130         "addtty=sete bootargs ${bootargs} console="                     \
131                 CONSOLE_DEV ",${baudrate}\0"                    \
132         "bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \
133         "kernel_addr_r=600000\0"                                        \
134         "initrd_high=0x03e00000\0"                                      \
135         "memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0"                      \
136         "memtest=mtest 0x00100000 "__stringify(CONFIG_SYS_MEMTEST_END)" 0 1\0" \
137         "netdev=eth0\0"                                                 \
138         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
139                 "nfsroot=${serverip}:${rootpath}\0"                     \
140         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
141         "linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\
142         "progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \
143                 "cp.b ${fileaddr} ${linbot} ${filesize}\0"              \
144         "ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\
145         "progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};"     \
146                 "cp.b ${fileaddr} ${rambot} ${filesize}\0"              \
147         "jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0"  \
148         "progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};"     \
149                 "cp.b ${fileaddr} ${jffbot} ${filesize}\0"              \
150         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
151         "uboname=" CONFIG_BOARD_NAME                                    \
152                 "/u-boot.bin_" CONFIG_BOARD_NAME "_act\0"               \
153         "progubo=tftp 200000 ${uboname};"                               \
154                 "protect off ${ubobot} ${ubotop};"                      \
155                 "erase ${ubobot} ${ubotop};"                            \
156                 "cp.b ${fileaddr} ${ubobot} ${filesize}\0"              \
157         "unlock=yes\0"                                                  \
158         "post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;"     \
159                 "setenv bootdelay 1;"                                   \
160                 "crc32 "__stringify(CONFIG_SYS_TEXT_BASE)" "            \
161                         BOARD_POST_CRC32_END";"                         \
162                 "setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0"
163
164 #define CONFIG_BOOTCOMMAND      "run post"
165
166 /*
167  * IPB Bus clocking configuration.
168  */
169 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
170
171 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
172 /*
173  * PCI Bus clocking configuration
174  *
175  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
176  * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
177  * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
178  */
179 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2    /* define for 66MHz speed */
180 #endif
181
182 /*
183  * I2C configuration
184  */
185 #define CONFIG_HARD_I2C                 1       /* I2C with hardware support */
186 #define CONFIG_SYS_I2C_MODULE           1       /* Select I2C module #1 or #2 */
187 #define CONFIG_SYS_I2C_SPEED            100000  /* 100 kHz */
188 #define CONFIG_SYS_I2C_SLAVE            0x7F
189
190 /*
191  * EEPROM configuration:
192  *
193  * O2DNT board is equiped with Ramtron FRAM device FM24CL16
194  * 16 Kib Ferroelectric Nonvolatile serial RAM memory
195  * organized as 2048 x 8 bits and addressable as eight I2C devices
196  * 0x50 ... 0x57 each 256 bytes in size
197  *
198  */
199 #define CONFIG_SYS_I2C_FRAM
200 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
201 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
202 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
203 /*
204  * There is no write delay with FRAM, write operations are performed at bus
205  * speed. Thus, no status polling or write delay is needed.
206  */
207
208 /*
209  * Flash configuration
210  */
211 #define CONFIG_SYS_FLASH_CFI            1
212 #define CONFIG_FLASH_CFI_DRIVER         1
213 #define CONFIG_FLASH_16BIT
214 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
215 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
216 #define CONFIG_SYS_FLASH_EMPTY_INFO
217
218 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks */
219 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
220 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Erase Timeout (in ms) */
221 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Write Timeout (in ms) */
222 /* Timeout for Flash Clear Lock Bits (in ms) */
223 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
224 /* "Real" (hardware) sectors protection */
225 #define CONFIG_SYS_FLASH_PROTECTION
226
227 /*
228  * Environment settings
229  */
230 #define CONFIG_ENV_IS_IN_FLASH  1
231 #define CONFIG_ENV_SIZE         0x20000
232 #define CONFIG_ENV_SECT_SIZE    0x20000
233 #define CONFIG_ENV_OVERWRITE    1
234 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00040000)
235
236 /*
237  * Memory map
238  */
239 #define CONFIG_SYS_MBAR         0xF0000000
240 #define CONFIG_SYS_SDRAM_BASE   0x00000000
241 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
242
243 /* Use SRAM until RAM will be available */
244 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
245 #ifdef CONFIG_POST
246 /* preserve space for the post_word at end of on-chip SRAM */
247 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_POST_SIZE
248 #else
249 /* End of used area in DPRAM */
250 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
251 #endif
252
253 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
254                                          GENERATED_GBL_DATA_SIZE)
255 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
256
257 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
258 #define CONFIG_SYS_MONITOR_LEN          (192 << 10) /* 192 kB for Monitor */
259 #define CONFIG_SYS_MALLOC_LEN           (128 << 10) /* 128 kB for malloc() */
260 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)   /* Initial map for Linux */
261
262 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
263 #define CONFIG_SYS_RAMBOOT              1
264 #endif
265
266 /*
267  * Ethernet configuration
268  */
269 #define CONFIG_MPC5xxx_FEC
270 #define CONFIG_MPC5xxx_FEC_MII100
271 #define CONFIG_PHY_ADDR                 0x00
272 #define CONFIG_RESET_PHY_R
273
274 /*
275  * GPIO configuration
276  */
277 #define CONFIG_SYS_GPIO_DATADIR         0x00000064 /* PSC1_2, PSC2_1,2 output */
278 #define CONFIG_SYS_GPIO_OPENDRAIN       0x00000000 /* No open drain */
279 #define CONFIG_SYS_GPIO_DATAVALUE       0x00000000 /* PSC1_1 to 1, rest to 0 */
280 #define CONFIG_SYS_GPIO_ENABLE          0x00000064 /* PSC1_2, PSC2_1,2 enable */
281
282 /*
283  * Miscellaneous configurable options
284  */
285 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
286 #define CONFIG_CMDLINE_EDITING
287
288 #if defined(CONFIG_CMD_KGDB)
289 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
290 #else
291 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
292 #endif
293 /* Print Buffer Size */
294 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
295                                          sizeof(CONFIG_SYS_PROMPT) + 16)
296 /* max number of command args */
297 #define CONFIG_SYS_MAXARGS              16
298 /* Boot Argument Buffer Size */
299 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
300
301 /* default load address */
302 #define CONFIG_SYS_LOAD_ADDR            0x100000
303
304 /* decrementer freq: 1 ms ticks */
305
306 /*
307  * Various low-level settings
308  */
309 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
310 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
311
312 #define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
313 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
314 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
315 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
316
317 #define CONFIG_BOARD_EARLY_INIT_R
318
319 #define CONFIG_SYS_CS_BURST             0x00000000
320 #define CONFIG_SYS_CS_DEADCYCLE         0x33333333
321
322 /*
323  * DT support
324  */
325 #define OF_CPU                  "PowerPC,5200@0"
326 #define OF_SOC                  "soc5200@f0000000"
327 #define OF_TBCLK                (bd->bi_busfreq / 4)
328
329 #endif /* __O2D_CONFIG_H */