Merge branch 'master' of git://git.denx.de/u-boot-spi
[platform/kernel/u-boot.git] / include / configs / o2dnt-common.h
1 /*
2  *  Common configuration options for ifm camera boards
3  *
4  * (C) Copyright 2005
5  * Sebastien Cazaux, ifm electronic gmbh
6  *
7  * (C) Copyright 2012
8  * DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
9  *
10  * SPDX-License-Identifier:     GPL-2.0+
11  */
12
13 #ifndef __O2D_CONFIG_H
14 #define __O2D_CONFIG_H
15
16 /*
17  * High Level Configuration Options
18  */
19 #define CONFIG_MPC5200
20
21 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000 /* running at 33.000000MHz */
22
23 #define CONFIG_SYS_CACHELINE_SIZE       32      /* For MPC5xxx CPUs */
24 #if defined(CONFIG_CMD_KGDB)
25 /* log base 2 of the above value */
26 #define CONFIG_SYS_CACHELINE_SHIFT      5
27 #endif
28
29 /*
30 #define CONFIG_POST     (CONFIG_SYS_POST_MEMORY | \
31                          CONFIG_SYS_POST_I2C)
32 */
33
34 #ifdef CONFIG_POST
35 /* preserve space for the post_word at end of on-chip SRAM */
36 #define MPC5XXX_SRAM_POST_SIZE  (MPC5XXX_SRAM_SIZE - 4)
37 #endif
38
39 /*
40  * Serial console configuration
41  */
42 #define CONFIG_PSC_CONSOLE      5       /* console is on PSC5 */
43 #define CONFIG_BAUDRATE         115200  /* ... at 115200 bps */
44 #define CONFIG_SYS_BAUDRATE_TABLE \
45         { 9600, 19200, 38400, 57600, 115200, 230400 }
46
47 /*
48  * PCI Mapping:
49  * 0x40000000 - 0x4fffffff - PCI Memory
50  * 0x50000000 - 0x50ffffff - PCI IO Space
51  */
52 #undef CONFIG_PCI
53 #define CONFIG_PCI_PNP          1
54
55 #define CONFIG_PCI_MEM_BUS      0x40000000
56 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
57 #define CONFIG_PCI_MEM_SIZE     0x10000000
58
59 #define CONFIG_PCI_IO_BUS       0x50000000
60 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
61 #define CONFIG_PCI_IO_SIZE      0x01000000
62
63 #define CONFIG_SYS_XLB_PIPELINING       1
64
65 /* Partitions */
66 #define CONFIG_MAC_PARTITION
67 #define CONFIG_DOS_PARTITION
68 #define CONFIG_ISO_PARTITION
69
70 #define CONFIG_TIMESTAMP        /* Print image info with timestamp */
71
72 #define CONFIG_SYS_ALT_MEMTEST  /* Much more complex memory test */
73
74 /*
75  * Supported commands
76  */
77 #include <config_cmd_default.h>
78
79 #define CONFIG_CMD_EEPROM
80 #define CONFIG_CMD_FAT
81 #define CONFIG_CMD_I2C
82 #define CONFIG_CMD_MII
83 #define CONFIG_CMD_PING
84 #define CONFIG_CMD_DHCP
85 #ifdef CONFIG_PCI
86 #define CONFIG_CMD_PCI
87 #endif
88 #ifdef CONFIG_POST
89 #define CONFIG_CMD_DIAG
90 #endif
91
92 #if (CONFIG_SYS_TEXT_BASE == 0xFC000000) || (CONFIG_SYS_TEXT_BASE == 0xFF000000)
93 /* Boot low with 16 or 32 MB Flash */
94 #define CONFIG_SYS_LOWBOOT      1
95 #elif (CONFIG_SYS_TEXT_BASE != 0x00100000)
96 #error "CONFIG_SYS_TEXT_BASE value is invalid"
97 #endif
98
99 /*
100  * Autobooting
101  * Be selective on what keys can delay or stop the autoboot process
102  * To stop use: "++++++++++"
103  */
104 #define CONFIG_AUTOBOOT_KEYED
105 #define CONFIG_AUTOBOOT_PROMPT  "Autobooting in %d seconds, " \
106                                 "press password to stop\n", bootdelay
107 #define CONFIG_AUTOBOOT_STOP_STR        "++++++++++"
108 #undef CONFIG_AUTOBOOT_DELAY_STR
109 #define DEBUG_BOOTKEYS          0
110
111 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds */
112
113 #define CONFIG_PREBOOT  "run master"
114
115 #undef  CONFIG_BOOTARGS
116
117 #if !defined(CONFIG_CONSOLE_DEV)
118 #define CONFIG_CONSOLE_DEV      "ttyPSC1"
119 #endif
120
121 /*
122  * Default environment for booting old and new kernel versions
123  */
124 #define CONFIG_IFM_DEFAULT_ENV_OLD                                      \
125         "flash_self_old=run ramargs addip addmem;"                      \
126                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
127         "flash_nfs_old=run nfsargs addip addmem;"                       \
128                 "bootm ${kernel_addr}\0"                                \
129         "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};"                \
130                 "run nfsargs addip addmem;"                             \
131                 "bootm ${kernel_addr_r}\0"
132
133 #define CONFIG_IFM_DEFAULT_ENV_NEW                                      \
134         "fdt_addr_r=900000\0"                                           \
135         "fdt_file="CONFIG_BOARD_NAME"/"CONFIG_BOARD_NAME".dtb\0"        \
136         "flash_self=run ramargs addip addtty addmisc;"                  \
137                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0"    \
138         "flash_nfs=run nfsargs addip addtty addmisc;"                   \
139                 "bootm ${kernel_addr} - ${fdt_addr}\0"                  \
140         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
141                 "tftp ${fdt_addr_r} ${fdt_file}; "                      \
142                 "run nfsargs addip addtty addmisc;"                     \
143                 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0"              \
144
145 #define CONFIG_IFM_DEFAULT_ENV_SETTINGS                                 \
146         "IOpin=0x64\0"                                                  \
147         "addip=setenv bootargs ${bootargs} "                            \
148                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
149                 ":${hostname}:${netdev}:off panic=1\0"                  \
150         "addmem=setenv bootargs ${bootargs} ${memlimit}\0"              \
151         "addmisc=sete bootargs ${bootargs} ${miscargs}\0"               \
152         "addtty=sete bootargs ${bootargs} console="                     \
153                 CONFIG_CONSOLE_DEV ",${baudrate}\0"                     \
154         "bootfile="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0" \
155         "kernel_addr_r=600000\0"                                        \
156         "initrd_high=0x03e00000\0"                                      \
157         "memlimit=mem="CONFIG_BOARD_MEM_LIMIT"M\0"                      \
158         "memtest=mtest 0x00100000 "__stringify(CONFIG_SYS_MEMTEST_END)" 0 1\0" \
159         "netdev=eth0\0"                                                 \
160         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
161                 "nfsroot=${serverip}:${rootpath}\0"                     \
162         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
163         "linuxname="CONFIG_BOARD_NAME"/uImage_"CONFIG_BOARD_NAME"_act\0"\
164         "progLinux=tftp 200000 ${linuxname};erase ${linbot} ${lintop};" \
165                 "cp.b ${fileaddr} ${linbot} ${filesize}\0"              \
166         "ramname="CONFIG_BOARD_NAME"/uRamdisk_"CONFIG_BOARD_NAME"_act\0"\
167         "progRam=tftp 200000 ${ramname};erase ${rambot} ${ramtop};"     \
168                 "cp.b ${fileaddr} ${rambot} ${filesize}\0"              \
169         "jffname="CONFIG_BOARD_NAME"/uJFFS2_"CONFIG_BOARD_NAME"_act\0"  \
170         "progJff=tftp 200000 ${jffname};erase ${jffbot} ${jfftop};"     \
171                 "cp.b ${fileaddr} ${jffbot} ${filesize}\0"              \
172         "rootpath=/opt/eldk/ppc_6xx\0"                                  \
173         "uboname=" CONFIG_BOARD_NAME                                    \
174                 "/u-boot.bin_" CONFIG_BOARD_NAME "_act\0"               \
175         "progubo=tftp 200000 ${uboname};"                               \
176                 "protect off ${ubobot} ${ubotop};"                      \
177                 "erase ${ubobot} ${ubotop};"                            \
178                 "cp.b ${fileaddr} ${ubobot} ${filesize}\0"              \
179         "unlock=yes\0"                                                  \
180         "post=echo !!! "CONFIG_BOARD_NAME" POWER ON SELF TEST !!!;"     \
181                 "setenv bootdelay 1;"                                   \
182                 "crc32 "__stringify(CONFIG_SYS_TEXT_BASE)" "            \
183                         BOARD_POST_CRC32_END";"                         \
184                 "setenv bootcmd "CONFIG_BOARD_BOOTCMD";saveenv;reset\0"
185
186 #define CONFIG_BOOTCOMMAND      "run post"
187
188 /*
189  * IPB Bus clocking configuration.
190  */
191 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK         /* define for 133MHz speed */
192
193 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK)
194 /*
195  * PCI Bus clocking configuration
196  *
197  * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
198  * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
199  * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
200  */
201 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2    /* define for 66MHz speed */
202 #endif
203
204 /*
205  * I2C configuration
206  */
207 #define CONFIG_HARD_I2C                 1       /* I2C with hardware support */
208 #define CONFIG_SYS_I2C_MODULE           1       /* Select I2C module #1 or #2 */
209 #define CONFIG_SYS_I2C_SPEED            100000  /* 100 kHz */
210 #define CONFIG_SYS_I2C_SLAVE            0x7F
211
212 /*
213  * EEPROM configuration:
214  *
215  * O2DNT board is equiped with Ramtron FRAM device FM24CL16
216  * 16 Kib Ferroelectric Nonvolatile serial RAM memory
217  * organized as 2048 x 8 bits and addressable as eight I2C devices
218  * 0x50 ... 0x57 each 256 bytes in size
219  *
220  */
221 #define CONFIG_SYS_I2C_FRAM
222 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50    /* 1010000x */
223 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
224 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
225 /*
226  * There is no write delay with FRAM, write operations are performed at bus
227  * speed. Thus, no status polling or write delay is needed.
228  */
229
230 /*
231  * Flash configuration
232  */
233 #define CONFIG_SYS_FLASH_CFI            1
234 #define CONFIG_FLASH_CFI_DRIVER         1
235 #define CONFIG_FLASH_16BIT
236 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT
237 #define CONFIG_SYS_FLASH_CFI_AMD_RESET
238 #define CONFIG_SYS_FLASH_EMPTY_INFO
239
240 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max num of memory banks */
241 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
242 #define CONFIG_SYS_FLASH_ERASE_TOUT     240000  /* Erase Timeout (in ms) */
243 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Write Timeout (in ms) */
244 /* Timeout for Flash Clear Lock Bits (in ms) */
245 #define CONFIG_SYS_FLASH_UNLOCK_TOUT    10000
246 /* "Real" (hardware) sectors protection */
247 #define CONFIG_SYS_FLASH_PROTECTION
248
249 /*
250  * Environment settings
251  */
252 #define CONFIG_ENV_IS_IN_FLASH  1
253 #define CONFIG_ENV_SIZE         0x20000
254 #define CONFIG_ENV_SECT_SIZE    0x20000
255 #define CONFIG_ENV_OVERWRITE    1
256 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x00040000)
257
258 /*
259  * Memory map
260  */
261 #define CONFIG_SYS_MBAR         0xF0000000
262 #define CONFIG_SYS_SDRAM_BASE   0x00000000
263 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
264
265 /* Use SRAM until RAM will be available */
266 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
267 #ifdef CONFIG_POST
268 /* preserve space for the post_word at end of on-chip SRAM */
269 #define CONFIG_SYS_INIT_RAM_END         MPC5XXX_SRAM_POST_SIZE
270 #else
271 /* End of used area in DPRAM */
272 #define CONFIG_SYS_INIT_RAM_END         MPC5XXX_SRAM_SIZE
273 #endif
274
275 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - \
276                                          GENERATED_GBL_DATA_SIZE)
277 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
278
279 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
280 #define CONFIG_SYS_MONITOR_LEN          (192 << 10) /* 192 kB for Monitor */
281 #define CONFIG_SYS_MALLOC_LEN           (128 << 10) /* 128 kB for malloc() */
282 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)   /* Initial map for Linux */
283
284 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
285 #define CONFIG_SYS_RAMBOOT              1
286 #endif
287
288 /*
289  * Ethernet configuration
290  */
291 #define CONFIG_MPC5xxx_FEC
292 #define CONFIG_MPC5xxx_FEC_MII100
293 #define CONFIG_PHY_ADDR                 0x00
294 #define CONFIG_RESET_PHY_R
295
296 /*
297  * GPIO configuration
298  */
299 #define CONFIG_SYS_GPIO_DATADIR         0x00000064 /* PSC1_2, PSC2_1,2 output */
300 #define CONFIG_SYS_GPIO_OPENDRAIN       0x00000000 /* No open drain */
301 #define CONFIG_SYS_GPIO_DATAVALUE       0x00000000 /* PSC1_1 to 1, rest to 0 */
302 #define CONFIG_SYS_GPIO_ENABLE          0x00000064 /* PSC1_2, PSC2_1,2 enable */
303
304 /*
305  * Miscellaneous configurable options
306  */
307 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
308 #define CONFIG_CMDLINE_EDITING
309 #define CONFIG_SYS_HUSH_PARSER
310
311 #if defined(CONFIG_CMD_KGDB)
312 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size  */
313 #else
314 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size  */
315 #endif
316 /* Print Buffer Size */
317 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
318                                          sizeof(CONFIG_SYS_PROMPT) + 16)
319 /* max number of command args */
320 #define CONFIG_SYS_MAXARGS              16
321 /* Boot Argument Buffer Size */
322 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
323
324 /* default load address */
325 #define CONFIG_SYS_LOAD_ADDR            0x100000
326
327 /* decrementer freq: 1 ms ticks */
328
329 /*
330  * Various low-level settings
331  */
332 #define CONFIG_SYS_HID0_INIT            HID0_ICE | HID0_ICFI
333 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
334
335 #define CONFIG_SYS_BOOTCS_START         CONFIG_SYS_FLASH_BASE
336 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
337 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
338 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
339
340 #define CONFIG_BOARD_EARLY_INIT_R
341
342 #define CONFIG_SYS_CS_BURST             0x00000000
343 #define CONFIG_SYS_CS_DEADCYCLE         0x33333333
344
345 /*
346  * DT support
347  */
348 #define CONFIG_OF_LIBFDT        1
349 #define CONFIG_OF_BOARD_SETUP   1
350
351 #define OF_CPU                  "PowerPC,5200@0"
352 #define OF_SOC                  "soc5200@f0000000"
353 #define OF_TBCLK                (bd->bi_busfreq / 4)
354
355 #endif /* __O2D_CONFIG_H */