Merge branch 'next'
[platform/kernel/u-boot.git] / include / configs / nokia_rx51.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2011-2012
4  * Pali Rohár <pali@kernel.org>
5  *
6  * (C) Copyright 2010
7  * Alistair Buxton <a.j.buxton@gmail.com>
8  *
9  * Derived from Beagle Board code:
10  * (C) Copyright 2006-2008
11  * Texas Instruments.
12  * Richard Woodruff <r-woodruff2@ti.com>
13  * Syed Mohammed Khasim <x0khasim@ti.com>
14  *
15  * Configuration settings for the Nokia RX-51 aka N900.
16  */
17
18 #ifndef __CONFIG_H
19 #define __CONFIG_H
20
21 /*
22  * High Level Configuration Options
23  */
24
25 #include <asm/arch/cpu.h>               /* get chip and board defs */
26 #include <asm/arch/omap.h>
27 #include <asm/arch/mem.h>
28 #include <linux/stringify.h>
29
30 /* Clock Defines */
31 #define V_OSCK                  26000000        /* Clock output from T2 */
32 #define V_SCLK                  (V_OSCK >> 1)
33
34 /*
35  * Hardware drivers
36  */
37
38 /*
39  * NS16550 Configuration
40  */
41 #define V_NS16550_CLK           48000000                /* 48MHz (APLL96/2) */
42
43 #define CFG_SYS_NS16550_CLK             V_NS16550_CLK
44
45 /*
46  * select serial console configuration
47  */
48 #define CFG_SYS_NS16550_COM3            OMAP34XX_UART3
49
50 #define CFG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
51
52 #define GPIO_SLIDE                      71
53
54 /*
55  * Board ONENAND Info.
56  */
57
58 #define CFG_SYS_ONENAND_BASE            ONENAND_MAP
59
60 /* Environment information */
61 #define CFG_EXTRA_ENV_SETTINGS \
62         "usbtty=cdc_acm\0" \
63         "stdin=usbtty,serial,keyboard\0" \
64         "stdout=usbtty,serial,vidconsole\0" \
65         "stderr=usbtty,serial,vidconsole\0" \
66         "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
67         "switchmmc=mmc dev ${mmcnum}\0" \
68         "kernaddr=0x82008000\0" \
69         "initrdaddr=0x84008000\0" \
70         "scriptaddr=0x86008000\0" \
71         "fileloadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
72         "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
73                 "${fileloadaddr} ${mmcfile}\0" \
74         "kernload=setenv fileloadaddr ${kernaddr};" \
75                 "setenv mmcfile ${mmckernfile};" \
76                 "run fileload\0" \
77         "initrdload=setenv fileloadaddr ${initrdaddr};" \
78                 "setenv mmcfile ${mmcinitrdfile};" \
79                 "run fileload\0" \
80         "scriptload=setenv fileloadaddr ${scriptaddr};" \
81                 "setenv mmcfile ${mmcscriptfile};" \
82                 "run fileload\0" \
83         "scriptboot=echo Running ${mmcscriptfile} from mmc " \
84                 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
85         "kernboot=echo Booting ${mmckernfile} from mmc " \
86                 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} || " \
87                         "bootz ${kernaddr}\0" \
88         "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
89                 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr} || " \
90                         "bootz ${kernaddr} ${initrdaddr}\0" \
91         "attachboot=echo Booting attached kernel image ...;" \
92                 "setenv setup_omap_atag 1;" \
93                 "bootm ${attkernaddr} || bootz ${attkernaddr};" \
94                 "setenv setup_omap_atag\0" \
95         "trymmcscriptboot=run switchmmc && run scriptload && run scriptboot\0" \
96         "trymmckernboot=run switchmmc && run kernload && run kernboot\0" \
97         "trymmckerninitrdboot=run switchmmc && run initrdload && " \
98                 "run kernload && run kerninitrdboot\0" \
99         "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
100                 "setenv mmckernfile uImage; run trymmckernboot;" \
101                 "setenv mmckernfile zImage; run trymmckernboot\0" \
102         "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
103                 "setenv mmcpart 2; run trymmcpartboot;" \
104                 "setenv mmcpart 3; run trymmcpartboot;" \
105                 "setenv mmcpart 4; run trymmcpartboot\0" \
106         "trymmcboot=if run switchmmc; then " \
107                         "setenv mmctype fat;" \
108                         "run trymmcallpartboot;" \
109                         "setenv mmctype ext4;" \
110                         "run trymmcallpartboot;" \
111                 "fi\0" \
112         "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
113         "sdboot=setenv mmcnum 0; run trymmcboot\0" \
114         "trymmcbootmenu=setenv mmctype fat && run trymmcscriptboot || " \
115                 "setenv mmctype ext4 && run trymmcscriptboot\0" \
116         "preboot=setenv mmcpart 1; setenv mmcscriptfile bootmenu.scr;" \
117                 "setenv mmcnum 0 && run trymmcbootmenu || " \
118                 "setenv mmcnum 1 && run trymmcbootmenu;" \
119                 "if run slide; then true; else " \
120                         "setenv bootmenu_delay 0;" \
121                         "setenv bootdelay 0;" \
122                 "fi\0" \
123         "menucmd=bootmenu\0" \
124         "bootmenu_0=Attached kernel=run attachboot\0" \
125         "bootmenu_1=Internal eMMC=run emmcboot\0" \
126         "bootmenu_2=External SD card=run sdboot\0" \
127         "bootmenu_3=U-Boot boot order=boot\0" \
128         "bootmenu_delay=30\0" \
129         ""
130
131 #define CFG_POSTBOOTMENU \
132         "echo;" \
133         "echo Extra commands:;" \
134         "echo run sdboot - Boot from SD card slot.;" \
135         "echo run emmcboot - Boot internal eMMC memory.;" \
136         "echo run attachboot - Boot attached kernel image.;" \
137         "echo"
138
139 /*
140  * OMAP3 has 12 GP timers, they can be driven by the system clock
141  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
142  * This rate is divided by a local divisor.
143  */
144 #define CFG_SYS_TIMERBASE               (OMAP34XX_GPT2)
145
146 /*
147  * Physical Memory Map
148  */
149 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
150
151 /*
152  * FLASH and environment organization
153  */
154
155 #define CFG_SYS_SDRAM_BASE              PHYS_SDRAM_1
156 #define CFG_SYS_INIT_RAM_ADDR   0x4020f800
157 #define CFG_SYS_INIT_RAM_SIZE   0x800
158
159 /*
160  * Attached kernel image
161  */
162
163 #define SDRAM_SIZE                      0x10000000      /* 256 MB */
164 #define SDRAM_END                       (CFG_SYS_SDRAM_BASE + SDRAM_SIZE)
165
166 #define IMAGE_MAXSIZE                   0x1FF800        /* 2 MB - 2 kB */
167 #define KERNEL_OFFSET                   0x40000         /* 256 kB */
168 #define KERNEL_MAXSIZE                  (IMAGE_MAXSIZE-KERNEL_OFFSET)
169 #define KERNEL_ADDRESS                  (SDRAM_END-KERNEL_MAXSIZE)
170
171 /* Reserve protected RAM for attached kernel */
172 #define CFG_PRAM                        ((KERNEL_MAXSIZE >> 10)+1)
173
174 #endif /* __CONFIG_H */