pci: Move CONFIG_PCI_PNP to Kconfig
[platform/kernel/u-boot.git] / include / configs / mx6sxsabresd.h
1 /*
2  * Copyright 2014 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the Freescale i.MX6SX Sabresd board.
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11
12 #include "mx6_common.h"
13
14 #ifdef CONFIG_SPL
15 #include "imx6_spl.h"
16 #endif
17
18 /* Size of malloc() pool */
19 #define CONFIG_SYS_MALLOC_LEN           (3 * SZ_1M)
20
21 #define CONFIG_BOARD_EARLY_INIT_F
22
23 #define CONFIG_MXC_UART
24 #define CONFIG_MXC_UART_BASE            UART1_BASE
25
26 #ifdef CONFIG_IMX_BOOTAUX
27 /* Set to QSPI2 B flash at default */
28 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000
29
30 #define UPDATE_M4_ENV \
31         "m4image=m4_qspi.bin\0" \
32         "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
33         "update_m4_from_sd=" \
34                 "if sf probe 1:0; then " \
35                         "if run loadm4image; then " \
36                                 "setexpr fw_sz ${filesize} + 0xffff; " \
37                                 "setexpr fw_sz ${fw_sz} / 0x10000; "    \
38                                 "setexpr fw_sz ${fw_sz} * 0x10000; "    \
39                                 "sf erase 0x0 ${fw_sz}; " \
40                                 "sf write ${loadaddr} 0x0 ${filesize}; " \
41                         "fi; " \
42                 "fi\0" \
43         "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
44 #else
45 #define UPDATE_M4_ENV ""
46 #endif
47
48 #define CONFIG_EXTRA_ENV_SETTINGS \
49         UPDATE_M4_ENV \
50         "script=boot.scr\0" \
51         "image=zImage\0" \
52         "console=ttymxc0\0" \
53         "fdt_high=0xffffffff\0" \
54         "initrd_high=0xffffffff\0" \
55         "fdt_file=imx6sx-sdb.dtb\0" \
56         "fdt_addr=0x88000000\0" \
57         "boot_fdt=try\0" \
58         "ip_dyn=yes\0" \
59         "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \
60         "mmcdev=2\0" \
61         "mmcpart=1\0" \
62         "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
63         "mmcargs=setenv bootargs console=${console},${baudrate} " \
64                 "root=${mmcroot}\0" \
65         "loadbootscript=" \
66                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
67         "bootscript=echo Running bootscript from mmc ...; " \
68                 "source\0" \
69         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
70         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
71         "mmcboot=echo Booting from mmc ...; " \
72                 "run mmcargs; " \
73                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
74                         "if run loadfdt; then " \
75                                 "bootz ${loadaddr} - ${fdt_addr}; " \
76                         "else " \
77                                 "if test ${boot_fdt} = try; then " \
78                                         "bootz; " \
79                                 "else " \
80                                         "echo WARN: Cannot load the DT; " \
81                                 "fi; " \
82                         "fi; " \
83                 "else " \
84                         "bootz; " \
85                 "fi;\0" \
86         "netargs=setenv bootargs console=${console},${baudrate} " \
87                 "root=/dev/nfs " \
88         "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
89                 "netboot=echo Booting from net ...; " \
90                 "run netargs; " \
91                 "if test ${ip_dyn} = yes; then " \
92                         "setenv get_cmd dhcp; " \
93                 "else " \
94                         "setenv get_cmd tftp; " \
95                 "fi; " \
96                 "${get_cmd} ${image}; " \
97                 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
98                         "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
99                                 "bootz ${loadaddr} - ${fdt_addr}; " \
100                         "else " \
101                                 "if test ${boot_fdt} = try; then " \
102                                         "bootz; " \
103                                 "else " \
104                                         "echo WARN: Cannot load the DT; " \
105                                 "fi; " \
106                         "fi; " \
107                 "else " \
108                         "bootz; " \
109                 "fi;\0"
110
111 #define CONFIG_BOOTCOMMAND \
112            "mmc dev ${mmcdev};" \
113            "mmc dev ${mmcdev}; if mmc rescan; then " \
114                    "if run loadbootscript; then " \
115                            "run bootscript; " \
116                    "else " \
117                            "if run loadimage; then " \
118                                    "run mmcboot; " \
119                            "else run netboot; " \
120                            "fi; " \
121                    "fi; " \
122            "else run netboot; fi"
123
124 /* Miscellaneous configurable options */
125 #define CONFIG_SYS_MEMTEST_START        0x80000000
126 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x10000)
127
128 #define CONFIG_STACKSIZE                SZ_128K
129
130 /* Physical Memory Map */
131 #define CONFIG_NR_DRAM_BANKS            1
132 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
133
134 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
135 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
136 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
137
138 #define CONFIG_SYS_INIT_SP_OFFSET \
139         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
140 #define CONFIG_SYS_INIT_SP_ADDR \
141         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
142
143 /* MMC Configuration */
144 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC4_BASE_ADDR
145
146 /* I2C Configs */
147 #define CONFIG_SYS_I2C
148 #define CONFIG_SYS_I2C_MXC
149 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
150 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
151 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
152 #define CONFIG_SYS_I2C_SPEED              100000
153
154 /* PMIC */
155 #define CONFIG_POWER
156 #define CONFIG_POWER_I2C
157 #define CONFIG_POWER_PFUZE100
158 #define CONFIG_POWER_PFUZE100_I2C_ADDR  0x08
159
160 /* Network */
161 #define CONFIG_FEC_MXC
162 #define CONFIG_MII
163
164 #define IMX_FEC_BASE                    ENET_BASE_ADDR
165 #define CONFIG_FEC_MXC_PHYADDR          0x1
166
167 #define CONFIG_FEC_XCV_TYPE             RGMII
168 #define CONFIG_ETHPRIME                 "FEC"
169
170 #define CONFIG_PHYLIB
171 #define CONFIG_PHY_ATHEROS
172
173 #ifdef CONFIG_CMD_USB
174 #define CONFIG_USB_EHCI
175 #define CONFIG_USB_EHCI_MX6
176 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
177 #define CONFIG_USB_HOST_ETHER
178 #define CONFIG_USB_ETHER_ASIX
179 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
180 #define CONFIG_MXC_USB_FLAGS   0
181 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
182 #endif
183
184 #define CONFIG_CMD_PCI
185 #ifdef CONFIG_CMD_PCI
186 #define CONFIG_PCI_SCAN_SHOW
187 #define CONFIG_PCIE_IMX
188 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(2, 0)
189 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(2, 1)
190 #endif
191
192 #define CONFIG_IMX_THERMAL
193
194 #ifdef CONFIG_FSL_QSPI
195 #define CONFIG_SYS_FSL_QSPI_LE
196 #define CONFIG_SYS_FSL_QSPI_AHB
197 #ifdef CONFIG_MX6SX_SABRESD_REVA
198 #define FSL_QSPI_FLASH_SIZE             SZ_16M
199 #else
200 #define FSL_QSPI_FLASH_SIZE             SZ_32M
201 #endif
202 #define FSL_QSPI_FLASH_NUM              2
203 #endif
204
205 #ifndef CONFIG_SPL_BUILD
206 #ifdef CONFIG_VIDEO
207 #define CONFIG_VIDEO_MXS
208 #define CONFIG_VIDEO_LOGO
209 #define CONFIG_SPLASH_SCREEN
210 #define CONFIG_SPLASH_SCREEN_ALIGN
211 #define CONFIG_CMD_BMP
212 #define CONFIG_BMP_16BPP
213 #define CONFIG_VIDEO_BMP_RLE8
214 #define CONFIG_VIDEO_BMP_LOGO
215 #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
216 #endif
217 #endif
218
219 #define CONFIG_ENV_OFFSET               (8 * SZ_64K)
220 #define CONFIG_ENV_SIZE                 SZ_8K
221 #define CONFIG_ENV_IS_IN_MMC
222
223 #define CONFIG_SYS_FSL_USDHC_NUM        3
224 #if defined(CONFIG_ENV_IS_IN_MMC)
225 #define CONFIG_SYS_MMC_ENV_DEV          2  /*USDHC4*/
226 #endif
227
228 #endif                          /* __CONFIG_H */