2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * Configuration settings for the Freescale i.MX6SL EVK board.
6 * SPDX-License-Identifier: GPL-2.0+
12 #include "mx6_common.h"
14 #define MACH_TYPE_MX6SLEVK 4307
15 #define CONFIG_MACH_TYPE MACH_TYPE_MX6SLEVK
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
20 #define CONFIG_BOARD_EARLY_INIT_F
22 #define CONFIG_MXC_UART
23 #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
26 #define CONFIG_FSL_ESDHC
27 #define CONFIG_FSL_USDHC
28 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
31 #define CONFIG_CMD_MMC
32 #define CONFIG_GENERIC_MMC
33 #define CONFIG_CMD_FAT
34 #define CONFIG_DOS_PARTITION
37 #define CONFIG_CMD_I2C
38 #define CONFIG_SYS_I2C
39 #define CONFIG_SYS_I2C_MXC
40 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
41 #define CONFIG_SYS_I2C_SPEED 100000
45 #define CONFIG_POWER_I2C
46 #define CONFIG_POWER_PFUZE100
47 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
49 #define CONFIG_CMD_PING
50 #define CONFIG_CMD_DHCP
51 #define CONFIG_CMD_MII
52 #define CONFIG_CMD_NET
53 #define CONFIG_FEC_MXC
55 #define IMX_FEC_BASE ENET_BASE_ADDR
56 #define CONFIG_FEC_XCV_TYPE RMII
57 #define CONFIG_ETHPRIME "FEC"
58 #define CONFIG_FEC_MXC_PHYADDR 0
61 #define CONFIG_PHY_SMSC
63 #define CONFIG_EXTRA_ENV_SETTINGS \
67 "fdt_high=0xffffffff\0" \
68 "initrd_high=0xffffffff\0" \
69 "fdt_file=imx6sl-evk.dtb\0" \
70 "fdt_addr=0x88000000\0" \
75 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
76 "mmcargs=setenv bootargs console=${console},${baudrate} " \
79 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
80 "bootscript=echo Running bootscript from mmc ...; " \
82 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
83 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
84 "mmcboot=echo Booting from mmc ...; " \
86 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
87 "if run loadfdt; then " \
88 "bootz ${loadaddr} - ${fdt_addr}; " \
90 "if test ${boot_fdt} = try; then " \
93 "echo WARN: Cannot load the DT; " \
99 "netargs=setenv bootargs console=${console},${baudrate} " \
101 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
102 "netboot=echo Booting from net ...; " \
104 "if test ${ip_dyn} = yes; then " \
105 "setenv get_cmd dhcp; " \
107 "setenv get_cmd tftp; " \
109 "${get_cmd} ${image}; " \
110 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
111 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
112 "bootz ${loadaddr} - ${fdt_addr}; " \
114 "if test ${boot_fdt} = try; then " \
117 "echo WARN: Cannot load the DT; " \
124 #define CONFIG_BOOTCOMMAND \
125 "mmc dev ${mmcdev};" \
126 "mmc dev ${mmcdev}; if mmc rescan; then " \
127 "if run loadbootscript; then " \
130 "if run loadimage; then " \
132 "else run netboot; " \
135 "else run netboot; fi"
137 /* Miscellaneous configurable options */
138 #define CONFIG_SYS_MEMTEST_START 0x80000000
139 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
141 #define CONFIG_STACKSIZE SZ_128K
143 /* Physical Memory Map */
144 #define CONFIG_NR_DRAM_BANKS 1
145 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
146 #define PHYS_SDRAM_SIZE SZ_1G
148 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
149 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
150 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
152 #define CONFIG_SYS_INIT_SP_OFFSET \
153 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
154 #define CONFIG_SYS_INIT_SP_ADDR \
155 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
157 /* Environment organization */
158 #define CONFIG_ENV_SIZE SZ_8K
160 #if defined CONFIG_SYS_BOOT_SPINOR
161 #define CONFIG_ENV_IS_IN_SPI_FLASH
162 #define CONFIG_ENV_OFFSET (768 * 1024)
163 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
164 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
165 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
166 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
167 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
169 #define CONFIG_ENV_OFFSET (8 * SZ_64K)
170 #define CONFIG_ENV_IS_IN_MMC
173 #define CONFIG_OF_LIBFDT
174 #define CONFIG_CMD_BOOTZ
176 #ifndef CONFIG_SYS_DCACHE_OFF
177 #define CONFIG_CMD_CACHE
180 #define CONFIG_CMD_SF
182 #define CONFIG_SPI_FLASH
183 #define CONFIG_SPI_FLASH_STMICRO
184 #define CONFIG_MXC_SPI
185 #define CONFIG_SF_DEFAULT_BUS 0
186 #define CONFIG_SF_DEFAULT_CS 0
187 #define CONFIG_SF_DEFAULT_SPEED 20000000
188 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
192 #define CONFIG_CMD_USB
193 #ifdef CONFIG_CMD_USB
194 #define CONFIG_USB_EHCI
195 #define CONFIG_USB_EHCI_MX6
196 #define CONFIG_USB_STORAGE
197 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
198 #define CONFIG_USB_HOST_ETHER
199 #define CONFIG_USB_ETHER_ASIX
200 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
201 #define CONFIG_MXC_USB_FLAGS 0
202 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
205 #define CONFIG_SYS_FSL_USDHC_NUM 3
206 #if defined(CONFIG_ENV_IS_IN_MMC)
207 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
210 #define CONFIG_IMX6_THERMAL
212 #define CONFIG_CMD_FUSE
213 #if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
214 #define CONFIG_MXC_OCOTP
217 #endif /* __CONFIG_H */