1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Jason Liu <r64343@freescale.com>
6 * Configuration settings for Freescale MX53 low cost board.
12 #include <asm/arch/imx-regs.h>
14 #define CONFIG_MXC_UART_BASE UART1_BASE
17 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
18 #define CONFIG_SYS_FSL_ESDHC_NUM 2
21 #define CONFIG_MXC_USB_PORT 1
22 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
23 #define CONFIG_MXC_USB_FLAGS 0
26 #define CONFIG_DIALOG_POWER
27 #define CONFIG_POWER_FSL
28 #define CONFIG_POWER_FSL_MC13892
29 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
30 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
32 /* Command definition */
34 #define CONFIG_EXTRA_ENV_SETTINGS \
37 "fdt_addr=0x71000000\0" \
42 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
43 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \
45 "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
46 "bootscript=echo Running bootscript from mmc ...; " \
48 "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
49 "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
50 "mmcboot=echo Booting from mmc ...; " \
52 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
53 "if run loadfdt; then " \
54 "bootz ${loadaddr} - ${fdt_addr}; " \
56 "if test ${boot_fdt} = try; then " \
59 "echo WARN: Cannot load the DT; " \
65 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
67 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
68 "netboot=echo Booting from net ...; " \
70 "if test ${ip_dyn} = yes; then " \
71 "setenv get_cmd dhcp; " \
73 "setenv get_cmd tftp; " \
75 "${get_cmd} ${image}; " \
76 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
77 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
78 "bootz ${loadaddr} - ${fdt_addr}; " \
80 "if test ${boot_fdt} = try; then " \
83 "echo ERROR: Cannot load the DT; " \
91 /* Miscellaneous configurable options */
92 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
94 /* Physical Memory Map */
95 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
96 #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
97 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
98 #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
99 #define PHYS_SDRAM_SIZE (gd->ram_size)
101 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
102 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
103 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
105 #define CONFIG_SYS_INIT_SP_OFFSET \
106 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
107 #define CONFIG_SYS_INIT_SP_ADDR \
108 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
110 /* Environment starts at 768k = 768 * 1024 = 786432 */
112 * Detect overlap between U-Boot image and environment area in build-time
114 * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset
115 * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408
117 * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so
118 * write the direct value here
120 #define CONFIG_BOARD_SIZE_LIMIT 785408
122 #ifdef CONFIG_CMD_SATA
123 #define CONFIG_DWC_AHSATA_PORT_ID 0
124 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
128 /* Framebuffer and LCD */
130 #endif /* __CONFIG_H */