Convert CONFIG_MXC_UART to Kconfig
[platform/kernel/u-boot.git] / include / configs / mx35pdk.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
4  *
5  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6  *
7  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
8  *
9  * Configuration for the MX35pdk Freescale board.
10  */
11
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14
15 #include <asm/arch/imx-regs.h>
16
17  /* High Level Configuration Options */
18 #define CONFIG_MX35
19
20 #define CONFIG_SYS_FSL_CLK
21
22 /* Set TEXT at the beginning of the NOR flash */
23
24 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
25 #define CONFIG_REVISION_TAG
26 #define CONFIG_SETUP_MEMORY_TAGS
27 #define CONFIG_INITRD_TAG
28
29 /*
30  * Size of malloc() pool
31  */
32 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
33
34 /*
35  * Hardware drivers
36  */
37 #define CONFIG_SYS_I2C
38 #define CONFIG_SYS_I2C_MXC
39 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
40 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
41 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
42
43 /*
44  * PMIC Configs
45  */
46 #define CONFIG_POWER
47 #define CONFIG_POWER_I2C
48 #define CONFIG_POWER_FSL
49 #define CONFIG_POWER_FSL_MC13892
50 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x08
51 #define CONFIG_RTC_MC13XXX
52
53 /*
54  * MFD MC9SDZ60
55  */
56 #define CONFIG_FSL_MC9SDZ60
57 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR        0x69
58
59 /*
60  * UART (console)
61  */
62 #define CONFIG_MXC_UART_BASE    UART1_BASE
63
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66
67 /*
68  * Command definition
69  */
70
71 #define CONFIG_NET_RETRY_COUNT  100
72
73
74 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
75
76 /*
77  * Ethernet on the debug board (SMC911)
78  */
79 #define CONFIG_HAS_ETH1
80 #define CONFIG_ETHPRIME
81
82 /*
83  * Ethernet on SOC (FEC)
84  */
85 #define CONFIG_FEC_MXC
86 #define IMX_FEC_BASE    FEC_BASE_ADDR
87 #define CONFIG_FEC_MXC_PHYADDR  0x1F
88
89 #define CONFIG_ARP_TIMEOUT      200UL
90
91 /*
92  * Miscellaneous configurable options
93  */
94
95 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
96
97 /*
98  * Physical Memory Map
99  */
100 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
101 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
102 #define PHYS_SDRAM_2            CSD1_BASE_ADDR
103 #define PHYS_SDRAM_2_SIZE       (128 * 1024 * 1024)
104
105 #define CONFIG_SYS_SDRAM_BASE           CSD0_BASE_ADDR
106 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR + 0x10000)
107 #define CONFIG_SYS_INIT_RAM_SIZE                (IRAM_SIZE / 2)
108 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
109                                         GENERATED_GBL_DATA_SIZE)
110 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
111                                         CONFIG_SYS_GBL_DATA_OFFSET)
112
113 /*
114  * MTD Command for mtdparts
115  */
116
117 /*
118  * FLASH and environment organization
119  */
120 #define CONFIG_SYS_FLASH_BASE           CS0_BASE_ADDR
121 #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
122 #define CONFIG_SYS_MAX_FLASH_SECT 512   /* max number of sectors on one chip */
123 /* Monitor at beginning of flash */
124 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
125 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
126
127 /* Address and size of Redundant Environment Sector     */
128
129 /*
130  * CFI FLASH driver setup
131  */
132
133 /* A non-standard buffered write algorithm */
134 #define CONFIG_FLASH_SPANSION_S29WS_N
135
136 /*
137  * NAND FLASH driver setup
138  */
139 #define CONFIG_MXC_NAND_REGS_BASE       (NFC_BASE_ADDR)
140 #define CONFIG_SYS_MAX_NAND_DEVICE      1
141 #define CONFIG_SYS_NAND_BASE            (NFC_BASE_ADDR)
142 #define CONFIG_MXC_NAND_HWECC
143 #define CONFIG_SYS_NAND_LARGEPAGE
144
145 /* EHCI driver */
146 #define CONFIG_EHCI_IS_TDI
147 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
148 #define CONFIG_USB_EHCI_MXC
149 #define CONFIG_MXC_USB_PORT     0
150 #define CONFIG_MXC_USB_FLAGS    (MXC_EHCI_INTERFACE_DIFF_UNI | \
151                                  MXC_EHCI_POWER_PINS_ENABLED | \
152                                  MXC_EHCI_OC_PIN_ACTIVE_LOW)
153 #define CONFIG_MXC_USB_PORTSC   (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
154
155 /* mmc driver */
156 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
157 #define CONFIG_SYS_FSL_ESDHC_NUM        1
158
159 /*
160  * Default environment and default scripts
161  * to update uboot and load kernel
162  */
163
164 #define CONFIG_HOSTNAME "mx35pdk"
165 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
166         "netdev=eth1\0"                                                 \
167         "ethprime=smc911x\0"                                            \
168         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
169                 "nfsroot=${serverip}:${rootpath}\0"                     \
170         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
171         "addip_sta=setenv bootargs ${bootargs} "                        \
172                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
173                 ":${hostname}:${netdev}:off panic=1\0"                  \
174         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
175         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
176                 "else run addip_sta;fi\0"                               \
177         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
178         "addtty=setenv bootargs ${bootargs}"                            \
179                 " console=ttymxc0,${baudrate}\0"                        \
180         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
181         "loadaddr=80800000\0"                                           \
182         "kernel_addr_r=80800000\0"                                      \
183         "hostname=" CONFIG_HOSTNAME "\0"                        \
184         "bootfile=" CONFIG_HOSTNAME "/uImage\0"         \
185         "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0"   \
186         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
187                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
188         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
189                 "bootm ${kernel_addr}\0"                                \
190         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
191                 "run nfsargs addip addtty addmtd addmisc;"              \
192                 "bootm ${kernel_addr_r}\0"                              \
193         "net_self_load=tftp ${kernel_addr_r} ${bootfile};"              \
194                 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0"             \
195         "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0"               \
196         "load=tftp ${loadaddr} ${u-boot}\0"                             \
197         "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"         \
198         "update=protect off ${uboot_addr} +80000;"                      \
199                 "erase ${uboot_addr} +80000;"                           \
200                 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"          \
201         "upd=if run load;then echo Updating u-boot;if run update;"      \
202                 "then echo U-Boot updated;"                             \
203                         "else echo Error updating u-boot !;"            \
204                         "echo Board without bootloader !!;"             \
205                 "fi;"                                                   \
206                 "else echo U-Boot not downloaded..exiting;fi\0"         \
207         "bootcmd=run net_nfs\0"
208
209 #endif                          /* __CONFIG_H */