659effb2162b8c0fbe316f3681c11a4ef1b3a960
[platform/kernel/u-boot.git] / include / configs / mx35pdk.h
1 /*
2  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7  *
8  * Configuration for the MX35pdk Freescale board.
9  *
10  * SPDX-License-Identifier:     GPL-2.0+
11  */
12
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #include <asm/arch/imx-regs.h>
17
18  /* High Level Configuration Options */
19 #define CONFIG_MX35
20
21 #define CONFIG_SYS_FSL_CLK
22
23 /* Set TEXT at the beginning of the NOR flash */
24 #define CONFIG_SYS_TEXT_BASE    0xA0000000
25
26 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
27 #define CONFIG_REVISION_TAG
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30
31 /*
32  * Size of malloc() pool
33  */
34 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1024 * 1024)
35
36 /*
37  * Hardware drivers
38  */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
44 #define CONFIG_MXC_SPI
45 #define CONFIG_MXC_GPIO
46
47 /*
48  * PMIC Configs
49  */
50 #define CONFIG_POWER
51 #define CONFIG_POWER_I2C
52 #define CONFIG_POWER_FSL
53 #define CONFIG_POWER_FSL_MC13892
54 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR    0x08
55 #define CONFIG_RTC_MC13XXX
56
57 /*
58  * MFD MC9SDZ60
59  */
60 #define CONFIG_FSL_MC9SDZ60
61 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR        0x69
62
63 /*
64  * UART (console)
65  */
66 #define CONFIG_MXC_UART
67 #define CONFIG_MXC_UART_BASE    UART1_BASE
68
69 /* allow to overwrite serial and ethaddr */
70 #define CONFIG_ENV_OVERWRITE
71 #define CONFIG_CONS_INDEX       1
72
73 /*
74  * Command definition
75  */
76 #define CONFIG_BOOTP_SUBNETMASK
77 #define CONFIG_BOOTP_GATEWAY
78 #define CONFIG_BOOTP_DNS
79
80 #define CONFIG_NET_RETRY_COUNT  100
81
82
83 #define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
84
85 /*
86  * Ethernet on the debug board (SMC911)
87  */
88 #define CONFIG_SMC911X
89 #define CONFIG_SMC911X_16_BIT 1
90 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
91
92 #define CONFIG_HAS_ETH1
93 #define CONFIG_ETHPRIME
94
95 /*
96  * Ethernet on SOC (FEC)
97  */
98 #define CONFIG_FEC_MXC
99 #define IMX_FEC_BASE    FEC_BASE_ADDR
100 #define CONFIG_FEC_MXC_PHYADDR  0x1F
101
102 #define CONFIG_MII
103
104 #define CONFIG_ARP_TIMEOUT      200UL
105
106 /*
107  * Miscellaneous configurable options
108  */
109 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
110 #define CONFIG_CMDLINE_EDITING
111
112 #define CONFIG_AUTO_COMPLETE
113 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
114 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
115
116 #define CONFIG_SYS_MEMTEST_START        0       /* memtest works on */
117 #define CONFIG_SYS_MEMTEST_END          0x10000
118
119 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
120
121 /*
122  * Physical Memory Map
123  */
124 #define CONFIG_NR_DRAM_BANKS    2
125 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
126 #define PHYS_SDRAM_1_SIZE       (128 * 1024 * 1024)
127 #define PHYS_SDRAM_2            CSD1_BASE_ADDR
128 #define PHYS_SDRAM_2_SIZE       (128 * 1024 * 1024)
129
130 #define CONFIG_SYS_SDRAM_BASE           CSD0_BASE_ADDR
131 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR + 0x10000)
132 #define CONFIG_SYS_INIT_RAM_SIZE                (IRAM_SIZE / 2)
133 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
134                                         GENERATED_GBL_DATA_SIZE)
135 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
136                                         CONFIG_SYS_GBL_DATA_OFFSET)
137
138 /*
139  * MTD Command for mtdparts
140  */
141 #define CONFIG_MTD_DEVICE
142 #define CONFIG_FLASH_CFI_MTD
143 #define CONFIG_MTD_PARTITIONS
144 #define MTDIDS_DEFAULT          "nand0=mxc_nand,nor0=physmap-flash.0"
145 #define MTDPARTS_DEFAULT        "mtdparts=mxc_nand:1m(boot),5m(linux)," \
146                                 "96m(root),8m(cfg),1938m(user);"        \
147                                 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
148
149 /*
150  * FLASH and environment organization
151  */
152 #define CONFIG_SYS_FLASH_BASE           CS0_BASE_ADDR
153 #define CONFIG_SYS_MAX_FLASH_BANKS 1    /* max number of memory banks */
154 #define CONFIG_SYS_MAX_FLASH_SECT 512   /* max number of sectors on one chip */
155 /* Monitor at beginning of flash */
156 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
157 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
158
159 #define CONFIG_ENV_SECT_SIZE    (128 * 1024)
160 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
161
162 /* Address and size of Redundant Environment Sector     */
163 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
164 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
165
166 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + \
167                                 CONFIG_SYS_MONITOR_LEN)
168
169 #if defined(CONFIG_FSL_ENV_IN_NAND)
170         #define CONFIG_ENV_OFFSET       (1024 * 1024)
171 #endif
172
173 /*
174  * CFI FLASH driver setup
175  */
176 #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
177 #define CONFIG_FLASH_CFI_DRIVER
178
179 /* A non-standard buffered write algorithm */
180 #define CONFIG_FLASH_SPANSION_S29WS_N
181 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       /* faster */
182 #define CONFIG_SYS_FLASH_PROTECTION     /* Use hardware sector protection */
183
184 /*
185  * NAND FLASH driver setup
186  */
187 #define CONFIG_NAND_MXC
188 #define CONFIG_MXC_NAND_REGS_BASE       (NFC_BASE_ADDR)
189 #define CONFIG_SYS_MAX_NAND_DEVICE      1
190 #define CONFIG_SYS_NAND_BASE            (NFC_BASE_ADDR)
191 #define CONFIG_MXC_NAND_HWECC
192 #define CONFIG_SYS_NAND_LARGEPAGE
193
194 /* EHCI driver */
195 #define CONFIG_EHCI_IS_TDI
196 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
197 #define CONFIG_USB_EHCI_MXC
198 #define CONFIG_MXC_USB_PORT     0
199 #define CONFIG_MXC_USB_FLAGS    (MXC_EHCI_INTERFACE_DIFF_UNI | \
200                                  MXC_EHCI_POWER_PINS_ENABLED | \
201                                  MXC_EHCI_OC_PIN_ACTIVE_LOW)
202 #define CONFIG_MXC_USB_PORTSC   (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
203
204 /* mmc driver */
205 #define CONFIG_FSL_ESDHC
206 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
207 #define CONFIG_SYS_FSL_ESDHC_NUM        1
208
209 /*
210  * Default environment and default scripts
211  * to update uboot and load kernel
212  */
213
214 #define CONFIG_HOSTNAME "mx35pdk"
215 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
216         "netdev=eth1\0"                                                 \
217         "ethprime=smc911x\0"                                            \
218         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
219                 "nfsroot=${serverip}:${rootpath}\0"                     \
220         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
221         "addip_sta=setenv bootargs ${bootargs} "                        \
222                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
223                 ":${hostname}:${netdev}:off panic=1\0"                  \
224         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
225         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
226                 "else run addip_sta;fi\0"                               \
227         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
228         "addtty=setenv bootargs ${bootargs}"                            \
229                 " console=ttymxc0,${baudrate}\0"                        \
230         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
231         "loadaddr=80800000\0"                                           \
232         "kernel_addr_r=80800000\0"                                      \
233         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
234         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
235         "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"      \
236         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
237                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
238         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
239                 "bootm ${kernel_addr}\0"                                \
240         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
241                 "run nfsargs addip addtty addmtd addmisc;"              \
242                 "bootm ${kernel_addr_r}\0"                              \
243         "net_self_load=tftp ${kernel_addr_r} ${bootfile};"              \
244                 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0"             \
245         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"          \
246         "load=tftp ${loadaddr} ${u-boot}\0"                             \
247         "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"         \
248         "update=protect off ${uboot_addr} +80000;"                      \
249                 "erase ${uboot_addr} +80000;"                           \
250                 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"          \
251         "upd=if run load;then echo Updating u-boot;if run update;"      \
252                 "then echo U-Boot updated;"                             \
253                         "else echo Error updating u-boot !;"            \
254                         "echo Board without bootloader !!;"             \
255                 "fi;"                                                   \
256                 "else echo U-Boot not downloaded..exiting;fi\0"         \
257         "bootcmd=run net_nfs\0"
258
259 #endif                          /* __CONFIG_H */